This study investigated the economic feasibility of distributed or decentralized torrefaction bio-refining using corn stover feedstock to generate value added products. distributed bio-refining systems would be able t...
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ISBN:
(纸本)9780791850220
This study investigated the economic feasibility of distributed or decentralized torrefaction bio-refining using corn stover feedstock to generate value added products. distributed bio-refining systems would be able to operate on private farm and commercial scales, eliminating the need for large capital investment for large processing facilities and decreasing logistical concerns for harvesting and marketing corn stover. A techno-economic model was developed to analyze the economics of harvesting techniques, logistics, processing requirements, and end product utilization. With the model, a base case analysis was established to analyze average values and to create a basis in which to compare a variety of economic scenarios. A sensitivity analysis was also completed to investigate outcomes based on variability of crop yields and product price, as well as costs associated with harvesting stover, input for operating the torrefaction system, and capital costs of equipment. Results of the analyses were quantified with respect to input costs required to generate torrefied products, potential profit of processed products, and the payback period of the production and conversion system. Preliminary results indicated that processing corn stover feedstock within a distribution torrefaction bio-refining system had high potential, in terms of economic feasibility, over a wide range of scenarios. Results indicated that payback periods as low as five years were possible under a wide variety of applications and operating costs. In addition to operating economically, it was also shown that end products could have increasing profit potential as a value added product.
Since information is growing explosively, the requirements for high performance storage systems are critical in practical applications. The research on performance prediction has become increasingly important in the a...
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Information processing is a very broad area in which many problems are computationally intensive and thus, they require parallelization and acceleration based on new technologies. The Xilinx Zynq-7000 all programmable...
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ISBN:
(纸本)9781479941209
Information processing is a very broad area in which many problems are computationally intensive and thus, they require parallelization and acceleration based on new technologies. The Xilinx Zynq-7000 all programmable system-on-chip can be seen as a very adequate platform permitting application-specific software and problem-targeted hardware to be coupled on a single configurable microchip. The tutorial is dedicated to multi-level software/hardware co-design techniques and system architectures that combine general-purpose computers, multi-core application-specific processing, and accelerators in reconfigurable hardware with emphasis on broad parallelism. Four projects from the scope of data processing, application informatics, parallel algorithms (mapped to hardware), and combinatorial search are briefly characterized and will be demonstrated in fully implemented and ready to test projects that include software and reconfigurable hardware linked with on-chip high-performance interfaces. Particular design examples, potential practical applications, experiments and comparisons will be demonstrated.
distributed matrix computation is common in large-scale data processing and machine learning applications. Existing systems that support distributed matrix computation already explore incremental evaluation for iterat...
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ISBN:
(纸本)9781450383431
distributed matrix computation is common in large-scale data processing and machine learning applications. Existing systems that support distributed matrix computation already explore incremental evaluation for iterative-convergent algorithms. However, they are oblivious to the fact that non-zero increments are scattered in different blocks in a distributed environment. Additionally, we observe that incremental evaluation does not always outperform full evaluation. To address these issues, we propose matrix reorganization to optimize the physical layout upon the state-of-art optimized partition schemes, and thereby accelerate the incremental evaluation. More importantly, we propose a hybrid evaluation to efficiently interleave full and incremental evaluation during the iterative process. In particular, it employs a cost model to compare the overhead costs of two types of evaluations and a selective comparison mechanism to reduce the overhead incurred by comparison itself. To demonstrate the efficiency of our techniques, we implement HyMAC, a hybrid matrix computation system based on SystemML. Our experiments show that HyMAC reduces execution time on large datasets by 23% on average in comparison to the state-of-art optimization technique and consequently outperforms SystemML, ScaLAPACK, and SciDB by an order of magnitude.
Knowledge is the fruit of human's knowledge of the objective world in practice and the crystallization of wisdom. A knowledge base makes a knowledge-based system (or expert system) intelligent by structuring and s...
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A building block for a scalable signal processor array is developed with a general-purpose DSP and a message routing LSI. Each DSP can be connected by multiple routing LSIs forming a point-to-point message-passing net...
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ISBN:
(纸本)0818629673
A building block for a scalable signal processor array is developed with a general-purpose DSP and a message routing LSI. Each DSP can be connected by multiple routing LSIs forming a point-to-point message-passing network with data packet communication. Low network latency is obtained by cut-through routing technique with sufficient communication bandwidth. The employment of an on-chip routing table allows regular as well as irregular topologies with complex routing techniques such as broad/multi-casting and dynamic routing. The combination of DSPs (μPD77240), a flexible message-passing network and an optional application-specific I/O interface makes the processor array suitable for a wide range of high speed signal processingapplications such as adaptive array processing and 3-D vision processing.
The interest in the ability of processing data that has an underlying graph structure has grown in the recent past. This has led to the development of many distributed graph processing systems. However, due to rapidly...
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Meteorology Grid Computing aims to provide scientist with seamless, reliable, secure and inexpensive access to meteorological resources. In this paper, we presented a semantic-based meteorology grid service registry, ...
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In this article we present PARSIR (parallel SImulation Runner), a package that enables the effective exploitation of shared-memory multi-processor machines for running discrete event simulation models. PARSIR is a com...
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In light of recent advancements in Internet of Multimedia Things (IoMT) and 5G technology, both the variety and quantity of data have been rapidly increasing. Consequently, handling zero-shot cross-modal retrieval (ZS...
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