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HVAC: Removing I/O Bottleneck for Large-Scale Deep Learning applications

HVAC: Removing I/O Bottleneck for Large-Scale Deep Learning ...

引用

IEEE international conference on Cluster Computing (CLUSTER)

作者： Khan, Awais Paul, Arnab K. Zimmer, Christopher Oral, Sarp Dash, Sajal Atchley, Scott Wang, Feiyi Oak Ridge Natl Lab Oak Ridge TN 37830 USA BITS Pilani KK Birla Goa Campus Pilani Rajasthan India

ISBN: (数字)9781665498562

ISBN: (纸本)9781665498562

Scientific communities are increasingly adopting deep learning (DL) models in their applications to accelerate scientific discovery processes. However, with rapid growth in the computing capabilities of HPC supercomputers, large-scale DL applications have to spend a significant portion of training time performing I/O to a parallel storage system. Previous research works have investigated optimization techniques such as prefetching and caching. Unfortunately, there exist non-trivial challenges to adopting the existing solutions on HPC supercomputers for large-scale DL training applications, which include non-performance and/or failures at extreme scale, lack of portability and generality in design, complex deployment methodology, and being limited to a specific application or dataset. To address these challenges, we propose High-Velocity AI Cache (HVAC), a distributed read-cache layer that targets and fully exploits the node-local storage or near node-local storage technology. HVAC seamlessly accelerates read I/O by aggregating node-local or near node-local storage, avoiding metadata lookups and file locking while preserving portability in the application code. We deploy and evaluate HVAC on 1,024 nodes (with over 6000 NVIDIA V100 GPUS) of the Summit supercomputer. In particular, we evaluate the scalability, efficiency, accuracy, and load distribution of HVAC compared to GPFS and XFS-on-NVMe. With four different DL applications, we observe an average 25% performance improvement atop GPFS and 9% drop against XFS-on-NVMe, which scale linearly and are considered the performance upper bound. We envision HVAC as an important caching library for upcoming HPC supercomputers such as Frontier.

关键词： High-Performance Computing (HPC) Deep Learning Caching and I/O Optimizations

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Efficient Design and Implementation of Matrix Multiplication 1

Efficient Design and Implementation of Matrix Multiplication

引用

1st international conference on Circuits, Power, and Intelligent Systems, CCPIS 2023

作者： Kumar, Shivam Panda, Jeebananda Delhi Technological University Department of Electronics and Communication Delhi India

ISBN: (纸本)9798350315769

The semiconductor industry plays a crucial role in the design and manufacture of integrated circuits (ICs) used in a wide range of electronic devices. Matrix multiplication is of significant importance in various fields and applications as it plays a fundamental role in linear algebra, solving systems of linear equations, data analysis and machine learning, computer graphics and computer vision, network theory, graph algorithms, etc. This paper gives a thorough investigation into how the Wallace tree multiplier, Vedic multiplier, and parallel prefix adders might be combined to enhance matrix multiplication performance. These techniques contribute to achieving significant speed improvements and reduced and optimized resource utilization. Firstly, Ripple Carry adders, Kogge Stone adders, and Han Carlson adders have been designed and analyzed. After that, the Wallace tree multiplier and Vedic multiplier are designed using these adders. By combining both multiplier and adder, matrix multiplication designs, analyses the performance data, and interprets the results obtained from the experiments. Using the ISE Design Suite tools in Verilog, all circuits are created and simulations are run. The XC6SLX150T are the devices used for synthesis. © 2023 IEEE.

关键词： Digital signal processing

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DeepARR: Alert risk rating based on deep learning

DeepARR: Alert risk rating based on deep learning

引用

international Symposium on parallel and distributed processing with applications, ISPA

作者： Qiyue Tang Xiaoqiang Di Xu Liu Ligang Cong Weiwu Ren Zhengping Ni School of Computer Science and Technology Changchun University of Science and Technology Changchun China Information Center Changchun University of Science and Technology Changchun China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Alert fatigue has caused serious consequences for enterprise security. When analysts are inundated with a vast number of alerts, high-risk alerts may be overlooked or responded to with delay, thereby exposing the organization to potential cyber threats or data breaches. Although there are many alert classification research focusing on reducing alerts, it’s still impossible to investigate all alerts due to the resource shortage. Therefore, it is necessary to prioritize alerts based on their potential severity, allowing analysts to address higher-risk alerts first. This paper proposes a novel alert risk rating DeepARR (Deep Learning-based Alert Risk Rating), that utilizes deep learning technology to rate alert risk levels in bulk instead of investigating each alert individually. It first employs a dynamic time window segmentation approach to merge alerts, reducing the overall number. Subsequently, a directed graph-based method is proposed to handle data imbalance. Both temporal-spatial features and event features are extracted. Finally, deep learning techniques are used to classify alert levels. The proposed method is evaluated on the public CPTC-2018 alert dataset. Compared with existing methods, DeepARR achieves an average precision of 95.73%, a recall of 94.83%, and an F1 Score of 94.84% in risk rating, demonstrating its higher effectiveness.

关键词： Deep learning distributed processing Focusing Organizations Data breach Feature extraction Fatigue Delays Security Floods

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Approaches Towards AI-Based Recommender System

Approaches Towards AI-Based Recommender System

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2022 international conference on Machine Learning, Big Data, Cloud and parallel Computing, COM-IT-CON 2022

作者： Rawat, Amarjeet Ghildiyal, Sunil Dixit, Anil Kumar Memoria, Minakshi Kumar, Rajiv Kumar, Sanjeev Uttaranchal University Department of Computer Science and Engineering Dehradun India Uttaranchal University Law College Dehradun Dehradun India Uttaranchal University Department of Computer Applications Dehradun India Himgiri Zee University Department of Computer Science and Information Technology Dehradun India

ISBN: (数字)9781665496025

ISBN: (纸本)9781665496025

Recommender Systems (RS) have application in all areas where digital information is generating at high rate. They are used to filter large volume of digital data containing user preferences, interests and behaviour patterns for products and services. Today artificial intelligence has achieved rapid development in automation, computation, knowledge-engineering, information retrieval and processing. techniques such as fuzzy logic, neural networks, natural language processing, transfer learning, machine learning are also contributing to enhance the performance, accuracy of recommendation system and reducing problems like cold-start, data-sparsity, privacy and scalability. This paper explains the development stages and different categories of recommender system. This paper further explores the challenges and recent trends in building recommendation system. © 2022 IEEE.

关键词： Recommender systems

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Harnessing the Crowd for Autotuning High-Performance Computing applications

Harnessing the Crowd for Autotuning High-Performance Computi...

引用

international Symposium on parallel and distributed processing (IPDPS)

作者： Younghyun Cho James W. Demmel Jacob King Xiaoye S. Li Yang Liu Hengrui Luo University of California Berkeley Tech-X Lawrence Berkeley National Laboratory

This paper presents GPTuneCrowd, a crowd-based autotuning framework for tuning high-performance computing applications. GPTuneCrowd collects performance data from various users using a user-friendly tuner interface. GPTuneCrowd then presents novel autotuning techniques, based on transfer learning and parameter sensitivity analysis, to maximize tuning quality using collected data from the crowd. This paper shows several real-world case studies of GPTuneCrowd. Our evaluation shows that GPTuneCrowd’s transfer learning improves the tuned performance of ScaLAPACK’s PDGEQRF by 1.57x and a plasma fusion code NIMROD by 2.97x, over a non-transfer learning autotuner. We use GPTuneCrowd’s sensitivity analysis to reduce the search space of SuperLU_DIST and Hypre. Tuning on the reduced search space achieves 1.17x and 1.35x better tuned performance of SuperLU_DIST and Hypre, respectively, compared to the original search space.

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Visualizing Parts of Speech Tags by Analysing English Language Text

Visualizing Parts of Speech Tags by Analysing English Langua...

引用

distributed Computing and Electrical Circuits and Electronics (ICDCECE), IEEE international conference on

作者： Prajna K B Reenal Sony Pinto Lakshmishree V S S Vrajesh Department of ECE Nitte Meenakshi Institute of Technology Bengaluru India

ISBN: (数字)9798350318609

ISBN: (纸本)9798350318616

Part of Speech (POS) tagging is vital in natural language processing (NLP) for various applications. Hidden Markov Models (HMMs) have traditionally been used for this task, yet they struggle with capturing complex dependencies. This study explores Conditional Random Fields (CRFs) and their integration with Spacy for POS tagging. CRFs offer better sequence modelling capabilities, while Spacy provides rich linguistic features. Experimental evaluation demonstrates superiority of CRFs and CRF with Spacy over HMMs. They exhibit improved accuracy, particularly in capturing context and handling ambiguous sequence. The findings underscore the efficiency of advanced techniques like CRFs and their integration with comprehensive NLP libraries like Spacy for accurate POS tagging. Such methods are crucial for advancing NLP applications.

关键词： Hidden Markov models Tagging Linguistics Natural language processing Conditional random fields Real-time systems Libraries

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A Novel Approach to Ensure Security and Privacy While Using QR Code Scanning in Business applications 7

A Novel Approach to Ensure Security and Privacy While Using ...

引用

7th international conference on parallel, distributed and Grid Computing, PDGC 2022

作者： Bhamidipati, Venkateswara Sarma Sai, W.V.S. Raghavendra Sap Labs India Pvt. Ltd. ERP4SME Central Operations Karnataka Bangalore India Sap Labs India Pvt. Ltd. Business Networks Engineering Karnataka Bangalore India

ISBN: (纸本)9781665454018

One of many challenges created by COVID-19 pandemic is to reduce need of contact. Quick Response (QR) codes offered a readily available solution to this challenge with offer to support contact less processes. Wide adaption of smart mobile devices like smart phones and tablets and huge number of mobile applications available in the respective application stores, which support QR code scanning acted as a catalyst in rapid adaption of QR codes to support contact less processes. Support of QR code-based processing rapidly increased during the pandemic, penetrated all processes like sales and marketing, authentication, and digital payments to name some. On one hand, this served the cause in terms of reducing contact, on other hand, factors like rapid adaption and using it in smart mobile devices, which are existing to cater to the larger purpose of human usage, scanning QR codes was not in that list to start with is bringing in the series of security issues which can arise starting from the human factor, software, misuse and hacking factors. This paper focuses on the QR code processes, differences in terms of security while using a smart device for QR codes when compared to the rugged device-based barcode scanners, the kind of security issues such process can encounter while using smart devises for QR code scanning, factors that must be considered by the applications development as well as the consumers of such functionality and the way to ensure security of consumers of such functionality. © 2022 IEEE.

关键词： COVID-19

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Performance Analysis of Software Enabled Accelerator Library for Intel Architecture 2nd

Performance Analysis of Software Enabled Accelerator Library...

引用

2nd international conference on Data Science, Machine Learning and applications, ICDSMLA 2020

作者： Mohindru, Gaurav Mondal, Koushik Banka, Haider Dhanbad India Dhanbad India

ISBN: (纸本)9789811636899

With the advancement of the General Purpose Graphics processing Unit (GPGPU) for parallel processing, the Central processing Unit (CPU) based architecture industry focused its development on software accelerator based performance maximizer so as to provide the parallel environment in a software way. This set of accelerator libraries support all stages of data science or data analysis pipelines viz. preprocessing, transformation, analysis, modelling, validation, and decision-making. The recent trends of large dataset based computation models are to use all the available features to create rule-bases for validation rather than feature summarization or reduction based on subset selection statistical techniques. Deep learning allows these computational models that are composed of multiple processing layers to learn and train from the large dataset with multiple levels of abstraction without reduction in features. Intel’s Data Analytics Acceleration Library (Intel DAAL) enables applications to process large datasets to make faster and better predictions with available Intel processors in a lab environment. In this paper, we will discuss the enabling factors of Intel’s DAAL and how it optimizes the performance in a Python computational environment with and without Anaconda frameworks. © 2022, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

关键词： Graphics processing unit

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Capturing Periodic I/O Using Frequency techniques

Capturing Periodic I/O Using Frequency Techniques

引用

international Symposium on parallel and distributed processing (IPDPS)

作者： Ahmad Tarraf Alexis Bandet Francieli Boito Guillaume Pallez Felix Wolf Department of Computer Science Technical University of Darmstadt Darmstadt Germany Inria LaBRI UMR 5800 Univ. Bordeaux CNRS Bordeaux INP Talence France Inria Rennes France

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Many HPC applications perform their I/O in bursts that follow a periodic pattern. This allows for making predictions as to when a burst occurs. System providers can take advantage of such knowledge to reduce file-system contention by actively scheduling I/O bandwidth. The effectiveness of this approach, however, depends on the ability to detect and quantify the periodicity of I/O patterns online. In this paper, we introduce FTIO, an online method to detect periodic I/O phases, which is based on discrete Fourier transform (DFT), combined with outlier detection. We provide metrics that gauge the confidence in the output and tell how far from being periodic the signal is. We validate our approach with large-scale experiments on a production system and examine its limitations extensively. Our experiments show that FTIO has a mean error below 11%. Finally, we demonstrate that FTIO allowed the I/O scheduler Set10 to boost system utilization by 26% and reduce I/O slowdown by 56%.

关键词： Measurement Wavelet transforms Production systems distributed processing Discrete Fourier transforms Merging Bandwidth

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Optimization Research on Solving Tridiagonal Matrix Eigenproblems Based on Divide and Conquer on GPU-like Accelerators 3

Optimization Research on Solving Tridiagonal Matrix Eigenpro...

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3rd international conference on Artificial Intelligence, Automation, and High-Performance Computing, AIAHPC 2023

作者： Liu, Bo Sun, JianPeng Zhao, HongPeng Cao, WuDi Wang, QingWei School of Computing and Artificial Intelligence Zhengzhou University Henan Zhengzhou450000 China Co. Ltd. Beijing100080 China

ISBN: (数字)9781510666580

ISBN: (纸本)9781510666573

In scientific and engineering computations, it is often necessary to solve eigenvalue problems of symmetric matrices. With the rapid development of high-performance computing, the adaptation and optimization of linear algebra solution methods, including eigenvalue problem solving, on heterogeneous platforms have become increasingly important. In this paper, we propose a divide-and-conquer method for solving symmetric matrix eigenvalue problems, which is implemented based on the SOLVER library of domestic heterogeneous platforms using the HIP programming model. We take full advantage of the multicore strengths of domestic accelerators and parallelize the solution process, such as the secular equation. parallel reduction and merged computation optimization techniques are employed to further improve performance. Compared with implementations such as MAGMA, our optimized interface demonstrates good stability and high accuracy in various scale test cases of real-world applications, as well as a significant performance advantage. The results show that in large-scale matrix eigenvalue problems, the performance is more than twice that of the related interfaces in the MAGMA library. © 2023 SPIE.

关键词： Graphics processing unit

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