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DistrEdge: Speeding up Convolutional Neural Network Inference on distributed Edge Devices 36

DistrEdge: Speeding up Convolutional Neural Network Inferenc...

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36th IEEE international parallel and distributed Processing symposium (IEEE IPDPS)

作者： Hou, Xueyu Guan, Yongjie Han, Tao Zhang, Ning New Jersey Inst Technol Newark NJ 07102 USA Windsor Univ Windsor ON Canada

ISBN: (纸本)9781665481069

As the number of edge devices with computing resources (e.g., embedded GPUs, mobile phones, and laptops) increases, recent studies demonstrate that it can be beneficial to collaboratively run convolutional neural network (CNN) inference on more than one edge device. However, these studies make strong assumptions on the devices' conditions, and their application is far from practical. In this work, we propose a general method, called DistrEdge, to provide CNN inference distribution strategies in environments with multiple IoT edge devices. By addressing heterogeneity in devices, network conditions, and nonlinear characters of CNN computation, DistrEdge is adaptive to a wide range of cases (e.g., with different network conditions, various device types) using deep reinforcement learning technology. We utilize the latest embedded AI computing devices (e.g., NVIDIA Jetson products) to construct cases of heterogeneous devices' types in the experiment. Based on our evaluations, DistrEdge can properly adjust the distribution strategy according to the devices' computing characters and the network conditions. It achieves 1.1 to 3x speedup compared to state-of-the-art methods.

关键词： distributed computing convolutional neural network edge computing deep reinforcement learning

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Coverage Probability of distributed CoMP UAV-Assisted Cellular Networks 22

Coverage Probability of Distributed CoMP UAV-Assisted Cellul...

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22nd IEEE international symposium on parallel and distributed Processing with Applications, ISPA 2024

作者： Li, Yan Long, Qingmin Tang, Qiang He, Shiming Xiong, Bing Changsha University of Science and Technology School of Computer and Communication Engineering Changsha410004 China National University of Defense Technology Science and Technology on Information System Engineering Laboratory Changsha410073 China

ISBN: (纸本)9798331509712

It is well-established that terrestrial communication systems may fail during emergencies such as earthquakes, tsunamis, and floods. Fortunately, with the rapid advancement of unmanned aerial vehicle (UAV) network technology, deploying UAV nodes as aerial base stations (BSs) is assuming an increasingly crucial role in facilitating downlink transmissions and restoring ground communication capabilities. However, a single UAV node is not sufficient to meet the requirements. Inspired by distributed communication, we introduce a performance analysis framework based on stochastic geometry to analyze the distributed coordinated multi-point (CoMP) UAV-assisted communication network. Specifically, we assume that all UAV nodes follow a homogeneous Poisson point process (PPP) and maintain a constant altitude. The entire space is tessellated by multiple hexagons, with multiple UAV nodes within each hexagonal region working together to serve terrestrial user equipments (UEs). For this region-centric cooperative model, we derive an exact expression for the coverage probability to quantify the performance improvement enabled by UAVs, analyze the upper bound of the coverage probability, and provide a simplified approximation. We then compare this model to a user-centric model. Our numerical findings demonstrate that the cooperation of UAV nodes can significantly enhance the coverage probability and save spectrum resources. © 2024 IEEE.

关键词： Unmanned aerial vehicles (UAV)

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Profiling Hyperscale Big Data Processing 23

Profiling Hyperscale Big Data Processing

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50th Annual international symposium on Computer Architecture (ISCA)

作者： Gonzalez, Abraham Kolli, Aasheesh Khan, Samira Liu, Sihang Dadu, Vidushi Karandikar, Sagar Chang, Jichuan Asanovic, Krste Ranganathan, Parthasarathy Univ Calif Berkeley Berkeley CA 94720 USA Google Mountain View CA 94043 USA Univ Waterloo Waterloo ON Canada

ISBN: (纸本)9798400700958

Computing demand continues to grow exponentially, largely driven by "big data" processing on hyperscale data stores. At the same time, the slowdown in Moore's law is leading the industry to embrace custom computing in large-scale systems. Taken together, these trends motivate the need to characterize live production traffic on these large data processing platforms and understand the opportunity of acceleration at scale. This paper addresses this key need. We characterize three important production distributed database and data analytics platforms at Google to identify key hardware acceleration opportunities and perform a comprehensive limits study to understand the trade-offs among various hardware acceleration strategies. We observe that hyperscale data processing platforms spend significant time on distributed storage and other remote work across distributedworkers. Therefore, optimizing storage and remotework in addition to compute acceleration is critical for these platforms. We present a detailed breakdown of the compute-intensive functions in these platforms and identify dominant key data operations related to datacenter and systems taxes. We observe that no single accelerator can provide a significant benefit but collectively, a sea of accelerators, can accelerate many of these smaller platform-specific functions. We demonstrate the potential gains of the sea of accelerators proposal in a limits study and analytical model. We perform a comprehensive study to understand the trade-offs between accelerator location (on-chip/off-chip) and invocation model (synchronous/asynchronous). We propose and evaluate a chained accelerator execution model where identified compute-intensive functions are accelerated and pipelined to avoid invocation from the core, achieving a 3x improvement over the baseline system while nearly matching identical performance to an ideal fully asynchronous execution model.

关键词： data analytics databases hyperscale computing cloud computing warehouse-scale computing profiling accelerators accelerator-chaining

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PARSEC: parallel Subgraph Enumeration in CUDA 36

PARSEC: PARallel Subgraph Enumeration in CUDA

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36th IEEE international parallel and distributed Processing symposium (IEEE IPDPS)

作者： Dodeja, Vibhor Almasri, Mohammad Nagi, Rakesh Xiong, Jinjun Hwu, Wen-mei Univ Illinois C3SR Urbana IL 61801 USA Univ Buffalo Buffalo NY USA Nvidia Corp Santa Clara CA USA

ISBN: (纸本)9781665481069

Subgraph enumeration is an important problem in the field of Graph Analytics with numerous applications. The problem is provably NP-complete and requires sophisticated heuristics and highly efficient implementations to be feasible on problem sizes of realistic scales. parallel solutions have shown a lot of promise on CPUs and distributed environments. Recently, GPU-based parallel solutions have also been proposed to take advantage of the massive execution resources in modern GPUs. Subgraph enumeration involves traversing a search tree for each vertex of the data graph to find matches of a query in a graph. Most GPU-based solutions traverse the tree in breadth-first manner that exploits parallelism at the cost of high memory requirement and presents a formidable challenge for processing large graphs with high-degree vertices since the memory capacity of GPUs is significantly lower than that of CPUs. In this work, we propose a novel GPU solution based on a hybrid BFS and DFS approach where the top level(s) of the search trees are traversed in a fully parallel, breadth-first manner while each subtree is traversed in a more space-efficient, depth-first manner. The depth-first traversal of subtrees requires less memory but presents more challenges for parallel execution. To overcome the less parallel nature of depth-first traversal, we exploit fine-grained parallelism in each step of the depth-first traversal of subtrees. We further identify and implement various optimizations to efficiently utilize memory and compute resources of the GPUs. We evaluate our performance in comparison with the state-of-the-art GPU and CPU implementations. We outperform the GPU and CPU implementations with a geometric mean speedup of 9.47x (up to 92.01x) and 2.37x (up to 12.70x), respectively. We also show that the proposed approach can efficiently process the graphs that previously cannot be processed by the state-of-the-art GPU solutions due to their excessive memory requirement.

关键词： distributed processing Instruction sets Memory management Graphics processing units Process control Organizations parallel processing

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A distributed AND parallel METHOD OF HYPERSPECTRAL COMPUTATIONAL IMAGING VIA COLLABORATIVE TUCKER3 TENSOR DECOMPOSITION

A DISTRIBUTED AND PARALLEL METHOD OF HYPERSPECTRAL COMPUTATI...

引用

IEEE international Geoscience and Remote Sensing symposium (IGARSS)

作者： Zhang, Ling Wu, Zebin Sun, Jin Xu, Yang Wei, Zhihui Nanjing Univ Sci & Technol Sch Comp Sci & Engn Nanjing 210094 Peoples R China

ISBN: (数字)9781665427920

ISBN: (纸本)9781665427920

Hyperspectral computational imaging (HCI) is to reconstruct hyperspectral images (HSIs) based on the compressed signals collected by remote sensing and imaging systems. Collaborative Tucker3 tensor decomposition is beneficial for HCI models in reconstructing high-fidelity HSIs. However, the ever-increasing amount of compressed data leads to heavy computation burden for tensor decomposition-based HCI models, which may exceed the computing capacity of a single machine. For this reason, this paper proposes a Spark-based distributed and parallel HCI implementation via collaborative Tucker3 tensor decomposition. The proposed implementation decomposes the processing flow of the HCI algorithm into several stages, each of which can be processed in parallel on Spark. In addition, we develop parallel strategies for improving the performance of the redundant computational procedure and data storage procedure, respectively. Experimental results demonstrate that the parallel algorithm not only achieves high accuracy but also improves the computational efficiency when processing large-scale HSI datasets.

关键词： Hyperspectral computational imaging Spark distributed and parallel processing Tucker3 tensor decomposition

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Provably Good Randomized Strategies for Data Placement in distributed Key-Value Stores 23

Provably Good Randomized Strategies for Data Placement in Di...

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28th ACM SIGPLAN Annual symposium on Principles and Practice of parallel Programming, PPoPP 2023

作者： Wang, Zhe Zhao, Jinhao Agrawal, Kunal Liu, He Xu, Meng Li, Jing Washington University St. Louis United States FoundationDB New Jersey Institute of Technology United States

ISBN: (纸本)9798400700156

distributed storage systems are used widely in clouds, databases, and file systems. These systems store a large amount of data across multiple servers. When a request to access data comes in, it is routed to the appropriate server, queued, and eventually processed. If the server's queue is full, then requests may be rejected. Thus, one important challenge when designing the algorithm for allocating data to servers is the fact that the request pattern may be unbalanced, unpredictable, and may change over time. If some servers get a large fraction of the requests, they are overloaded, leading to many rejects. In this paper, we analyze this problem theoretically under adversarial assumptions. In particular, we assume that the request sequence is generated by an adversarial process to maximize the number of rejects and analyze the performance of various algorithmic strategies in terms of the fraction of the requests rejected. We show that no deterministic strategy can perform well. On the other hand, a simple randomized strategy guarantees that at most a constant fraction of requests are rejected in expectation. We also show that moving data to load balance is essential if we want to reject a very small fraction (1/m where m is the number of servers) of requests. We design a strategy with randomization and data transfer to achieve this performance with speed augmentation. Finally, we conduct experiments and show that our algorithms perform well in practice. © 2023 Owner/Author.

关键词： Data transfer

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VeyMont: parallelising Verified Programs Instead of Verifying parallel Programs 25th

VeyMont: Parallelising Verified Programs Instead of Verifyin...

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25th international symposium on Formal Methods (FM)

作者： Van den Bos, Petra Jongmans, Sung-Shik Univ Twente Formal Methods & Tools Grp Enschede Netherlands Open Univ Dept Comp Heerlen Netherlands CWI Amsterdam Netherlands

ISBN: (纸本)9783031274800;9783031274817

We present VeyMont: a deductive verification tool that aims to make reasoning about functional correctness and deadlock freedom of parallel programs (relatively complex) as easy as that of sequential programs (relatively simple). The novelty of VeyMont is that it "inverts the workflow": it supports a new method to parallelise verified programs, in contrast to existing methods to verify parallel programs. Inspired by methods for distributed systems, VeyMont targets coarse-grained parallelism among threads (i.e., whole-program parallelisation) instead of fine-grained parallelism among tasks (e.g., loop parallelisation).

关键词： Artificial intelligence

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Evaluating Hardware Memory Disaggregation under Delay and Contention 36

Evaluating Hardware Memory Disaggregation under Delay and Co...

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36th IEEE international parallel and distributed Processing symposium (IEEE IPDPS)

作者： Patke, Archit Qiu, Haoran Jha, Saurabh Venugopal, Srikumar Gazzetti, Michele Pinto, Christian Kalbarczyk, Zbigniew Iyer, Ravishankar Univ Illinois Champaign IL 61820 USA IBM Res Yorktown Hts NY USA IBM Res Dublin Ireland

ISBN: (纸本)9781665497473

Hardware memory disaggregation is an emerging trend in datacenters that provides access to remote memory as part of a shared pool or unused memory on machines across the network. Memory disaggregation aims to improve memory utilization and scale memory-intensive applications. Current stateof-the-art prototypes have shown that hardware disaggregated memory is a reality at the rack-scale. However, the memory utilization benefits of memory disaggregation can only be fully realized at larger scales enabled by a datacenter-wide network. Introduction of a datacenter network results in new performance and reliability failures that may manifest as higher network latency. Additionally, sharing of the network introduces new points of contention between multiple applications. In this work, we characterize the impact of variable network latency and contention in an open-source hardware disaggregated memory prototype - ThymesisFlow. To support our characterization, we have developed a delay injection framework that introduces delays in remote memory access to emulate network latency. Based on the characterization results, we develop insights into how reliability and resource allocation mechanisms should evolve to support hardware memory disaggregation beyond rack-scale in datacenters.

关键词： distributed processing Conferences Prototypes Market research Hardware Delays Reliability

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Cutting a Wire with Non-Maximally Entangled States

Cutting a Wire with Non-Maximally Entangled States

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1st international Conference on Smart Energy systems and Artificial Intelligence (SESAI)

作者： Bechtold, Marvin Batten, Johanna Leyrnann, Frank Mandl, Alexander Univ Stuttgart Inst Architecture Applicat Syst Univ Str 38 D-70569 Stuttgart Germany

ISBN: (纸本)9798350364613;9798350364606

distributed quantum computing supports combining the computational power of multiple quantum devices to overcome the limitations of individual devices. Circuit cutting techniques enable the distribution of quantum computations via classical communication. These techniques involve partitioning a quantum circuit into smaller subcircuits, each containing fewer qubits. The original circuit's outcome can be replicated by executing these subcircuits on separate devices and combining their results. However, the number of circuit executions required to achieve a fixed result accuracy with circuit cutting grows exponentially with the number of cuts, posing significant costs. In contrast, quantum teleportation allows the distribution of quantum computations without an exponential increase in circuit executions. Nevertheless, each teleportation requires a pre-shared pair of maximally entangled qubits for transmitting a quantum state, and non-maximally entangled qubits cannot be used for this purpose. Addressing this, our work explores utilizing non maximally entangled qubit pairs in wire cutting, a specific form of circuit cutting, to mitigate the associated costs. The cost of this cutting procedure reduces with the increasing degree of entanglement in the pre-shared qubit pairs. We derive the optimal sampling overhead in this context and present a wire cutting technique employing pure non-maximally entangled slates that achieves this optimal sampling overhead. Hence, this offers a continuum between existing wire cutting and quantum teleportation.

关键词： distributed Quantum Computing Circuit Cutting Quantum Teleportation Entanglement

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FLEXLOG: A Shared Log for Stateful Serverless Computing 23

FLEXLOG: A Shared Log for Stateful Serverless Computing

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32nd international symposium on High-Performance parallel and distributed Computing (HPDC) part of the ACM Federated Computing Research Conference (FCRC)

作者： Giantsidi, Dimitra Giortamis, Emmanouil Tornow, Nathaniel Dinu, Florin Bhatotia, Pramod Univ Edinburgh Edinburgh Midlothian Scotland Tech Univ Munich Munich Germany Huawei Munich Res Ctr Munich Germany

ISBN: (纸本)9798400701559

Stateful serverless applications need to persist their state and data. The existing approach is to store the data in general purpose storage systems. However, these approaches are not designed to meet the demands of serverless applications in terms of consistency, fault tolerance and performance. We present FlexLog, a storage system, specifically a distributed sharedlog, distinctively designedtomeet the requirements of stateful serverless computing while mitigating the relevant system bottlenecks. FlexLog's data layer leverages the state-of-the-art persistent memory (PM) to offer low latency I/O and improve performance. To match the performance, FlexLog's ordering layer employs a scalable design, namely a tree-structure set of sequencer nodes. Importantly, this design provides serverless applications with the flexibility to implement different consistency guarantees and to seamlessly support multi-tenancy configurations. We implement FlexLog from the ground up on a real hardware testbed and we also prove the correctness of our protocols. In particular, we evaluate FlexLog on a cluster of 6 machines with 800 GB Intel Optane DC PM over a 10 Gbps interconnect. Our evaluation shows that FlexLog scales to millions of operations per second while maintaining minimal latency. Our comparison with the state-of-the-art shared log for serverless, Boki, shows that we achieve 10x better throughput in the storage layer and 2x-4x lower latency in the ordering layer, while also providing flexibility to support different consistency properties and multi-tenancy.

关键词： Serverless Computing Shared distributed Log Persistent Memory

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