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Dynamic Resource Management for Elastic Scientific Workflows using PMIx

Dynamic Resource Management for Elastic Scientific Workflows...

引用

IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Rajat Bhattarai Howard Pritchard Sheikh Ghafoor Department of Computer Science Tennessee Tech University Cookeville Tennessee HPC Division Los Alamos National Laboratory Los Alamos New Mexico

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

In current scientific workflows, the computational needs of tasks might not be known when it is submitted to a system for execution. Current resource management (RM) systems and workflow managers (WFMs) provide limited support for dynamic resource allocation in HPC systems, thus the common approach is to request the maximum resources needed for a maximum time, potentially wasting resources. However, in some cases, maximum resources may not be estimated a priori, as a result, a workflow may be completed after the deadline, or in cases, the task may terminated by the resource manager. A combination of workflow manager and resource management system that can accommodate a fine-grain elastic resource allocation during the execution of a workflow would alleviate this problem. This paper presents a dynamic elastic resource management framework based on the Parsl workflow manager and PMIx-enabled SLURM and reports the early evaluation of the framework using two workflow applications.

关键词： distributed processing Runtime Conferences Prototypes Dynamic scheduling Resource management Task analysis

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Benchmarking Variables for Checkpointing in HPC Applications

Benchmarking Variables for Checkpointing in HPC Applications

引用

IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Xiang Fu Xin Huang Wubiao Xu Weiping Zhang Shiman Meng Luanzheng Guo Kento Sato Nanchang Hangkong University Pacific Northwest National Laboratory R-CCS RIKEN

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

Checkpoint/Restart (C/R) is a widely used fault tolerance mechanism in converged systems of cloud, edge, and HPC. However, users often rely on their experience to determine which variables to checkpoint, as there is currently no benchmark that can provide a reference. This can result in checkpointing redundant or even incorrect variables. To address this issue, we propose a benchmark suite that includes critical variables for checkpointing, which have been manually identified, and a method for identifying those critical variables, with 20 representative HPC applications. Our method involves analyzing data dependency between variables to identify critical variables analytically. We verify the identified variables' correctness with a widely used C/R library FTI by an ablation study. With our benchmark suite and data dependency analysis, HPC practitioners now have a reference for identifying checkpointing variables and better knowledge of what kind of variables to checkpoint.

关键词： Checkpointing Fault tolerance distributed processing Automation Conferences Fault tolerant systems Buildings

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Low latency PBFT parallel consensus for IoT blockchain platform

Low latency PBFT parallel consensus for IoT blockchain platf...

引用

international symposium on Object-Oriented Real-Time distributed Computing

作者： Rabeb Ben Othmen Wassim Abbessi Sofiane Ouni Wafa Badreddine Gilles Dequen CRISTAL Lab RAMSIS Team (ENSI) University of Manouba Manouba Tunisia Laboratoire Modelisation Information Systemes (MIS) Université de Picardie Jules Verne Amiens France

ISBN: (数字)9798350371284

ISBN: (纸本)9798350371291

With the success of blockchains for providing a high security platform for distributed systems, new challenges are presented in relation with the deployment of this technology for IoT applications with time constraints. In this paper, we present a new lightweight blockchain platform that is scalable to hold a large number of transactions and with acceptable latency times. We have designed a new rapid consensus algorithm that improves PBFT to apply it in a random cluster with a small number of Miners. This will enable multiple consensus on different clusters to be executed in parallel to reduce the complexity of PBFT, have acceptable latency and increase the scalability. The evaluations carried out on our proposal by comparing it with other pipeline PBFT improvement approaches, show that our approach has better latency that is still accessible even with a high load of transactions.

关键词： Scalability Pipelines Real-time systems Blockchains Proposals Internet of Things Security

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parallel Real-time Simulation on Commodity Hardware with Reusable Power System Models 25

Parallel Real-time Simulation on Commodity Hardware with Reu...

引用

25th IEEE/ACM international symposium on distributed Simulation and Real Time Applications (DS-RT)

作者： Eidenbenz, Raphael Franke, Carsten Larsson, Mats Moga, Alexandru Sivanthi, Thanikesavan Hitachi ABB Power Grids Res Zurich Switzerland Munich Univ Appl Sci Munich Germany Hitachi ABB Power Grids Zurich Switzerland ABB Corp Res Baden Switzerland

ISBN: (纸本)9781665433266

This paper proposes a real-time power system simulation framework that is capable of simulating steady state and electromechanical transients of power systems, with submillisecond time resolution. The framework can integrate power system component models packed as reusable Functional Mockup Units (FMUs) to flexibly create power system simulations without the need to recreate new models for different power systems. The integration of individual components is based on a novel model decomposition method, which enables the FMU reuse in different system contexts, as well as a parallel simulation execution onto multi-core machines. Furthermore, the paper proposes methods to optimize the allocation of components to cores and shows that the framework can simulate a medium voltage distributed electrical grid of about 20 components in real-time on a commodity multi-core machine.

关键词： Multicore processing Power system simulation Medium voltage Real-time systems Hardware Power systems Steady-state

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Combining Lossy Compression with Multi-Level Caching for Data Staging over Network

Combining Lossy Compression with Multi-Level Caching for Dat...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Rei Aoyagi Keichi Takahashi Yoichi Shimomura Hiroyuki Takizawa Graduate School of Information Sciences Tohoku University Sendai Japan Cyberscience Center Tohoku Uniersity Sendai Japan

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

Researchers conduct post-processing on the simulation results by running an interactive data analysis tool on a High-Performance Computing (HPC) system installed at an HPC center and retrieving the post-processed results. Certain data analysis scenarios require to transfer the simulation results directly from the center. In such scenarios, a portion of the data would usually be streamed over the network to achieve interactivity. However, there still exist two challenges in maintaining interactivity: (1) limited network bandwidth and (2) long network latency. To tackle these challenges, we propose a system to enable interactive array analysis over the network. We employ error-bounded lossy compression to increase the effective network bandwidth. Furthermore, we employ multilevel caching to hide the network latency and combine prefetching to improve the cache hit ratio. The cache replacement and prefetching policies are designed considering the data access pattern of interactive analysis. We compared our proposed system with TileDB, one of the state-of-the-art array databases, by measuring the average latency for various access patterns. Compared to TileDB, the proposed system reduces the average latency by up to 91.6% by allowing 10% of error because the cache hit ratio was improved by more than 40% due to the proper cache replacement and prefetching policy and network transfer time was reduced more than 75% by using lossy compression.

关键词： Data analysis databases Prefetching Simulation Heuristic algorithms High performance computing Bandwidth

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PNS Lock: A Portable NUMA-Aware Lock with a Standard Interface

PNS Lock: A Portable NUMA-Aware Lock with a Standard Interfa...

引用

parallel Computing and distributed systems (PCDS), international symposium on

作者： Brahmaiah Gandham Praveen Alapati Computer Science and Engineering Ecole Centrale School of Engineering Mahindra University Hyderabad India

ISBN: (数字)9798350349658

ISBN: (纸本)9798350349665

In shared memory programming, there is a need for synchronization primitives that are suitable for modern hardware to achieve high performance and reduce contention. This paper introduces a novel lock with a standard interface, namely, the PNS Lock. It is a lock for Non-Uniform Memory Access (NUMA) architectures and uses one queue for each NUMA node. PNS lock uses atomic operation for lock handovers between NUMA nodes. This design helps to get better performance by minimizing cross-node communication and contention. PNS lock intelligently adapts to the underlying system topology. This paper discusses the design of a PNS lock and compares it's performance by considering the state-of-the-art synchronization objects. PNS lock also provides a standard interface and ensures seamless integration with existing multi-threaded applications. From the experimental evaluation, it is observed that PNS lock helps to enhance the performance and increases the cache hit rate. This synchronization primitive, PNS lock is a great tool for the developers in NUMA environments.

关键词： Memory architecture Handover Programming parallel processing Data structures Topology Synchronization Servers Standards Optimization

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Implementing Censorship-Resistant Trusted Email Using Blockchain Technology

Implementing Censorship-Resistant Trusted Email Using Blockc...

引用

parallel Computing and distributed systems (PCDS), international symposium on

作者： Yasushi Shinjo Taiki Watanabe Yi Zhou Kazuki Takarada Masahiro Nakamura Department of Computer Science University of Tsukuba Tsukuba Ibaraki Japan

ISBN: (数字)9798350349658

ISBN: (纸本)9798350349665

Currently, widely used email based on the Simple Mail Transfer Protocol (SMTP) is vulnerable to malware attacks because digital signatures are not widely adopted. Huge email service providers have immense authority to censor, monitor, and suspend email accounts. To solve these problems, this paper describes the implementation of trusted email using the blockchain technology Ethereum. In the proposed method, the addresses of blockchain wallets are used as email addresses. The host sending and receiving email registers a local surrogate user that corresponds one-to-one with each wallet address. Users and application developers can use existing programs to send and receive emails to / from local surrogate users and to exchange emails without the cumbersome digital signature procedures. This paper describes an inquiry application using the implemented trusted email. In this inquiry application, unlike conventional web applications, form submission and response reply are completed only by email.

关键词： Protocols Transfer functions parallel processing Malware Electronic mail Blockchains Registers Digital signatures Monitoring Postal services

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Modified Voltage Controlled -Virtual Synchronous Machine Controller in the application of parallel Connected Grid -Forming Inverters 12

Modified Voltage Controlled -Virtual Synchronous Machine Con...

引用

IEEE 12th international symposium on Power Electronics for distributed Generation systems (PEDG)

作者： Chowdhury, Prithwiraj Roy Shoubaki, Ehab Manjrekar, Madhav Univ N Carolina Elect & Comp Engn Charlotte NC 28223 USA

ISBN: (纸本)9781665404655

Renewable distributed Energy Resources (DERs) are on track to dominate in near future, mitigating the evergrowing energy demand. DERs mostly interact with the grid through power electronic converters, whereas traditional power grid's power operations are controlled by Synchronous Machines (SMs). With more DERs coming into the picture and contributing an increasing portion of power flow, the power control architecture of the grid must be revisited. There are many benefits of using a Voltage Controlled-Virtual Synchronous Machine (VC-VISMA) controller, such as communication-less cooperation between power sources achieving tight regulation of grid voltage and frequency. But a major disadvantage of this controller is it cannot operate under conditions where the central grid is absent, such as black-start. In this paper, a modified VC-VISMA or Dropped VISMA (DVSM) is proposed aiming to control voltage and frequency even under black start. The performance of this modified controller is validated in MATLAB/Simulink.

关键词： grid-forming inverters synchronous generator virtual inertia secure communication droop control black-start

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Efficient Erasure-Coded Data Recovery Based on Machine Learning With a Low Level of Storage Overhead

Efficient Erasure-Coded Data Recovery Based on Machine Learn...

引用

international symposium on parallel and distributed Processing with Applications, ISPA

作者： Xiaobo Zhao Bing Wei Ning Luo Qian Chen Yi Wu Shudong Zhang Lijuan Zhou School of Cyberspace Security Hainan University Haikou China School of International Communication and Arts Hainan University Haikou China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

distributed storage systems typically use erasure codes for fault tolerance to reduce storage overhead. However, the data repair process in erasure-coded systems can generate heavy I/O overhead. Existing methods typically increase redundancy to improve repair speed, but this approach results in substantial storage overhead. To enhance repair speed while reducing storage costs, this paper proposes a Machine Learning-based Adaptive Recovery (MLAR) method. Given an application’s access patterns for a file, MLAR uses an adaptive encoding model to calculate the optimal code for each file. When applying fault tolerance with the optimal code, lower-redundancy codes can achieve faster repair speeds than higher-redundancy codes. MLAR employs machine learning to predict file access patterns. Experimental results replaying real-world I/O workloads show that, MLAR reduces storage overhead by 12.8% and recovery time by 23.7%, compared to state-of-the-art methods.

关键词： Fault tolerance distributed processing Codes Costs Fault tolerant systems Termination of employment Machine learning Maintenance engineering Encoding Pattern recognition

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Research on Data Classification Based on LNDS-SVDD

Research on Data Classification Based on LNDS-SVDD

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international symposium on Autonomous systems (ISAS)

作者： Yiwei Yuan Qiming Xue Yuan Cao Yingmin Yi Lei Bai Faculty of Automation and Information Engineering Xi'an University of Technology Shaanxi Xian China Department of Electrical Engineering Shanxi Polytechnic Institute Xianyang Key Laboratory of New Energy and Microgrid System Xianyang China

ISBN: (数字)9798350363173

ISBN: (纸本)9798350363180

Due to the high dimension of industrial process data, there are aliasing areas when building hyper-spheres of different types of data by the SVDD algorithm, which will lead to inaccurate results in condition identification. A data classification method based on Local Neighbor Density Similarity Support Vector Data Description (LNDS-SVDD) is proposed to address this issue. Utilizing the local similar density in discriminating data similarity, the LNDS-SVDD can further judge the classification of samples distributed in the aliasing area using the density information. In this paper, a randomly generated synthetic data set and a real industrial process data set is used for simulating the proposed data classification algorithm. The results indicate that the classification accuracy is high, which is an effective condition identification method for the industrial process.

关键词： Autonomous systems Buildings distributed databases Vectors Classification algorithms Synthetic data

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