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Booster: An Accelerator for Gradient Boosting Decision Trees Training and Inference

Booster: An Accelerator for Gradient Boosting Decision Trees...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Mingxuan He Mithuna Thottethodi T. N. Vijaykumar Elmore Family School of ECE Purdue University West Lafayette IN USA

Recent breakthroughs in machine learning (ML) have sparked hardware innovation for efficient execution of the emerging ML workloads. For instance, due to recent refine-ments and high-performance implementations, well-established gradient boosting decision tree (GBT) models (e.g., XGBoost) have demonstrated their dominance in commercially-important contexts, such as table-based datasets (e.g., relational databases and spreadsheets). Unfortunately, GBT training and inference are time-consuming (e.g., several hours of training for large datasets). Despite their importance, GBTs have not been targeted for hardware acceleration as much as neural networks. We propose Booster, a novel accelerator for GBTs based on their unique characteristics. We observe that the dominant steps of GBT training and inference (accounting for 90-98% of time) involve simple, fine-grained, independent operations on small-footprint data structures (e.g., histograms and shallow trees) - i.e., GBT is on-chip memory bandwidth-bound. Unfortunately, existing multicores and GPUs do not support massively-parallel data structure accesses that are irregular and data-dependent. By employing a scalable sea-of-small-SRAMs approach and an SRAM bandwidth-preserving mapping of data record fields to the SRAMs called group-by-field mapping, Booster achieves significantly more parallelism (e.g., 3200-way parallelism) than multicores and GPUs. In addition, Booster employs a redun-dant data representation that significantly lowers the memory bandwidth demand. Our simulations reveal that Booster achieves 11.4x and 6.4x speedups for training, and 45x and 22x (21x and 11x) speedups for offline (online) inference, over an ideal 32-core multicore and an ideal GPU, respectively. Based on ASIC synthesis of FPGA-validated RTL using 45 nm technology, we estimate a Booster chip to occupy 60 mm 2 of area and dissipate 23 W when operating at 1-G Hz clock speed.

关键词： Training Histograms Multicore processing Graphics processing units parallel processing Boosting Data structures

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Retrospective: A Look Back at 20+Years of Experience in parallel Computing Education 34

Retrospective: A Look Back at 20+Years of Experience in Para...

引用

34th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Adams, Joel C. Calvin Univ Dept Comp Sci Grand Rapids MI 49546 USA

ISBN: (纸本)9781728174457

The author has been teaching parallel computing since the late 1990s. This paper provides a brief history of some of the key experiences in his journey as a parallel computing educator, including formative faculty development workshops, technology shifts, NSF-sponsored projects, and courses taught. By reading this history, the reader may see how much has changed over the past two decades, and so gain insight into how to prepare for changes to parallel computing education in the future.

关键词： beowulf cluster computer science education high performance history multicore parallel software supercomputing

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Exploiting Reduced Precision for GPU-based Time Series Mining

Exploiting Reduced Precision for GPU-based Time Series Minin...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Yi Ju Amir Raoofy Dai Yang Erwin Laure Martin Schulz Max Plank Computing and Data Facility Technical University of Munich NVIDIA GmbH

The mining of multi-dimensional time series is a crucial step in gaining insights into data obtained from physical systems and from monitoring infrastructures. A widely accepted approach for this challenge is the matrix profile, which, however, is computationally very expensive. It relies on calculating large correlation matrices coupled with sort operations across all dimensions of the data, as well as on performing inclusive scans. All of these steps are inherently data parallel and can, therefore, benefit from execution on GPUs, and even more so from horizontal scaling on multiple GPUs. In addition, the nature of the matrix profile calculation allows the exploitation of reduced precision on GPUs. This offers further improvements to enable the analysis of ever growing data sets in real-world scenarios. Based on these motivations, we introduce the first parallel algorithm for multi-dimensional matrix profile on multiple GPUs exploiting reduced precision modes and provide a highly opti-mized implementation using novel optimization techniques. On one NVIDIA A100 GPU, our implementation achieves a 54x performance improvement in comparison to an optimized single-node execution on a state-of-the-art CPU-based implementation relying on double-precision computation and an additional factor of 1.4x when switching to reduced precision while maintaining sufficient accuracy. We study the accuracy and performance trade-offs for our proposed algorithm in detail and present synthetic and real-world case studies to demonstrate how the reduced precision improves the performance, while accomplishing sufficiently accurate results.

关键词： Time series analysis Layout Graphics processing units Switches Data mining Synchronization parallel algorithms

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Co-Designing an OpenMP GPU Runtime and Optimizations for Near-Zero Overhead Execution

Co-Designing an OpenMP GPU Runtime and Optimizations for Nea...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Johannes Doerfert Atemn Patel Joseph Huber Shilei Tian Jose M Monsalve Diaz Barbara Chapman Giorgis Georgakoudis Argonne National Laboratory LemontUSA University of Waterloo Waterloo Ontario Canada Oak Ridge National Laboratory Oak RidgeUSA Stony Brook University Stony Brook USA Lawrence Livermore National Laboratory LivermoreUSA

GPU accelerators are ubiquitous in modern HPC systems. To program them, users have the choice between vendor-specific, native programming models, such as CUDA, which provide simple parallelism semantics with minimal runtime support, or portable alternatives, such as OpenMP, which offer rich parallel semantics and feature an extensive runtime library to support execution. While the operations of such a runtime can easily limit performance and drain resources, it was to some degree regarded an unavoidable overhead. In this work we present a co-design methodology for optimizing applications using a specifically crafted OpenMP GPU runtime such that most use cases induce near-zero overhead. Specifically, our approach exposes runtime semantics and state to the compiler such that optimization effectively eliminating abstractions and runtime state from the final binary. With the help of user provided assumptions we can further optimize common patterns that otherwise increase resource consumption. We evaluated our prototype build on top of the LLVM/OpenMP GPU offloading infrastructure with multiple HPC proxy applications and benchmarks. Comparison of CUDA, the original OpenMP runtime, and our co-designed alternative show that, by our approach, performance is significantly improved and resource consumption is significantly lowered. Oftentimes we can closely match the CUDA implementation without sacrificing the versatility and portability of OpenMP.

关键词： distributed processing Runtime Codes Runtime library Semantics Graphics processing units Prototypes

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Sensor Pods and ROS2-TMS for Construction for Cyber-Physical System at Earthwork Sites

Sensor Pods and ROS2-TMS for Construction for Cyber-Physical...

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IEEE international Workshop on Safety, Security, and Rescue Robotics (SSRR)

作者： Ryuichi Maeda Tomoya Kouno Kohei Matsumoto Yuichiro Kasahara Tomoya Itsuka Kazuto Nakashima Yusuke Tamaishi Ryo Kurazurne Graduate School of Information Science and Electrical Engineering Kyushu University Fukuoka Japan Faculty of Information Science and Electrical Engineering Kyushu University Fukuoka Japan Tamaishi Juki Co. Ltd. Fukuoka Japan

ISBN: (数字)9798331510954

ISBN: (纸本)9798331510961

In this study, we propose distributed sensor ter-minals named “Sensor Pods” and “Petit-Sensor Pods”, and a Cyber-Physical System (CPS) platform named “ROS2-TMS for Construction” that aims to improve both the efficiency and safety of earthwork operations. The proposed system collects on-site environmental information, stores it in a database, and visualizes it using virtual reality (VR). To evaluate the system's performance in environments simulating real-world earthwork operations, two types of experiments were conducted. In the first experiment, the integrated system of the Sensor Pods and ROS2-TMS for Construction successfully demonstrated the collection of environmental information, its storage, and visualization through VR. The results indicate that the proposed system has significant potential to provide a comprehensive understanding of on-site conditions. In the second experiment, the performance of the Petit-Sensor Pods was verified, confirming its proper functionality and suggesting expanded possibilities for the future use of ROS2- TMS for Construction. This paper presents the developed system and the experiments conducted to assess its performance. A demonstration video is available at: https: / /youtu. be/u4Jo-dU4ewo/.

关键词： Visualization System performance Virtual reality Cyber-physical systems Robot sensing systems Safety Visual databases Security

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A GPU-Accelerated Barycentric Lagrange Treecode 34

A GPU-Accelerated Barycentric Lagrange Treecode

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34th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Vaughn, Nathan Wilson, Leighton Krasny, Robert Univ Michigan Dept Math Ann Arbor MI 48109 USA

ISBN: (数字)9781728174457

ISBN: (纸本)9781728174457

We present an MPI + OpenACC implementation of the kernel-independent barycentric Lagrange treecode (BLTC) for fast summation of particle interactions on GPUs. The distributed memory parallelization uses recursive coordinate bisection for domain decomposition and MPI remote memory access to build locally essential trees on each rank. The particle interactions are organized into target batch/source cluster interactions which efficiently map onto the GPU;target batching provides an outer level of parallelism, while the direct sum form of the barycentric particle-cluster approximation provides an inner level of parallelism. The GPU-accelerated BLTC performance is demonstrated on several test cases up to 1 billion particles interacting via the Coulomb potential and Yukawa potential.

关键词： Heterogeneous (hybrid) systems Graphics processors Load balancing and task assignment Interpolation Numerical algorithms parallel algorithms Chebyshev approximation and theory Integral Equations

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Mithril: A Scalable System for Deep GNN Training

Mithril: A Scalable System for Deep GNN Training

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IEEE symposium on High-Performance Computer Architecture

作者： Jingji Chen Zhuoming Chen Xuehai Qian Purdue University Carnegie Mellon University Tsinghua University

ISBN: (数字)9798331506476

ISBN: (纸本)9798331506483

Communication is a key bottleneck for distributed graph neural network (GNN) training. Existing GNN training systems fail to scale to deep GNNs because of the tremendous amount of inter-GPU communication. This paper proposes Mithril, a new approach that significantly scales the distributed full-graph deep GNN training. Being the first to use layer-level model parallelism for GNN training, Mithril partitions GNN layers among GPUs, each device performs the computation for a disjoint subset of consecutive GNN layers on the whole graph. Compared to graph parallelism with each GPU handling a graph partition, Mithril reduces the communication volume by a factor of the number of GNN layers to scale to deep models. Mithril overcomes the unique challenges for pipelined layer-level model parallelism on the whole graph by partitioning it into dependent chunks, breaking the dependencies with embedding speculation, and applying specific training techniques to ensure convergence. We also propose a hybrid approach by combining Mithril with graph parallelism to handle large graphs, achieve better computer resource utilization and ensure model convergence. We build a general GNN training system supporting all three parallelism settings. Extensive experiments show that Mithril reduces the perepoch communication volume by up to $22.89 \times$ (on average $6.78 \times$). It achieves a maximum training time speedup of $2.34 \times$ (on average $1.49 \times$) on a GPU cluster with a high-performance InfiniBand network. On another cluster with a commodity Ethernet, Mithril outperforms the baseline by up to $10.21 \times$ (on average $7.16 \times$). Mithril also achieves a comparable level of model accuracy and convergence speed compared to graph parallelism.

关键词： Training Performance evaluation Solid modeling Accuracy Computational modeling Graphics processing units parallel processing Graph neural networks Resource management Convergence

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Feedback from a data center for education at CentraleSupélec engineering school

Feedback from a data center for education at CentraleSupéle...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Jé ré my Fix Stephane Vialle Ré mi Hellequin Claudine Mercier Patrick Mercier Jean-Baptiste Tavernier LORIA CNRS Universit&#x00E9 de Lorraine CentraleSup&#x00E9 lec Gif-sur-Yvette France LISN CNRS Universit&#x00E9 Paris-Saclay CentraleSup&#x00E9 Information systems department CentraleSup&#x00E9

ISBN: (数字)9781665497473

ISBN: (纸本)9781665497480

This paper describes the hardware and software architecture of the Data Center for Education (DCE) built up at CentraleSupélec as well as our educational objectives. Students experiment in the context of their studies with clusters of CPU and servers of GPU. They have different technical backgrounds from beginners to experts in computer science. The lectures have also different experimental requirements: from single host long running jobs for machine learning to multiple hosts short running HPC algorithms benchmarks, with lab works and projects that need to share the same pool of machines.

关键词： Data centers distributed processing Machine learning algorithms Software architecture Education Graphics processing units Machine learning

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DTS: A Simulator to Estimate the Training Time of distributed Deep Neural Networks

DTS: A Simulator to Estimate the Training Time of Distribute...

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international symposium on Modeling, Analysis and Simulation of Computer and Telecommunication systems (MASCOTS)

作者： Wilfredo J. Robinson M. Flavio Esposito Maria A. Zuluaga Computer Science Department Saint Louis University USA Data Science Department Eurecom France

Deep Neural Networks (DNNs) process big datasets achieving high accuracy on incredibly complex tasks. However, this progress has led to a scalability impasse, as DNNs require massive amounts of processing power and local memory to be trained, making them impossible or impractical to be used on a single device. This situation has led to the design of distributed training architectures, where the DNN and the training data can be split among multiple processors. How to choose the appropriate distributed training architecture, however, remains an open question. To help bring insights into this debate, in this work we design a distributed Training Simulator (DTS) that estimates the training time of a DNN in a distributed architecture through a mathematical model of the distributed architecture and resource-allocation heuristics. We illustrate the power of the proposed DTS through the implementation of five different distributed architectures, Pipeline Learning, Federated Learning, Split Learning, parallel Split Learning, and Federated Split Learning, and we validate the accuracy of the training estimates using three different datasets of varying complexity and two different DNNs. Finally, we present a trade-off analysis to demonstrate the coherence of DTS estimates for diverse high-performance computing scenarios by comparing these estimates with the behaviors of a real computer cluster.

关键词： Training Deep learning Analytical models Program processors Computational modeling Scalability Neural networks

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Applying distributed application global states monitoring to speculative query processing in RDBMS 19

Applying distributed application global states monitoring to...

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19th international symposium on parallel and distributed Computing (ISPDC)

作者： Sasak-Okon, Anna Tudruj, Marek Univ Maria Curie Sklodowska Lublin Poland Polish Acad Sci Inst Comp Sci Polish Japanese Acad Informat Technol Warsaw Poland

ISBN: (纸本)9781728189468

The paper is concerned with the methodology for speculative query execution support in distributed Relational Database Management systems (RDBMS). The proposed approach is based on the analysis of the multigraph representations of the stream of input queries arriving to a RDBMS. As a result, the optimized set of speculative queries is found to support execution of current queries. The speculative query results are used to speed-up execution of the query input stream. The paper presents how the proposed speculative query execution approach can be implemented inside a novel distributed program design framework PEGASUS DA in which program execution decisions are taken based on the system-supported monitoring of the distributed application global states. The paper shows the architecture of the speculative support provided by such framework for the distributed RDBMS and the assumed speculation approach. The implementation issues of the multi-threaded distributed support based on the RDBMS SQLite engines are discussed. distributed data synchronization and speculative query execution strategy as well as speculation results distribution are discussed. The proposed approach to distributed implementation of the speculative support to RDBMSs using the PEGASUS DA framework is illustrated on the example of the modifying query handling in a RDBMS facing the presented speculative query support for query execution.

关键词： speculative query execution global states monitoring distributed database

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