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检索条件"任意字段=International Symposium on Parallel Architectures, Algorithms, and Programming"

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Cover model: a framework for design and execution of distributed applications

Cover model: a framework for design and execution of distrib...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： V.P. Ivannikov K.V. Dyshlevoi V.E. Kamensky A.V. Klimov S.G. Manzheley V.A. Omelchenko L.B. Solovskaya A.A. Vinokurov Institute for System Programming Russian Academy of Science Moscow Russia

Many problems of distributed object-oriented applications can be uniformly resolved in the frame of approach based on the concept of cover. The cover is defined as an environment that transparently controls all aspects of object's community, life: creation, interaction etc. To enable transparency, an object-oriented application must obey a principle of late binding, a reference to server object being obtained by the client at run time from a system environment. To implement cover services, the technique of metaobject control is applied, which provides extensions of program's semantics without changing the program code, by means of attaching additional method calls to each application object invocation. A special language (TL) in which the user can incrementally define new metaservices is described and illustrated by numerous examples.

关键词： Computer languages Runtime Control systems Dynamic programming Object oriented programming Object oriented modeling Joining processes Context Debugging Communication system control

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Radix R parallel FFT algorithms with a global interconnection networks and its evaluation

Radix R parallel FFT algorithms with a global interconnectio...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： T. Taketa K. Tanno S. Horiguchi Department of Electrical and Information Engineering Yamagata University Japan School of Information Science Japan Advanced Institute of Science and Technology Japan

In order to efficiently compute Fast Fourier transform (FFT) various parallel algorithms and their implementation to multiprocessors and multicomputers have been developed. In general, the local interconnection network is more high speed than a global one, but its capability depends on network architecture. On the other hand, the global interconnection network is not so high speed, but it does not depends on network architecture. It provides a flexible communication interface to the programmer. In this paper, we discuss parallel radix R FFT algorithms on a multiprocessor or multicomputer system with a global interconnection network. We propose two algorithms a stage-by-stage method and a multi-stage method. We also estimate the communication time. Then we show that the communication time is very sensitive to and affected by data exchange strategy. Finally, we implement these algorithms on two commercial massively parallel computers (nCUBE/2 and CM5) and measure the communication time.

关键词： Multiprocessor interconnection networks Signal processing algorithms Concurrent computing Computer networks Computer architecture Clustering algorithms Fast Fourier transforms parallel algorithms programming profession Information science

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MediaBench: A tool for evaluating and synthesizing multimedia and communications systems

MediaBench: A tool for evaluating and synthesizing multimedi...

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30th Annual IEEE/ACM international symposium on Microarchitecture (MICRO-30)

作者： Lee, CH Potkonjak, M Mangione-Smith, WH Univ Calif Los Angeles Dept Comp Sci Los Angeles CA 90024 USA

ISBN: (纸本)0818679778

Over the last decade, significant advances have been made in compilation technology for capitalizing on instruction-level parallelism (ILP). The vast majority of ILP compilation research has been conducted in the context of general-purpose computing, and more specifically the SPEC benchmark suite. At the same time, number of microprocessor architectures have emerged which have VLIW and SIMD structures that are well matched to the needs of the ILP compilers. Most of these processors are targeted at embedded applications such as multimedia and communications, rather than general-purpose systems. Conventional wisdom, and a history of hand optimization of inner-loops, suggests that ILP compilation techniques are well suited to these applications. Unfortunately, there currently exists a gap between the compiler community and embedded applications developers. This paper presents MediaBench, a benchmark suite that has been designed to fill this gap. This suite has been constructed through a three-step process: intuition and market driven initial selection, experimental measurement to establish uniqueness, and integration with system synthesis algorithms to establish usefulness.

关键词： parallel processing systems

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6th international Conference on Evolutionary programming, EP 1997

6th International Conference on Evolutionary Programming, EP...

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6th international Conference on Evolutionary programming, EP 1997

ISBN: (纸本)9783540627883

The proceedings contain 37 papers. The special focus in this conference is on Evolutionary Methods for Modeling, Training and Alternative Frameworks for the Computational Study of Evolutionary Social Systems. The topics include: Complexity formalisms, order and disorder in the structure of art;the application of evolutionary computation to selected problems in molecular biology;parallel evolutionary programming for constructing artificial neural networks;scaling behavior of the evolution strategy when evolving neuronal control architectures for autonomous agents;an object oriented simulation platform applied to markets and organizations;an agent-based computational model for the evolution of trade networks;performance-enhanced genetic programming;comparing subtree crossover with macromutation;composing 16th-century counterpoint with genetic programming and symbiosis;design of a high-gain operational amplifier and other circuits by means of genetic programming;modeling speculators with genetic programming;fast evolution strategies;airspace congestion smoothing by stochastic optimization;evolutionary optimization based on lagrangian with constraint scaling;solving static and dynamic fuzzy constraint networks using evolutionary hill-climbing;applying family competition to evolution strategies for constrained optimization;supporting polyploidy in genetic algorithms using dominance vectors;an individually variable mutation-rate strategy for genetic algorithms;inductive learning of mutation step-size in evolutionary parameter optimization;a note on the escape probabilities for two alternative methods of selection under gaussian mutation;raising theoretical questions about the utility of genetic algorithms;some geometric and algebraic results on crossover and an analysis of evolutionary algorithms based on neighborhood and step sizes.

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An operation placement and scheduling scheme for cache and communication localities in fine-grain parallel architectures

An operation placement and scheduling scheme for cache and c...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： Yen-Kuang Chen S.Y. Kung Department of Electrical Engineering Princeton University USA

With increasing on-chip hardware, concurrency is a way to bridge the gap between the computational power demanded by the applications and that afforded by the computer platforms. Although parallel systems are increasingly popular they remain very difficult to program. In fact, most compilers require the programmer to specify how to partition data or map program code to the system's processors. To ensure an effective program, cache locality is important because of the large speed gap between microprocessors and memory systems. It is also important to make use of local communication whenever possible, since it is cheaper faster and less power hungry than global communication. In order to exploit these locality properties, we present a systematic operation placement and scheduling scheme for fine-grain parallel architectures. The key advantages are twofolds: (1) This multiprojection method, which deals with multidimensional parallelism systematically, can alleviate the burden of the programmer in coding and data partitioning. (2) it addresses the memory/communication bandwidth bottleneck, and can lend to faster program execution. On a special design example of the motion estimation block-matching algorithm, which requires the most intensive computation and memory accesses in video coding, our method lends to a reduction of external memory accesses by two to three orders of magnitude.

关键词： Processor scheduling programming profession Hardware Concurrent computing Bridges Application software Program processors Microprocessors Global communication parallel architectures

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Efficient implementation of software release consistency on asymmetric distributed shared memory

Efficient implementation of software release consistency on ...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： Junpei Niwa T. Inagaki T. Matsumoto K. Hiraki Department of Information Science Faculty of Science University of Tokyo Bunkyo Tokyo Japan

We propose an "Asymmetric Distributed Shared Memory: ADSM", which provides users with an efficient shared memory model. The ADSM is a hybrid system that needs not only operating system support, but also compiler support. The ADSM executes a load instruction as the shared read with the assistance of virtual memory mechanism. As for the shared write, the ADSM executes a sequence of instructions for consistency management after the corresponding store instruction. We describe the algorithm to reduce overheads for consistency management. The algorithm coalesces a sequence of instructions for consistency management using the information of affine memory accesses. The coalescing algorithm is evaluated using the SPLASH-2 benchmark. The performance evaluation shows that the coalescing algorithm achieves an execution time improvement compared to the non optimized result, ranging from 76% to 85%.

关键词： Memory management Costs Hardware Information science Operating systems Information management programming profession Software algorithms Access protocols Software performance

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A new transformation method to generate optimized DO loop from FORALL construct

A new transformation method to generate optimized DO loop fr...

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Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： Mi-Soon Koo Sung-Soon Park Hyun-Gyoo Yook Myong-Soon Park Department of Computer Science Korea University Seoul South Korea Department of Computer Science Anyang University Gyeonggi South Korea

ISBN: (纸本)0818678704

Data parallel language was suggested to solve programming problems of distributed memory machines in terms of programming language. Among data parallel languages, HPF is a standard data parallel language across a variety of high-performance architectures. Most HPF compilers are source-to-source translators because they can be easily implemented. However, these source-to-source compilers produce significant amount of ineffective codes. In particular, the FORALL construct is converted into several DO loops, so its loop overhead is increased. Therefore, we propose some techniques for converting FORALL construct to optimized DO loop. For this, we define and use relation distance vector which can represent both data dependence information and flow information. Then we evaluate and analyze execution time for the codes converted by our method and by PARADIGM method.

关键词： Optimization methods parallel languages Program processors Computer science Computer languages parallel processing Concurrent computing parallel machines parallel programming Contracts

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ATME: a parallel programming environment for applications with conditional task attributes

ATME: a parallel programming environment for applications wi...

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IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： Lin Huang M.J. Oudshoorn Department of Computer Science University of Adelaide Adelaide SA Australia

parallel applications with inconstant usage patterns presents a big challenge to programmers in that the spawning of tasks and the communication between them may be conditional (named "conditional parallel programming"). Ideally, the programmer should not be burdened by operational issues which have little relationship to the application itself. This paper proposes a new parallel programming environment, ATME, to automate task scheduling in conditional parallel programming. By adaptively producing accurate estimates of the task model prior to execution, ATME modifies task distribution to improve the system and application performance.

关键词： parallel programming Application software Processor scheduling Runtime programming profession Scheduling algorithm Computational modeling Computer science Distributed computing Automatic programming

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Proceedings of the 1997 17th international Conference of the Chilean Computer Science Society

Proceedings of the 1997 17th International Conference of the...

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Proceedings of the 1997 17th international Conference of the Chilean Computer Science Society

The proceedings contains 31 papers from the XVII international Conference of the Chilean Computer Science Society. Topics discussed include: paraconsistent evidential logic programming languages;software architectures;constrained Steiner tree problems;visualization systems;visual query systems;deductive databases;fault-tolerant routings;parallel/distributed implementation environments;domain analysis support tools;balanced data structures;HyperRed-Black trees;Seljuk-Amoeba operating environments;superscalar sorting algorithms;interactive hypermedia literary stories;vehicle routing problems;object-oriented database systems;generalized edge-toughness;meeting scheduling systems;and cooperative databases.

关键词： Computer science

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Digest of Papers - 27th Annual international symposium on Fault-Tolerant Computing, FTCS 1997

Digest of Papers - 27th Annual International Symposium on Fa...

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27th Annual international symposium on Fault-Tolerant Computing, FTCS 1997

ISBN: (纸本)0818678313

The proceedings contain 42 papers. The topics discussed include: managing dependencies - a key problem in fault-tolerant distributed algorithms;an approach to fault-tolerant parallel processing on intermittently idle, heterogeneous workstations;renegotiable quality of service - a new scheme for fault tolerance in wireless networks;evaluation of a 32-bit microprocessor with built-in concurrent error-detection;probabilistic checkpointing;portable checkpointing for heterogenous architectures;a communication-induced checkpointing protocol that ensures rollback-dependency trackability;a method to automate user interface testing using variable finite state machines;towards a statistical approach to testing object-oriented programs;and experimental evaluation of failure-detection schemes in real-time communication networks.

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