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检索条件"任意字段=International Symposium on Parallel Architectures, Algorithms, and Programming"
4080 条 记 录,以下是3191-3200 订阅
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Affect of cache to speedup models
Affect of cache to speedup models
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Proceedings of the 1996 2nd international symposium on parallel architectures, algorithms, and Networks, I-SPAN
作者: Yibo, Xue Lan, Chen Chengde, Han Academia Sinica Beijing China
Speedup is usually used to reflect the effect of parallel processing systems. But the existed speedup models do not consider about the affect of cache, so the affect of cache to several speedup models is analyzed in t... 详细信息
来源: 评论
Towards efficiency and portability: programming with the BSP model
Towards efficiency and portability: Programming with the BSP...
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Proceedings of the 1996 8th Annual ACM symposium on parallel algorithms and architectures
作者: Goudreau, Mark Lang, Kevin Rao, Satish Suel, Torsten Tsantilas, Thanasis Univ of Central Florida Orlando United States
The Bulk-Synchronous parallel (BSP) model was proposed by Valiant as a model for general-purpose parallel computation. The objective of the model is to allow the design of parallel programs that can be executed effici... 详细信息
来源: 评论
MPPs and clusters for scalable computing
MPPs and clusters for scalable computing
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2nd international symposium on parallel architectures, algorithms, and Networks (I-SPAN 96)
作者: Xu, ZW Hwang, K CHINESE ACAD SCI NATL CTR INTELLIGENT COMPBEIJINGPEOPLES R CHINA
This article assess the state-of-the-art technology in massively parallel processors (MPPs) and clusters of workstations (COWs) for scalable parallel computing. We evaluate the IBM SP2, the Intel Paragon, the Cray T3D... 详细信息
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Critical look at three of parallel computing's maxims
Critical look at three of parallel computing's maxims
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Proceedings of the 1996 2nd international symposium on parallel architectures, algorithms, and Networks, I-SPAN
作者: Maggs, Bruce M. Carnegie Mellon Univ Pittsburgh United States
This paper takes a critical look at the following three maxims. 1. parallel architecture is converging on a design based on commodity microprocessor chips. 2. Wormhole routing is decidedly more efficient than store-an... 详细信息
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ATM interconnection - A solution for cost sensitive parallel computing
ATM interconnection - A solution for cost sensitive parallel...
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2nd international symposium on parallel architectures, algorithms, and Networks (I-SPAN 96)
作者: Paetz, C Franke, K TECH UNIV CHEMNITZ DEPT INGN ELECT & INFORMAT TECHNOLD-09107 CHEMNITZGERMANY
Cost sensitive applications for parallel computing require system designs using commodity hardware. Off-the-shelf processing node have already been implemented in parallel systems. This article proposes the use of ATM... 详细信息
来源: 评论
Optimal overlap representations
Optimal overlap representations
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2nd international symposium on parallel architectures, algorithms, and Networks (I-SPAN 96)
作者: Chen, L FRL LOS ANGELESCA 90018
In this paper, we investigate the problem of computing minimal interval and circular arc overlap representations, and give several optimal algorithms. We show that, among other things, given an s×t interval or ci... 详细信息
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Commercial virtual reality system based on parallel and distributed approach
Commercial virtual reality system based on parallel and dist...
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Proceedings of the 1996 2nd international symposium on parallel architectures, algorithms, and Networks, I-SPAN
作者: Hamilton, Paul Chen, Shiping Hintz, Tom Sydney
Virtual Reality (VR) is an exciting yet challenging area. Especially in commercial VR systems, one of the main challenges is how to maintain relatively constant performance under various loading and at low-cost. This ... 详细信息
来源: 评论
Performance analysis for an important class of parallel-processing networks
Performance analysis for an important class of parallel-proc...
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Proceedings of the 1996 2nd international symposium on parallel architectures, algorithms, and Networks, I-SPAN
作者: Ziavras, Sotirios G. New Jersey Inst of Technology Newark United States
This paper presents performance and feasibility analyses for important mesh-connected architectures that contain sparse broadcast buses. Two basic architectures, that implement bus intersections differently, are given... 详细信息
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Effective parallelization of execution of multijoins in multiprocessor systems
Effective parallelization of execution of multijoins in mult...
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Proceedings of the 1996 2nd international symposium on parallel architectures, algorithms, and Networks, I-SPAN
作者: Lin, Xuemin Fox, Simon Univ of Western Australia Nedlands
In this paper, we study a synchronous execution strategy for parallel join computation in multiprocessor systems. Through a further comprehensive investigation of the processor allocation problem and inter-operator pa... 详细信息
来源: 评论
Analyzing nondeterminacy of message passing programs
Analyzing nondeterminacy of message passing programs
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Proceedings of the 1996 2nd international symposium on parallel architectures, algorithms, and Networks, I-SPAN
作者: Jianxin, Xiong Dingxing, Wang Tinshua Univ Beijing China
Nondeterminacy is an important issue of testing and debugging parallel programs. For a message passing program the inter-process communication is the main cause of nondeterminacy. From a event-based view, the executio... 详细信息
来源: 评论