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检索条件"任意字段=International Symposium on Parallel Architectures, Algorithms, and Programming"

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A high level language for the RAPID-2 massively parallel accelerator board

A high level language for the RAPID-2 massively parallel acc...

引用

IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： P. Faudemay L. Winckel Laboratoire MASI UPMC France

In this paper, we present an abstract model of the RAPID-2 SIMD architecture. RAPID-2 is a massively parallel add-on board for PCs. It implements a "paginated set-associative" model of architecture, and has systolic capabilities. The L1 language implements the abstract model. L1 is a co-specification language for the programming and micro-programming of RAPID-2. It is derived from C. In order to check their semantic, L1 programs can be emulated in a C++ environment. In the near future, they should be compiled into C application programs and the corresponding microprograms.< >

关键词： High level languages Computer architecture parallel processing Costs Libraries Topology Computer interfaces Processor scheduling Personal communication networks Application software

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Transactional paradigm: applications to distributed programming

Transactional paradigm: applications to distributed programm...

引用

IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： V.K. Murthy E.V. Krishnamurthy School of Computing and Mathematics Deakin University Geelong VIC Australia Computer Sciences Laboratory Research School of Information Sciences and Engineering Australian National University Canberra ACT Australia

A transactional paradigm is suggested for computer-assisted parallelization of programs and register-cache scheduling. It can serve as a building tool for pipelining, data parallellism, or generic parallellism in a va... 详细信息

关键词： Concurrent computing Processor scheduling parallel processing Costs Application software Laboratories Australia Buildings Pipeline processing Computer architecture

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Orchid: the design of a parallel and portable software platform for local area networks

Orchid: the design of a parallel and portable software platf...

引用

IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： G. Manis K. Voliotis C. Lekatsas P. Tsanakas G. Papakonstantinou Zografou Campus National and Technical University of Athens Greece

Orchid is a portable software platform aiming to decouple the parallel software development from the underlying system. Having layered structure, Orchid can be easily ported to different architectures only by reconstructing its lowest level. It also provides advanced facilities not supported by most operating systems and software platforms.< >

关键词： Local area networks Application software Operating systems Computer architecture Concurrent computing Network topology Workstations Software libraries Computational modeling programming profession

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A framework for visual parallel programming

A framework for visual parallel programming

引用

Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： Wentong Cai Tee Lian Pian S.J. Turner School of Applied Science Nanyang Technological University Singapore Department of Computer Science University of Exeter Exeter UK

One of the difficulties of parallel programming is the gap between the desire of programmers to describe computations with manageable abstractions and the detailed description of parallelism, communication and synchronization required by most parallel programming languages. Since in a parallel program, activities are distributed across both space and time, pictures are much more meaningful than text in program construction. This paper describes a new framework for visual parallel programming based on the concurrency map. Four levels of abstraction are provided in order to reduce the complexity of the construction and to allow fast exploration of different design alternatives. Moreover, the same diagrams that are constructed during the development of a program may also be used to display feedback from its execution. The flexibility of the framework is demonstrated by the implementation of a visual constructor for the occam programming language.< >

关键词： parallel programming Concurrent computing parallel processing programming profession Debugging Communication system control Visualization Technology management Feedback Yarn

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Design and performance measurements of an execution model for the parallel processing of Prolog programs

Design and performance measurements of an execution model fo...

引用

IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： Dong Wang H. Kobayashi T. Nakamura Department of Machine Intelligence and Systems Engineering Faculty of Engineering University of Tohoku Sendai Japan

This paper presents a hierarchical parallel execution model for Prolog programs, the execution model is based on Or-parallelism/And-parallelism as coarse-grain parallelism, and parallel unification as fine-grain parallelism. At the coarse-grain parallelism level we propose an extended And-Or tree. Consequently, the tree can exploit high degree of parallelism from Prolog programs. Exploiting parallelism of Prolog programs is based an the binding-arrays method for Or-parallelism and the restricted And-parallelism (RAP) method for And-parallelism. At the fine-grain parallelism level, parallel unification is performed. In general, the parallel unification consists of parallel argument matching and consistency checking. However, since the RAP method does not need consistency checking, consistency checking at the fine-grain parallelism level is also removed. The measurements of the parallelism degree of this model are also to be presented in this paper.< >

关键词： parallel processing Design engineering Artificial intelligence Logic programming Machine intelligence Systems engineering and theory programming profession Spatial databases Expert systems Application software

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A framework for exploiting parallelism in Chronolog

A framework for exploiting parallelism in Chronolog

引用

IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： Chuchang Liu M.A. Orgun Kang Zhang Department of Computing Macquarie University NSW Australia

Chronolog is an extension of logic programming based on temporal logic. The paper presents a framework which can be used to exploit multiple levels of parallelism found an Chronolog programs, context parallelism, AND- and OR-parallelism. Based on an analysis of these modes of parallelism in Chronolog programs, a parallel execution mechanism of the language is discussed and a formal execution model is given. The inherent context-parallelism in Chronolog programs occurs when more than one child-computation are active at a time, and it is exploited through dynamic tagging approach typically used in dataflow computers. At the level of clause arguments, we introduce an intermediate virtual machine (CVM), which is granulated to exploit the argument parallelism through temporal unification. We also give the details of the CVM instruction set. The model is process-based and supports AND-, OR-parallelism in the highly distributed dataflow environment.< >

关键词： parallel processing Logic programming Virtual machining Tagging Concurrent computing Electronic mail Distributed databases Computer languages

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On finding optimal clusterings of task graphs

On finding optimal clusterings of task graphs

引用

Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： W. Lowe W. Zimmermann Institut für Programmstrukturen und Datenorganisation Fakultät fur Informatik der Universität Karlsruhe Karlsruhe Germany

Currently, many parallel algorithms are defined for shared memory architectures. The preferred machine model is the PRAM, but this model does not take into account properties of existing architectures that have a distributed memory and an asynchronous execution model. A transformation of PRAM programs into distributed, asynchronous ones is known. In order to produce not only correct but also efficient code the tasks have to be clustered. We introduce a parallel algorithm producing an optimal clustering for coarse grained task graphs with respect to the execution time on an asynchronous distributed random access machine, the A-DRAM. This machine model assumes distributed memory, asynchronous execution of tasks, computation costs, and communication delay.< >

关键词： Phase change random access memory Clustering algorithms parallel algorithms Algorithm design and analysis Distributed computing Concurrent computing Computational efficiency Delay parallel processing Network topology

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A unifying framework for iteration reordering transformations

A unifying framework for iteration reordering transformation...

引用

IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： W. Kelly W. Pugh Department of Computer Science University of Maryland MD USA

We present a framework for unifying iteration reordering transformations such as loop interchange, loop distribution, skewing, tiling, index set splitting and statement reordering. The framework is based on the idea that a transformation can be represented as a mapping from the original iteration space to a new iteration space. The framework is designed to provide a uniform way to represent and reason about transformations. We also provide algorithms to test the legality of mappings, and to generate optimized code for mappings.< >

关键词： Optimizing compilers Performance analysis programming environments

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Constructing parallel implementations with algebraic programming tools

Constructing parallel implementations with algebraic program...

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Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： A.E. Doroshenko A.B. Godlevsky Recursive Computers Department Glushkov Institute of Cybernetics National Academy of Sciences of Ukraine Kiev Ukraine Digital Automata Theory Department Glushkov Institute of Cybernetics National Academy of Sciences of Ukraine Kiev Ukraine

An approach to declarative construction of parallel implementations (dynamical parallelizers) for a general class of sequential imperative programs by means of the algebraic programming system APS is considered. It gives advantages of rapid prototyping and evolutionary development of efficient parallelizers. An operational model of a dynamical parallelizer in the form of transition system is constructed and major parts of its declarative implementation are described as systems of relations. Techniques for designing efficient parallelizers are presented and exemplified.< >

关键词： parallel programming Concurrent computing Dynamic programming Cybernetics Program processors Prototypes Software design Application software Data analysis Automata

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Supercompilers for massively parallel architectures

Supercompilers for massively parallel architectures

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Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： B. Chapman M. Pantano H. Zima Institute for Software Technology and Parallel Systems University of Technology Vienna Vienna Austria

We describe the design of a compilation system, which translates Fortran programs automatically into explicitly parallel programs for a massively parallel architecture. Such a compiler must automatically generate data distributions and derive program transformation strategies based on a combination of heuristics and analysis features. Programs are subjected to an iterative tuning process, involving three major components: a restructuring system, a performance analysts subsystem, and a parallelization support environment. Many of the components in this environment have already been implemented in the framework of the Vienna Fortran compilation system.< >

关键词： parallel architectures Message passing Program processors Application software Europe Radio access networks High power fiber lasers Peak to average power ratio Performance analysis Concurrent computing

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