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Promising data parallel environment-ADEPS, ADETRAN and ADENA

Promising data parallel environment-ADEPS, ADETRAN and ADENA

引用

Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： T. Nogi Division of Applied Systems Science Kyoto University Kyoto Japan

This paper compares some parallel computation schemes from view of simple usage, and proposes ADEPS as the most highly recommended. As shown, it produces simple programming language ADETRAN and also sophisticated machine architecture, called ADENA. Some established models of ADENAs are introduced as well as a new hopeful one as the next generation of supercomputers, called TFLOPS machines.< >

关键词： Concurrent computing Message passing Remuneration Computer languages Computer architecture Reflection Data engineering Weather forecasting Grid computing Physics computing

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Two dynamic performance tuning methods for portable parallel programs

Two dynamic performance tuning methods for portable parallel...

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IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： K. Suzaki T. Kurita H. Tanuma S. Hirano Y. Ichisugi Electro Technical Laboratory Tsukuba Ibaraki Japan

We present two dynamic performance tuning methods for portable parallel programs on various parallel computers. In parallel programs the affinity between parallel algorithms and the architecture of the target parallel computer is very important. In this paper we focus on the parallelism in view of the number of micro-tasks which are processing units in parallel programs. The presented methods estimate the optimal number of micro-tasks before the parallel processing is invoked. Furthermore, they shorten the execution time of the parallel program so that it is close to the optimal execution time. The estimation is based on the result of pre-executions of the program for different sizes of the data to be processed on a target parallel computer. One tuning method uses nearest-neighbor interpolation and the other uses spline interpolation for the estimation. We tested these tuning methods using a parallel square-matrix multiplication program written in Dataparallel C on three different parallel computers; a Paragon, an iPSC/2, and an nCUBE/2. In these experiments, the method using nearest-neighbor interpolation brought the execution time closer to the optimum than did the method using spline interpolation. The nearest-neighbor interpolation method yielded average execution times, which are given in terms of the optimal execution time, of 1.01 for the Paragon, 1.005 for the iPSC/2, and 1.052 for the nCUBE/2.< >

关键词： Concurrent computing parallel processing Portable computers parallel algorithms Delay Spline Computer architecture Optimizing compilers Laboratories parallel programming

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Implementing higher-order Gamma on MasPar: a case study

Implementing higher-order Gamma on MasPar: a case study

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Aizu international symposium on parallel algorithms/Architecture Synthesis

作者： Kam Wing Ng Lin Peng Huang Yong Qiang Sun Department of Computer Science Chinese University of Hong Kong New Territories Hong Kong China Department of Computer Science and Engineering Shanghai Jiaotong University Shanghai China

ISBN: (纸本)081867038X

Gamma is a kernel programming language with an elegant chemical reaction metaphor in which programs are described in terms of multiset rewriting. The Gamma formalism allows one to describe an algorithm without introducing artificial sequentiality and leads to the derivation of a parallel solution to a given problem naturally. However, the difficulty of incorporating control strategies makes Gamma not only hard for one to define any sophisticated approaches but also impossible to reach a decent level of efficiency in any direct implementation. Recently, a higher-order multiset programming paradigm, named higher-order Gamma, is introduced by Metayer to alleviate these problems. In this paper, we investigate the possibility of implementing higher-order Gamma on MasPar, a massively data parallel computer. The results show that a program written in higher-order Gamma can be transformed naturally towards an efficient implementation on a real parallel machine.< >

关键词： Computer aided software engineering Chemical elements Computer science parallel machines programming profession Data structures Kernel Computer languages Very large scale integration Computer architecture

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A highly parallel algorithm to approximate MaxCut on distributed memory architectures

A highly parallel algorithm to approximate MaxCut on distrib...

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international symposium on parallel Processing

作者： S. Homer M. Peinado Department of Computer Science and Center for Computational Science Boston University Boston MA USA

We develop and experiment with a new parallel algorithm to approximate the maximum weight cut in a weighted undirected graph. Our implementation is based on the recent new algorithm of Goemans and Williamson for this problem. However, our work aims for an efficient, practical formulation of the algorithm with close to optimal parallelization. Our theoretical analysis and an implementation on the Connection Machine CM5 show that our parallelization achieves linear speedup. We test our implementation on several large graphs (more than 9000 vertices), particularly on large instances of the Ising model.< >

关键词： parallel algorithms Memory architecture Algorithm design and analysis Clustering algorithms Testing Physics Greedy algorithms Computer science NP-complete problem parallel machines

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Variable tracking technique: a single-pass method to determine data dependence

Variable tracking technique: a single-pass method to determi...

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IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： D. Wo K. Forward Department of Electrical & Electronic Engineering University of Melbourne Parkville VIC Australia

This paper presents a new data dependence checking technique called the variable tracking technique (VTT). It is a single-pass data dependence checking method which locates dependent statements in a serial computer program. VTT produces a schedule which lists the operations in the source code in groups. The list of operations in a particular group can be executed concurrently. The user is not required to provide a profile of the program to the compiler, hence VTT is suitable for applications which automate the process of exploiting parallelism. Here we describe the use of this technique in gacc, a parallelising compiler, which compiles C functions to field programmable gate array (FPGA) circuits. The results presented in this paper show that VTT has been instrumental in gaining improved performance from a parallelising compiler which automates the process of executing the computational intensive portion of the program in hardware.< >

关键词： Field programmable gate arrays parallel processing Concurrent computing High performance computing Coprocessors Logic circuits Hardware design languages programming profession Data engineering Application software

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An introduction to the analysis and debug of distributed computations

An introduction to the analysis and debug of distributed com...

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IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： E. Fromentin N. Plouzeau M. Raynal IRISA Rennes France

Distributed programs are much more difficult to design, understand and implement than sequential or parallel ones. This is mainly due to the uncertainty created by the asynchrony inherent to distributed machines. So appropriate concepts and tools have to be devised to help the programmer of distributed applications in his task. This paper is motivated by the practical problem called distributed debugging. It presents concepts and tools that help the programmer to analyze distributed executions. Two basic problems are addressed: replay of a distributed execution (how to reproduce an equivalent execution despite of asynchrony) and the detection of a stable or unstable property of a distributed execution. Concepts and tools presented are fundamental when designing an environment for distributed program development. This paper is essentially a survey presenting a state of the art in replay mechanisms and detection of unstable properties on global states of distributed executions.< >

关键词： Distributed computing Concurrent computing programming profession Debugging Mechanical factors Software tools Electronic mail Delay effects Relativistic effects Algorithm design and analysis

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Performance prediction for portable parallel execution on MIMD architectures

Performance prediction for portable parallel execution on MI...

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international symposium on parallel Processing

作者： G. Chillariga B. Ramkumar Department of Electrical and Computer Engineering University of Iowa IA USA

Performance debugging and prediction for parallel systems is a difficult problem. The difficulties in identifying performance bottlenecks stem from the need for an intimate understanding of the underlying architecture. It has been recognized that portability is an important requirement for parallel program development. However, this makes the task of performance debugging even more difficult. In this paper, we present a simulation based approach for performance prediction of portable-parallel programs. We demonstrate it using Charm: a message driven programming environment, which provides program portability across a variety of shared and distributed memory MIMD parallel systems. The proposed approach makes it possible to use a single debugging environment for the development of portable parallel software. This environment can provide correctness and performance debugging support that provides the developer with valuable feedback for improving program performance.< >

关键词： Computer architecture Predictive models parallel programming Delay Computer bugs Performance analysis Cities and towns Software debugging Feedback Data mining

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Efficient routing and message bounds for optimal parallel algorithms

Efficient routing and message bounds for optimal parallel al...

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international symposium on parallel Processing

作者： Xiaotie Deng P. Dymond Department of Computer Science York University North York ONT Canada

The cost of interprocessor communication has a substantial impact on execution time when implementing parallel algorithms on physical parallel computers. We study these implementation costs, examining the number of inter-processor messages, the cost of routing these messages on various architectures, and the number of communication phases. We provide an improved direct routing algorithm for realizing h-relations on crossbar networks. We also introduce a round-robin message-delivery algorithm which reduces the number of times a communication lint is established between a pair of processors (by delivering all messages of that phase for the pair in order without interruption) We summarize criteria sufficient for a parallel algorithm to be implemented optimally on several common networks. We also describe a log n-phase optimal parallel list-ranking algorithm.< >

关键词： Routing parallel algorithms Phase change random access memory Algorithm design and analysis Concurrent computing Delay Computer science Cost function Physics computing Plasma welding

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Automated programming of a ring-structured multiprocessor digital filter IC

Automated programming of a ring-structured multiprocessor di...

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IEEE international symposium on Circuits and Systems (ISCAS)

作者： M.J. Werter A.N. Willson Electrical Engineering Department University of California Los Angeles Los Angeles CA USA

A computer algorithm is described that automatically writes optimal programs for the implementation of arbitrary digital filter structures on parallel processors. The algorithm has been adapted particularly for programming a DSP chip with multiple processors arranged in a ring-type topology. The algorithm starts from a netlist describing a desired digital filter structure. It can check all possible timing schedules and all possible distributions of the operations over the parallel processors, taking into account the constraints imposed by the multiprocessor topology and the processors' architecture. The algorithm's output is a set of programs for the parallel processors which causes them to implement the given digital filter.

关键词： Automatic programming Digital filters Digital integrated circuits Concurrent computing Signal processing algorithms Digital signal processing chips Partitioning algorithms Topology Flow graphs Computer architecture

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A study of the communication cost of the FFT on torus multicomputers

A study of the communication cost of the FFT on torus multic...

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IEEE international Conference on algorithms and architectures for parallel Processing (ICAP)

作者： L.D. de Cerio M. Valero-Garcia A. Gonzalez Departament d' Arqitectma de Computadors University Politiknica de Catalunya Barcelona Spain Universitat Politecnica de Catalunya Barcelona Catalunya ES Dept. d'Arquitectura de Computadors Univ. Politecnica de Catalunya Barcelona Spain

The computation of a one-dimensional FFT on a c-dimensional torus multicomputer is analyzed. Different approaches are proposed which differ in the way they use the interconnection network. The first approach is based on the multidimensional index mapping technique for the FFT computation. The second approach starts from a hypercube algorithm and then embeds the hypercube onto the torus. The third approach reduces the communication cost of the hypercube algorithm by pipelining the communication operations. A novel methodology to pipeline the communication operations on a torus is proposed. Analytical models are presented to compare the different approaches. This comparison study shows that the best approach depends on the number of dimensions of the torus and the communication start-up and transfer times. The analytical models allow us to select the most efficient approach for the available machine.< >

关键词： Costs Message passing Memory management Multidimensional systems programming profession Hypercubes Pipeline processing Distributed computing Analytical models Computer networks

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