It is shown that there is a close relationship between the mappings of sequentially formulated algorithms onto different kinds of parallelarchitectures. The compilation of programs for these architectures shares comm...
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It is shown that there is a close relationship between the mappings of sequentially formulated algorithms onto different kinds of parallelarchitectures. The compilation of programs for these architectures shares common optimization features, such as a high degree of parallelism, a short execution time, and a high processor utilization, and also a common design trajectory. Given a problem formulation, parallelism is extracted. Equivalence transformations are applied for the purpose of optimization. In the mapping phase, resources are assigned to operations and a schedule is defined. In order to match a problem and an architecture of given size, hierarchical transformations are performed that partition a problem into problems of smaller size that are executed sequentially. Due to these similarities, design methods known for the design and optimization of processor arrays can be used to solve problems known from the design of vectorizing compilers for supercomputers and vice versa. For defining the tasks of a versatile compiler for massive parallelarchitectures (COMPAR) a set of parameterized tools is defined that allows the uniformization of the mapping of sequential code onto parameterized parallelarchitectures.
The split and merge model is a reasonable method for architecture-independent programming of global image processing operations on parallelarchitectures. The authors consider image connected components from the point...
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The split and merge model is a reasonable method for architecture-independent programming of global image processing operations on parallelarchitectures. The authors consider image connected components from the point of view of this programming model, and develop split and merge algorithms that implement various connected components algorithms that have appeared in the literature. The algorithms are implemented in two architectures independent languages they have developed, namely Apply and Adapt. Performance of the algorithms on the Sun, the Carnegie Mellon Warp, and the Carnegie Mellon Nectar architectures is compared.< >
Due to the increased use of parallelism in computer systems, designers need tools to evaluate job performance and match problems with candidate architectures. In this paper, jobs are modeled using continuous job profi...
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This issue contains eight symposium papers. Topics considered include: carry-save architectures, digital signal processing, Viterbi decoding, programming algorithms, processor arrays, systolic arrays, pattern recognit...
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This issue contains eight symposium papers. Topics considered include: carry-save architectures, digital signal processing, Viterbi decoding, programming algorithms, processor arrays, systolic arrays, pattern recognition, nonlinear adaptive filtering, image smoothing and segmentation, nonlinear analog networks, cellular neural networks, wave digital networks, numerical integration of differential equation, minimization, and image restoration. All papers are abstracted and indexed separately.
The authors introduce a formal approach for synthesis of parallelarchitectures. Four different forms are used to express the given algorithms: simultaneous recursion, recursion with respect to different variables, fi...
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The authors introduce a formal approach for synthesis of parallelarchitectures. Four different forms are used to express the given algorithms: simultaneous recursion, recursion with respect to different variables, fixed nesting and variable nesting. Four different architectures for the same algorithm are obtained. As an example, a matrix-matrix multiplication algorithm is used to obtain four different optimal architectures. The different architectures of this example are compared in terms of area, time, broadcasting and required hardware. The approach is providing two main features: completeness and correctness.< >
Associative processing based on content-addressable memories has been argued to be the natural solution for non-numerical information processing applications. Unfortunately, the implementation requirements of these ar...
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The ParaGraph graph editor is a tool for specifying the graphical structure of parallel algorithms. Based on an extended formalism of Aggregate Rewriting Graph Grvmmaxs, it is an improvement on existing techniques for...
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Concurrent Clean is an experimental, lazy, higher-order parallel functional programming language based on term graph rewriting. An important difference with other languages is that in Clean graphs are manipulated and ...
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