检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

3,810 篇 会议
180 篇 期刊文献
81 册 图书
1 篇 学位论文

馆藏范围

4,072 篇 电子文献
1 种 纸本馆藏

日期分布

学科分类号

2,088 篇 工学
- 1,903 篇 计算机科学与技术...
- 1,022 篇 软件工程
- 368 篇 电气工程
- 153 篇 信息与通信工程
- 137 篇 电子科学与技术（可...
- 75 篇 控制科学与工程
- 30 篇 机械工程
- 30 篇 生物工程
- 24 篇 材料科学与工程（可...
- 24 篇 生物医学工程（可授...
- 22 篇 仪器科学与技术
- 20 篇 光学工程
- 19 篇 建筑学
- 17 篇 测绘科学与技术
- 16 篇 土木工程
- 13 篇 动力工程及工程热...
- 12 篇 农业工程
524 篇 理学
- 415 篇 数学
- 50 篇 物理学
- 39 篇 系统科学
- 33 篇 生物学
- 29 篇 统计学（可授理学、...
- 16 篇 化学
- 16 篇 地球物理学
206 篇 管理学
- 154 篇 管理科学与工程(可...
- 61 篇 工商管理
- 53 篇 图书情报与档案管...
19 篇 农学
- 14 篇 作物学
18 篇 法学
- 18 篇 社会学
15 篇 经济学
- 15 篇 应用经济学
13 篇 医学
3 篇 文学
3 篇 军事学
2 篇 教育学
2 篇 艺术学
1 篇 哲学

主题

647 篇 parallel process...
544 篇 parallel program...
527 篇 computer archite...
462 篇 parallel archite...
448 篇 concurrent compu...
358 篇 parallel algorit...
320 篇 programming
313 篇 hardware
283 篇 computer science
276 篇 algorithm design...
263 篇 computational mo...
214 篇 programming prof...
165 篇 parallel process...
163 篇 dynamic programm...
154 篇 application soft...
138 篇 program processo...
138 篇 costs
136 篇 libraries
136 篇 distributed comp...
133 篇 runtime

机构

9 篇 stanford univ st...
9 篇 intel corporatio...
8 篇 oak ridge natl l...
8 篇 univ calif berke...
7 篇 school of comput...
7 篇 oak ridge nation...
7 篇 carnegie mellon ...
7 篇 college of compu...
7 篇 oak ridge nation...
7 篇 univ texas austi...
6 篇 school of comput...
6 篇 sandia national ...
6 篇 department of co...
6 篇 barcelona superc...
6 篇 department of co...
6 篇 department of co...
5 篇 department of co...
5 篇 nvidia corporati...
5 篇 pacific northwes...
5 篇 georgia institut...

作者

15 篇 jack dongarra
12 篇 dongarra jack
11 篇 hong shen
10 篇 hoefler torsten
9 篇 zhong cheng
9 篇 olukotun kunle
9 篇 gu yan
8 篇 chapman barbara
7 篇 garcia i.
7 篇 forsell martti
7 篇 sun yihan
7 篇 jigang wu
7 篇 nakano koji
7 篇 danelutto marco
6 篇 cheng zhong
6 篇 v.k. prasanna
6 篇 blelloch guy e.
6 篇 h.j. siegel
6 篇 lumsdaine andrew
6 篇 tsigas philippas

语言

4,038 篇 英文
26 篇 其他
9 篇 中文

检索条件"任意字段=International Symposium on Parallel Architectures, Algorithms, and Programming"

共 4072 条记录，以下是3761-3770 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Design guidelines for parallel algorithms using continuous job profiles

Design guidelines for parallel algorithms using continuous j...

引用

international symposium on parallel Processing

作者： L.F. Wilson M.J. Gonzalez Computer Engineering Research Center Department of Electrical and Computer Engineering University of Texas Austin Austin TX USA

Due to the increased use of parallelism in computer systems, designers need tools to evaluate job performance and match problems with candidate architectures. In the paper, jobs are modeled using continuous job profiles. Five classes of continuous job profiles are analyzed in terms of the number of processors used under the processor sweeping scheduling discipline. Characteristics of each job class are discussed, and analytical results are used to develop design guidelines to determine how speedup and efficiency are affected by the addition of processing elements in a multiple processor environment.< >

关键词： Job design Algorithm design and analysis Guidelines parallel algorithms Concurrent computing Design engineering parallel processing Computer architecture Processor scheduling Particle measurements

来源：评论

学校读者我要写书评

暂无评论

A practical hierarchical model of parallel computation

A practical hierarchical model of parallel computation

引用

international symposium on parallel and Distributed Processing (IPDPS)

作者： T. Heywood S. Ranka School of Computer and Information Science Syracuse University Syracuse NY USA

A model of parallel computation is introduced which employs the PRAM as a sub-model, while simultaneously being more reflective of realistic parallel architectures by accounting for and providing abstract control over communication and synchronization costs. Cost control is achieved via the representation of general degrees of locality ('neighborhoods' of activity). The model organizes 'control asynchrony' via an implicit hierarchy relation, and restricts 'communication asynchrony' in order to obtain determinate algorithms.< >

关键词： Computational modeling Concurrent computing Phase change random access memory Reflectivity Partitioning algorithms Costs Communication system control Information science Computer architecture

来源：评论

学校读者我要写书评

暂无评论

GFLOPS: a general flexible linearly organized parallel structure for images

GFLOPS: a general flexible linearly organized parallel struc...

引用

international Conference on Application Specific Array Processors

作者： D. Houzet J.-L. Basille J.-Y. Latil I. R. I. T. Toulouse France

This paper describes a design of a linear array for use in MIMD, SIMD, pipeline and SPMD modes of programming for image processing applications. It gives some results for an evaluation. A great variety of algorithms, from low level algorithms used for pixel operations to high level algorithms used for performing region treatments or eventually for symbolic processing, may be implemented on this unique structure. The different memory banks of this structure are connected to the processors through a one stage interconnection network. This network is linearly expandable and provides a direct access from each processor to a subset of memory banks. The way the processors have been designed is such that they can operate in different modes. They can manage various memory organisations through memory address calculation capabilities. Each processor is structured around several general purpose processing units as in the VLIW model. The optimal number of these units is discussed.< >

关键词： Image processing Multiprocessor interconnection networks Process design Memory management parallel architectures Testing Electronic mail Pipelines Linear programming parallel programming

来源：评论

学校读者我要写书评

暂无评论

Memory allocation constructs to complement NUMA memory management

Memory allocation constructs to complement NUMA memory manag...

引用

international symposium on parallel and Distributed Processing (IPDPS)

作者： R.L. Adema C. Schlatter Ellis IBM Corporation NC USA Department of Computer Science Duke University Durham NC USA

Nonuniform memory access time (referred to as NUMA) is an important feature in the design of large scale shared memory multiprocessors. However, one implication of the NUMA architecture is that locality of the data is crucial to performance. In the absence of any system support, the programmer is forced to explicitly manage these locality issues, significantly increasing the development time for parallel applications. The authors have enhanced the uniform system programming environment of BBN to allow a programmer to easily separate data structures based on expected reference patterns instead of requiring an understanding of the NUMA memory architecture as the basis for allocation decisions. An operating system providing dynamic page placement can exploit the more homogeneous allocation of data structures to virtual pages.< >

关键词： Memory management Operating systems programming profession Large-scale systems Data structures Memory architecture Computer science Computer architecture parallel programming parallel architectures

来源：评论

学校读者我要写书评

暂无评论

SIMD data communication algorithms for multiply twisted hypercubes

SIMD data communication algorithms for multiply twisted hype...

引用

international symposium on parallel Processing

作者： Si-Qing Zheng Department of Computer Science Louisiana State University Baton Rouge LA USA

The paper explores the effectiveness of multiply-twisted hypercube networks for parallel computing by considering interprocessor communication problems. It presents SIMD parallel data broadcasting, census, and shortest path finding algorithms for multiply-twisted hypercube networks. The data broadcasting algorithms take ((n+1)/2) communication steps to broadcast a message from a processor to all other processors in Q/sub n//sup MT/ (an n-dimensional multiply-twisted hypercube and its graph). Each processor performs at most one receive operation to receive the broadcasted message from exactly one of its adjacent processors, and at most one send operation to send the broadcasted message to a subset of its adjacent processors. The data broadcasting algorithms can be easily converted into census algorithms with similar performance. Moreover, it is shown that the data broadcasting algorithms can be used to send a message from any processor P/sub i/ to any other processor P/sub j/ in a multiply-twisted hypercube in no more than L(i,j)+i communication steps, where L(i,j) is the length of the shortest path from P/sub i/ to P/sub j/.< >

关键词： Data communication Hypercubes Broadcasting Joining processes Concurrent computing Computer science Computer applications Routing Computational modeling parallel architectures

来源：评论

学校读者我要写书评

暂无评论

Scheduling parallelizable imprecise computations on multiprocessors

Scheduling parallelizable imprecise computations on multipro...

引用

international symposium on parallel Processing

作者： A.C. Yu K.-J. Lin Department of Computer Science University of Illinois Urbana-Champaign USA

In a real-time application that supports imprecise computation, each task is logically composed of a hard task and a soft task. The hard task must be completed before its deadline. The soft task is an optional task which may not be executed to completion, if insufficient computational resources are available. In the presented model, each task may be parallelized and executed on multiple processors with a multiprocessing overhead which is assumed to be a linear function of the degree of parallelism. It is shown that the problem of time allocation in such a real-time application can be formulated and solved as a linear programming problem. An algorithm is given for constructing a multiprocessor schedule from the linear programming solution. This algorithm guarantees the multiprocessing overhead generated in the multiprocessor schedule not to exceed a linear upper bound.< >

关键词： Processor scheduling Concurrent computing Timing Algorithm design and analysis Real time systems Scheduling algorithm Linear programming parallel processing parallel algorithms NASA

来源：评论

学校读者我要写书评

暂无评论

Prototyping parallel and distributed programs in Proteus

Prototyping parallel and distributed programs in Proteus

引用

international symposium on parallel and Distributed Processing (IPDPS)

作者： P.H. Mills L.S. Nyland J.F. Prins J.H. Reif R.A. Wagner Department of Computer Science Duke University Durham NC USA Department of Computer Science North Carolina State University Chapel Hill NC USA

This paper presents Proteus, an architecture-independent language suitable for prototyping parallel and distributed programs. Proteus is a high-level imperative notation based on sets and sequences with a single construct for the parallel composition of processes. Although a shared-memory model is the basis for communication between processes, this memory can be partitioned into shared and private variables. parallel processes operate on individual copies of private variables, which are independently updated and may be merged into the shared state at specifiable barrier synchronization points. Several examples are given to illustrate how the various parallel programming models, such as synchronous data-parallelism and asynchronous control-parallelism, can be expressed in terms of this foundation. This common foundation allows prototypes to be tested, evolved and finally implemented through refinement techniques targeting specific architectures.< >

关键词： Prototypes Software prototyping Concurrent computing parallel machines Computational modeling Phase change random access memory parallel processing Computer science Logic programming Feedback

来源：评论

学校读者我要写书评

暂无评论

parallel algorithms that solve problems by communication

Parallel algorithms that solve problems by communication

引用

international symposium on parallel and Distributed Processing (IPDPS)

作者： D. Sharp M. Cripps Department of Computing Imperial College of Science Technology and Medicine London UK

Most current parallel computers are made from tens of processors that may communicate with each other (fairly slowly) by means of static intercommunication paths. However, in the future the use of optical communication media and wafer scale integration will facilitate construction of computers with thousands of simple processors each of which may communicate simultaneously with any other. What will these computers run? The authors present three novel algorithms that solve problems by communication (quicksort, tessellation and fractals). One, fractal image generation, works purely by iterative communication which is interesting because studies of the human brain indicate that the connections between neurons are mainly responsible for our powers of thought. These algorithms combine features of both imperative and connectionist programming styles and arose from a systematic study of goal-directed program transformation, including the target architecture with the program specification. They are examples of a whole class of such algorithms which the authors expect will be developed similarly.< >

关键词： parallel algorithms Iterative algorithms Fractals Concurrent computing Optical fiber communication Wafer scale integration Optical computing Image generation Humans Neurons

来源：评论

学校读者我要写书评

暂无评论

Design methodology for direct mapping of iterative algorithms on array architectures

Design methodology for direct mapping of iterative algorithm...

引用

IEEE international symposium on Circuits and Systems (ISCAS)

作者： M.K. Birbas D.J. Soudris C.E. Goutis VLSI Design Laboratory Department of Electrical Engineering University of Patras Patras Greece

A systematic methodology for mapping a class of iterative algorithms onto processor array architectures is presented. The concept of the array architecture is combined efficiently with the existing knowledge of compiler techniques. It is considered as an initial description of the iterative algorithm Fortran-like nested loops, without the requirement of transforming it into any intermediate form such as uniform recurrent equations. The principles of Lamport's coordinate method are used. Depending on the systolic or non-systolic structure of the algorithm and/or the multidimensional mapping, the resulting architectures can be either regular arrays or piecewise regular arrays. The important subclass of algorithm known as weak single assignment codes is treated in an optimal way.< >

关键词： Design methodology Iterative algorithms Very large scale integration Algorithm design and analysis Equations Multidimensional systems Hardware parallel processing Laboratories Systolic arrays

来源：评论

学校读者我要写书评

暂无评论

An approach to solve the cache thrashing problem

An approach to solve the cache thrashing problem

引用

international symposium on parallel Processing

作者： Zhixi Fang Mi Lu Hua Lin CONVEX Computer Corporation Richardson TX USA Texas A and M University College Station TX USA

Cache or local memory thrashing problem arises very often in parallel processing architectures where each processor has its local cache or memory and a write-back protocol is employed for cache coherence. To solve the problem of large amount of data moving back and forth between the caches or local memories in different processors, techniques associated with parallel compiler need to be developed. Based on the relations between array element accesses and enclosed loop indices in a nested parallel construct, the authors present some approaches to reduce the data movement between the caches or local memories for parallel programs. By analyzing the array subscript expressions, the compilers let the processor execute the corresponding iterations of parallel loops in terms of the data in its cache or local memory at execution time. It benefits, particularly, the parallel programs in which a parallel loop is enclosed by a sequential loop and array elements are repeatedly used in different iterations of the parallel loop.< >

关键词： Multiprocessing systems Computer architecture Multiprocessor interconnection networks Iterative algorithms parallel processing Access protocols Petroleum Memory architecture Ear Yarn

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共408页 << < 373 374 375 376 377 378 379 380 381 382 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：