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检索条件"任意字段=International Symposium on Parallel Architectures, Algorithms, and Programming"

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Scheduling precedence graphs to minimize total system time in partitionable parallel architectures

Scheduling precedence graphs to minimize total system time i...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： Hyeong-Ah Choi B. Narahari Dept. of Electr. Eng. & Comput. Sci. George Washington Univ. Washington DC USA Department of Electrical Engineering & Computer Sciences George Washington University Washington D.C. DC USA

Two issues are introduced into the scheduling problem: each of the sub-tasks can be performed using one of a number of parallel algorithms running on different configurations; and there is an overhead time to move data (reconfiguration time) from the configuration required by one algorithm to the configuration required by the algorithm of the successor sub-task. The execution time for each algorithm and the reconfiguration times between all pairs of algorithms are provided along with the precedence graph. The problem is to find for each sub-task the algorithm to be executed such that the total system time, which is the sum of the execution times and the data movement times of all the selected algorithms, is minimized. The authors show that the problem is NP-hard even when the total degree, of each node of the precedence graph is at most three. They show that it can be solved in polynomial time if the total degree of each node is at most two, thus completely closing the gap between the polynomially solvable cases and the NP-hard cases in terms of the maximum degree of the precedence graph.< >

关键词： parallel architectures Partitioning algorithms Processor scheduling parallel algorithms parallel processing Polynomials Concurrent computing Scheduling algorithm Process control Control systems

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parallel join algorithms for nested relations on shared-memory multiprocessors

Parallel join algorithms for nested relations on shared-memo...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： V. Deshpande P.-A. Larson T.P. Martin Department of Computer Sciences University of Waterloo Waterloo ONT Canada Department of Computing and Information Science Queen's University Kingston ONT Canada

The authors examine the problem of performing a join involving nested relations in a parallel shared-everything environment. They show the difference between joining flat relations and joining nested relations, and then develop hash-based parallel join algorithms. Both IO and CPU parallelism are addressed. Preliminary experimental results are presented.< >

关键词： Relational databases Algebra Query processing Computer science Information science parallel processing parallel architectures Prototypes Disk drives Concurrent computing

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VLSI architectures for hierarchical block matching algorithms

VLSI architectures for hierarchical block matching algorithm...

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IEEE international symposium on Circuits and Systems (ISCAS)

作者： T. Komarek P. Pirsch Institut für Theoretische Nachrichtentechnik und Informationsverarbeitung Hanover Germany

An application-specific multiprocessor system is investigated for real-time implementation of the hierarchical block matching algorithm. The proposed architecture is based on parallel processing units and local memories which are globally preloaded via a common bus. The performance is estimated for the data transfer and the parallel computation time schedule.< >

关键词： Very large scale integration Computer architecture Source coding parallel processing Concurrent computing Processor scheduling Motion estimation Matched filters Video codecs Multiprocessing systems

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Mapping of neural networks onto programmable parallel machines

Mapping of neural networks onto programmable parallel machin...

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IEEE international symposium on Circuits and Systems (ISCAS)

作者： S. Shams K.W. Przytula Hughes Research Laboratories Inc. Malibu CA USA

A method of implementing neural networks on programmable, parallel machines is presented. The method is applicable to multilayer connectionist networks and two dimensional, single-instruction multiple-data stream processor arrays. A detailed description for a mapping of a multilayer perceptron with a back-propagation learning algorithm is provided. The mapping includes partitioning of inputs larger than the processor array. The performance of the method is evaluated using the Nettalk network, and is compared to that of other methods. In particular, it is shown that the implementation of the method on the Hughes Systolic/Cellular machine results in a processing rate equal to 100 million connections per second (MCPS).< >

关键词： Neural networks parallel machines Computer architecture parallel architectures Laboratories Control systems Multi-layer neural network Multilayer perceptrons Partitioning algorithms Signal processing algorithms

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Algorithm transformations for unlimited parallelism

Algorithm transformations for unlimited parallelism

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IEEE international symposium on Circuits and Systems (ISCAS)

作者： G. Fettweis L. Thiele G. Meyr Lehrstuhl für elektrische Regelungstechnik RWTH Aachen University of Technology Aachen Germany Institute of microelectronics Saarbruecken Germany

A unified algebraic basis for transforming algorithms to achieve unlimited parallelism is provided. In the case of recursive algorithms, a certain class of algebraic structures is shown to be sufficient for the application of the look-ahead computation. This approach is generalized to matrix-based algorithms where the operations form a semiring. Previously known approaches to speeding up recursions are shown to be special instances of the given approach. A block processing realization corresponding to the logarithmic look-ahead computation is given which is efficient in its area and time requirements.< >

关键词： parallel processing Flow graphs Concurrent computing Paper technology Microelectronics Throughput Computer architecture parallel architectures Arithmetic Boolean functions

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Exploiting data parallelism in vision on the Connection Machine system

Exploiting data parallelism in vision on the Connection Mach...

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international Conference on Pattern Recognition

作者： H. Voorhees D.M. Fritzsche L.W. Tucker Thinking Machines Corporation Cambridge MA USA

The authors show how the data parallel programming model can be applied to high level vision tasks needed for object recognition. The architecture and programming model of the Connection Machine System are reviewed. Utilities for representing and manipulating sets of data, the primary representation outside of the image plane, are described using communications primitives, especially segmented scans. Several algorithms for matching and evidence accumulation, which are constructed from the utilities, are compared. The techniques emphasize the use of sorting and sparse representations of space in order to limit the combinatorial processing requirements of high-level vision.< >

关键词： parallel processing Geometry Concurrent computing parallel programming Sorting parallel architectures Computer architecture Image segmentation Combinatorial mathematics Utility programs

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An asymptotically 100% efficient parallel implementation of the nonsymmetric QR algorithm

An asymptotically 100% efficient parallel implementation of ...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： D.G. Hudson R.A. van de Geijn Department of Computer Sciences University of Texas Austin Austin TX USA

The QR algorithm has proven to be the most successful sequential algorithm for finding all eigenvalues of a dense nonsymmetric matrix. Recently, several parallel implementations of the QR algorithm have been proposed. These implementations have all been based on the column-wrapped storage scheme. While column-wrapped storage has been used to obtain asymptotically 100% efficiency for many algorithms for solving linear systems, eigenvalue algorithms using such storage have achieved, at best, asymptotically constant efficiency. The authors present a parallel implementation of the QR algorithm that makes use of an alternate storage scheme that allows them to achieve asymptotically 100% efficiency. They also present a technique, which they call bundling, that further improves the observed efficiency of the parallel implementation.< >

关键词： Eigenvalues and eigenfunctions Distributed computing parallel algorithms Jacobian matrices Arithmetic Concurrent computing Linear systems parallel architectures Timing Performance analysis

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parallel computation of fan-beam back-projection reconstruction algorithm in computed tomography

Parallel computation of fan-beam back-projection reconstruct...

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IEEE international symposium on Circuits and Systems (ISCAS)

作者： W.-T. Lin C.-Y. Ho C.-Y. Chin General Electric Corporate Research and Development Center Schenectady NY USA

A method for parallelizing the image reconstruction of a fan beam computed tomography (CT) scanner and a processor array adapted for computing the back-projection reconstruction algorithm (BPR) are presented. By making use of some inherent parallelism in PBR, a modular ring architecture in multiple of eight processors is shown to be well suited for a class of CT algorithms. The parallel architecture encompasses a reconfigurable binary tree to accommodate a wide range of processor interconnections needed for different image-processing schemes, ranging from front-end filtering, calibration, and fast Fourier transform to postprocessing such as artifact removal and image compression.< >

关键词： Concurrent computing Computed tomography Image reconstruction Adaptive arrays Reconstruction algorithms Business process re-engineering parallel processing Bioreactors Computer architecture parallel architectures

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The maximum weight perfect matching problem for complete weighted graphs is in PC

The maximum weight perfect matching problem for complete wei...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： C.N.K. Osiakwan S.G. Akl Department of Computing and Information Science Queen's University Kingston ONT Canada

There are efficient sequential algorithms that use linear programming (LP) for computing maximum weight matchings. Finding a deterministic parallel algorithm for computing maximum weight matchings in complete graphs has been an open problem for some time. Since LP is known to be P-complete, then, by the parallel computation thesis, it is unlikely that there exists an NC algorithm that uses LP to solve the maximum weight matching problem. The authors present an LP-based parallel algorithm for maximum weight matching in a complete weighted graph. The algorithm is designed for the EREW PRAM model of parallel computation, and runs in O(n/sup 3//p+n/sup 2/logn) time for p >

关键词： parallel algorithms Algorithm design and analysis Concurrent computing Information science Linear programming Phase change random access memory Computational modeling Joining processes Polynomials Councils

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Accelerated learning on the connection machine

Accelerated learning on the connection machine

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international symposium on parallel and Distributed Processing (IPDPS)

作者： D.J. Cook L.B. Holder Beckman Institute University of Illinois Urbana IL USA

The complexity of most machine learning techniques can be improved by transforming iterative components into their parallel equivalent. The parallel architecture of the Connection Machine provides a platform for the implementation and evaluation of parallel learning techniques. The architecture of the Connection Machine is described along with limitations of the language interface that constrain the implementation of learning programs. Connection Machine implementations of two learning programs, perceptron and AQ, are described, and their computational complexity is compared to that of the corresponding sequential versions using actual runs on the Connection Machine. Techniques for parallelizing ID3 are also analyzed, and the advantages and disadvantages of parallel implementation on the Connection Machine are discussed in the context of machine learning.< >

关键词： Acceleration Machine learning Machine learning algorithms Iterative algorithms Hardware parallel machines Power engineering computing Concurrent computing parallel architectures Computer architecture

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