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检索条件"任意字段=International Symposium on Parallel Computing in Electrical Engineering"

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File system performance comparison with KVM under different disk layout complexity

File system performance comparison with KVM under different ...

引用

international symposium on INFOTEH-JAHORINA (INFOTEH)

作者： Borislav Ðorđević Kristina Janjić Nenad Kraljević Nikola Davidović Institute Mihailo Pupin Belgrade Serbia School of Electrical and Computing Engineering of Applied Studies Belgrade Serbia Faculty of Electrical Engineering University of East Sarajevo BIH

ISBN: (数字)9798331515799

ISBN: (纸本)9798331515805

This paper focuses on comparing file system performance under various disk layout complexities using the same hypervisor. KVM was selected as the hypervisor for this study, and two distinct disk layout complexities were chosen for the guest operating system side. Filebench was the benchmarking tool used due to its remarkable flexibility in simulating realistic application and server behaviors. CentOS 9 was used as the guest operating system, representing the Linux family. The experimental tests involved running one, two, three, and four virtual machines simultaneously. The paper study includes a mathematical model of the virtual environment with different disk layout complexities, followed by a real experiment presented as a case study. This model is used to interpret the results obtained from the experiment.

关键词： Virtual machine monitors File systems Operating systems Linux Layout Virtual environments Virtual machines Mathematical models Complexity theory Servers

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Optimized FPGA Architectures for High-Speed NTT Computation 5

Optimized FPGA Architectures for High-Speed NTT Computation

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5th IEEE international Conference on Advances in electrical, computing, Communication and Sustainable Technologies, ICAECT 2025

作者： Lekkala, Chetan Harsha Bharatula, Sitadevi Reddy, B. Naresh Kumar Sarangam, K. Amrita School of Engineering Department of Ece Chennai India

ISBN: (纸本)9798350356236

This research paper aims to enhance the performance of Number Theoretic Transform (NTT) operations in cryptographic applications by leveraging the flexibility and parallel processing capabilities of Field Programmable Gate Arrays (FPGAs). NTT, integral to many cryptographic algorithms, often faces real-time performance challenges due to computational demands. By implementing NTT on FPGAs, this approach introduces features such as parallelism, pipelining, and dynamic memory management, significantly improving computational efficiency. The proposed architecture, utilizing 8T SRAM on the AMD Kintex 7 FPGA KC705 Kit, optimizes memory bandwidth and polynomial multiplication, resulting in a robust, high-speed implementation suitable for real-time cryptographic tasks. Simu-lation results demonstrate substantial performance gains, offering a valuable framework for future cryptographic hardware designs. © 2025 IEEE.

关键词： Probabilistic logics

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Impact of Non-ideal Reliability Characteristics of SiOx p-Bit for Complex Optimization Problem Solver

Impact of Non-ideal Reliability Characteristics of SiOx p-Bi...

引用

Annual international symposium on Reliability Physics

作者： Jihyun Kim Hyeonsik Choi Jiyong Woo School of Electronic and Electrical Engineering Kyungpook National University Daegu South Korea

ISBN: (数字)9798331504779

ISBN: (纸本)9798331504786

SiO x threshold switching (TS) devices generate periodic output voltage $(\mathbf{V}_{\text{out}})$ spikes for a given input voltage $(\mathbf{V}_{\text{in}})$ pulse. By introducing Ti scavenging layers to induce a variability component in the SiOx film, the number of spikes corresponding to the probability begins to be elaborately tuned in a sigmoid manner as a function of $\mathbf{V}_{\text{in}}$ amplitude. Thus, Ti/SiOx/Ti TS device can serve as probabilistic bit (p-Bit), which play an important role in solving complex optimization problems (COPs). We investigate the impact of the non-ideal SiO x p-Bit response on the COP by considering classified scenarios based on the measurement results.

关键词： Simulation Switches Simulated annealing Logic gates Probabilistic logic Reliability engineering Threshold voltage Probabilistic computing Optimization Physics

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Optimized FPGA Architectures for High-Speed NTT Computation

Optimized FPGA Architectures for High-Speed NTT Computation

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Advances in electrical, computing, Communication and Sustainable Technologies (ICAECT), international Conference on

作者： Chetan Harsha Lekkala Sitadevi Bharatula B. Naresh Kumar Reddy K Sarangam Department of ECE Amrita School of Engineering Chennai India

ISBN: (数字)9798350356236

ISBN: (纸本)9798350356243

关键词： Random access memory Transforms Logic gates Hardware Real-time systems Stability analysis Computational efficiency Cryptography Field programmable gate arrays Pipeline processing

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Cultural Intelligence in AI Ethics: A Systematic Framework for Implementation Across Global Contexts

Cultural Intelligence in AI Ethics: A Systematic Framework f...

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international symposium on Advanced computing and Communication (ISACC)

作者： Devesh Kumar Kamlesh Kumar Rahul Kumar Choudhary Varnika Singh Dept. of Computer Science & Engineering NIT Hamirpur India Dept. of Electrical Engineering NIT Hamirpur India Dept. of Electronics & Communication Engineering UIET Panjab University Chandigarh India

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

This research examines artificial intelligence ethics implementation across diverse cultural contexts through case studies in healthcare, finance, education, and corporate sectors. Using mixed-methods analysis across six cultural regions, the study reveals fundamental variations in approaches to AI ethics, particularly regarding data privacy and human-technology relationships. The integration of Western, Eastern, and African perspectives yields three frameworks: a cultural intelligence model for AI development, an adaptive governance mechanism, and a cross-cultural collaboration approach. Results demonstrate that successful AI implementation requires balancing diverse cultural perspectives with technical innovation through flexible governance structures, providing practical pathways for culturally sensitive AI development.

关键词： Measurement Ethics Technological innovation Systematics Standards organizations Medical services Cultural differences Global communication Stakeholders Artificial intelligence

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Performance Analysis of Hybrid MPI and OpenMP on Smith-Waterman Algorithm

Performance Analysis of Hybrid MPI and OpenMP on Smith-Water...

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international symposium on Advanced computing and Communication (ISACC)

作者： Keyur Ninama Jainamkumar Patel Girish K K Manideep Raya V S R S Reddy Biswajit Bhowmik Dept. of Computer Science and Engineering Maharshi Sushrut CAS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering Ishwarchandra Vidyasagar AIT Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering Maharshi Kanad QC Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

In the rapidly advancing field of bioinformatics, sequence alignment is a pivotal task for elucidating genetic statistics and evolutionary relationships. As the volume and complexity of biological data continue to grow, it becomes imperative to employ effective computational techniques to manage this expansion. The Smith-Waterman algorithm is a key tool for sequence alignment; however, its performance can be constrained by the substantial size of contemporary datasets. To overcome this limitation, this paper explores a hybrid parallelization strategy that integrates message passing interface (MPI) with open multi-processing (OpenMP). This approach aims to significantly enhance the algorithm’s efficiency by leveraging the strengths of both parallelization models. By optimizing the scalability and execution speed of the Smith-Waterman algorithm on advanced high-performance computing (HPC) systems, the hybrid technique not only improves performance but also enables more rapid and accurate biological data analysis.

关键词： Data analysis Scalability Message passing High performance computing Memory management parallel processing Genetics Performance analysis Bioinformatics Intelligent systems

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A Hybrid Approach Using Cryptography and K-Least Significant Bit Steganography Algorithm in Cloud computing

A Hybrid Approach Using Cryptography and K-Least Significant...

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Advances in Computer Science, electrical, Electronics, and Communication Technologies (CE2CT), international Conference on

作者： Anshika Goyal Bhumika Gupta Dept. of Computer Science & Engineering VMSB Uttarakhand Technical University Dehradun India Dept. of Computer Science & Engineering G.B. Pant Institute of Engineering & Technology Pauri India

ISBN: (数字)9798331518578

ISBN: (纸本)9798331518585

The exponential growth of communication technologies has broadened the cloud computing ecosystem horizon to meet main communication needs. However, in-parallel upsurge in online attacks has alarmed industries to ensure optimal data security. The combination of steganography and cryptosystems has been recognized as an enhanced security model for data transfer among the main security systems now in use. In this paper, a hybrid approach using cryptography and K- Least Significant Bit Steganography algorithm in Cloud computing (HYBC-KLSBS-CC) are proposed. Initially, input text data is retrieved from cloud storage and compressed using Huffman Compression Coding (HCC) to reduce data size. The compressed data is then encrypted with a Hybrid Cryptography Algorithm (Hyb-MRFC-ALC), combining Modified Random Fibonacci Cryptography and Asymmetric Lightweight Cryptography to ensure robust encryption. Finally, encrypted data is embedded within an image using the K-Least Significant Bit (KLSB) steganography technique, providing additional layer of security. The proposed method enhances data confidentiality, integrity, and storage efficiency in cloud environments. The proposed HYBC-KLSBS-CC approach attains 26.89%, 29.49% and 18.64% lower PSNR and 26.89%, 29.49% and 18.64% lower MSE when analyzed through existing techniques like data security dependent on cryptography steganography related with OTP procedure and Huffman coding in the cloud environment (CS-OTP-CE), a novel hybrid cryptographic framework for secure data storage in cloud computing: Integrating AES-OTP and RSA with adaptive key management and Time-Limited access control (AES-OTP-RSA-CC) and Crypto-Stegno dependent model for securing medical information on IOMT platform (CS-SMI-IOMT).

关键词： Cloud computing Steganography Image coding Computational modeling Data models Encoding Communications technology Encryption Cryptography Huffman coding

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Performance of permanent magnet synchronous machines based on different winding arrangements and magnetization patterns

Performance of permanent magnet synchronous machines based o...

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international Conference on Energy, Power, Environment, Control and computing (ICEPECC 2025)

作者： Musa Mohammed Gujja Dahaman Ishak Samir El-Nakla Mohamed Salem Mohd N. Mamat Tow Leong Tiang School of Electrical and Electronic Engineering Universiti Sains Malaysia Nibong Tebal Malaysia Department of Electrical Engineering Prince Mohammad Bin Fahd University Alkhobar Saudi Arabia Faculty of Electrical Engineering Technology Universiti Malaysia Perlis Malaysia

ISBN: (数字)9781837243150

This paper investigates the performance of surface-mounted permanent magnet synchronous motors (PMSMs) with two distinct winding configurations and three magnetization patterns. The winding arrangements studied include a 9-slot/10-pole PMSM with single-tooth wound coils and a 15-slot/4-pole PMSM with distributed windings. Both motor designs feature surface-mounted permanent magnets (PMs) on the rotor, with magnetization patterns configured as parallel, radial, and segmented Halbach respectively. PMSMs are widely used in applications such as electric vehicles and renewable energy systems, where high efficiency and performance are critical. This research examines the sensitivity of motor performance to winding configurations and magnetization patterns through finite element simulations in ANSYS Maxwell 2D. Key performance metrics analyzed include airgap flux density, phase back-EMF, cogging torque, and motor output torque. The findings highlight how these design variations influence motor efficiency, average torque, and torque ripple. By comparing the strengths and weaknesses of each configuration, the study identifies optimal combinations of windings and magnetization patterns for specific applications. The results offer valuable insights into PMSM design, aiding in the development of more efficient and reliable motors. This research contributes to informed decision-making in motor design and manufacturing processes, supporting the advancement of modern industrial and energy applications.

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I/O Circuit and Sub-5V ESD Protection for Advanced Bonding Interfaces

I/O Circuit and Sub-5V ESD Protection for Advanced Bonding I...

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Annual international symposium on Reliability Physics

作者： M. Krilcic A. Baric S.-H. Lin T. Markovic N. Pantano M. Simicic Faculty of Electrical Engineering and Computing University of Zagreb Zagreb Croatia IMEC Leuven Belgium Dept. of Electronics and Informatics Vrije Universiteit Brussel Brussel Belgium Dept. of Electrical Engineering (ESAT) KU Leuven Leuven Belgium

ISBN: (数字)9798331504779

ISBN: (纸本)9798331504786

This study investigates the impact of electrostatic discharge (ESD) protection on the performance of I/O circuits in 2.5D-chiplet and 3D integrated architectures, focusing on 12-nm FinFET devices. Using 1-ns-pulse ESD stress measurements and S-parameter analysis, it assesses trade-offs between ESD protection effectiveness and the corresponding capacitance and layout area penalties. The findings highlight the challenges of optimizing chiplet interconnects while meeting evolving protection standards. However, as ESD protection capacitance exceeds interconnect capacitance, it introduces severe RC delay penalties, making further reductions in protection levels essential for maintaining system efficiency and integration feasibility.

关键词： Electrostatic discharge protection Three-dimensional displays Transmitters Chiplets Layout Circuits Integrated circuit interconnections Capacitance FinFETs Testing

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On-Board Charger for Electric Vehicles: LLC Resonant Converter Approach 4

On-Board Charger for Electric Vehicles: LLC Resonant Convert...

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4th international Conference on Power, Control and computing Technologies, ICPC2T 2025

作者： Parvathy, S. Waghray, Prashansaa Lakshmi Sai Jahnavi, S. Nag, Vatsalya Department of Electrical and Electronics Engineering Amrita School of Engineering Amrita Vishwa Vidyapeetham Coimbatore India

ISBN: (纸本)9798331530402

This paper presents a comparative analysis of control strategies applied to the DC/DC power converter in an On-Board Charger (OBC) for a two-wheeler Electric Vehicle (EV).The analysis is focusssed on the performance and efficiency of the full-bridge LLC resonant converter when governed by Phase Shift Control (PSC) and Model Predictive Control (MPC). Additionally, the OBC features a Power Factor Correction (PFC) stage, managed by an interleaved parallel boost converter with current control to ensure high power quality. he study assesses performance metrics such as converter efficiency and settling time for both control strategies. The OBC for the two-wheeler EV is designed and simulated in the MATLAB/Simulink environment. © 2025 IEEE.

关键词： Model predictive control

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