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检索条件"任意字段=International Symposium on Parallel Computing in Electrical Engineering"

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Edge computing Data Gateway Architecture

Edge Computing Data Gateway Architecture

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international symposium on INFOTEH-JAHORINA (INFOTEH)

作者： Martin Pies Jan Velicka Radovan Hajovsky Zdenek Slanina Dejan Jokic Department of Cybernetics and Biomedical Engineering VSB-TU Ostrava Ostrava Czech Republic Department of Electrical and Electronics Engineering International Burch University Sarajevo Bosna i Hercegovina

ISBN: (数字)9798331515799

ISBN: (纸本)9798331515805

This article presents the design of an IoT communication gateway architecture aimed at collecting data from wireless sensor nodes, processing it using edge computing techniques, and distributing it to higher-level systems, such as cloud technologies. The architecture is tailored for long-term outdoor installations and incorporates a backup communication channel to enhance system reliability. The design prioritizes energy efficiency and resilience to harsh climatic conditions. To validate the system’s functionality and reliability, in-situ testing was conducted, allowing for real-world testing and generating valuable data for further system optimization.

关键词： Wireless communication Wireless sensor networks Computer architecture Logic gates Data collection Energy efficiency Internet of Things Edge computing Testing Resilience

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Efficient parallel Algorithm for Detecting Longest Flow Paths in Flow Direction Grids

Efficient Parallel Algorithm for Detecting Longest Flow Path...

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international symposium on Advanced computing and Communication (ISACC)

作者： Karunamuni Jayarukshi Shivali Agarwal Girish K K Santosh Goudar Biswajit Bhowmik Dept. of Computer Science and Engineering Maharshi Sushrut CAS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering Ishwarchandra Vidyasagar AIT Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

High-performance computing (HPC) has transformed the capacity to address complex computational tasks across various scientific fields by enabling the efficient processing of large datasets and intricate simulations. In hydrological modeling, a critical task is identifying the longest flow channel within a catchment, which is essential for understanding water flow patterns and managing resources. However, existing geographic information system (GIS) algorithms for flow path identification often suffer from inefficiencies and inaccuracies. To address these challenges, this paper introduces innovative parallel methods utilizing Open Multi-Processing (OpenMP), a widely-used API that supports multi-platform shared-memory parallel programming. This approach optimizes the analysis of flow direction data, resulting in faster and more accurate identification of flow channels. The results demonstrate that the proposed method outperforms current approaches, offering substantial improvements in both performance and precision. These advancements have the potential to significantly enhance hydrological modeling practices and water resource management.

关键词： Accuracy parallel programming Computational modeling Scalability Redundancy Computational efficiency Reliability parallel algorithms Water resources Geographic information systems

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Oppositional artificial rabbit optimization for the optimal tunning of single input power system stabilizer

Oppositional artificial rabbit optimization for the optimal ...

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international symposium on Advanced computing and Communication (ISACC)

作者： Arnab Chakraborty Devchayan Mukherjee Sourav Paul Sneha Sultana Susanta Dutta Provas Kumar Roy Electrical Engineering Dr. B. C. Roy Engineering College Durgapur India Electrical Engineering Kalyani Government Engineering College Kalyani India

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

The methodology of Oppositional Artificial Rabbit Optimization (OARO) has been effectively applied in this study to a single input power system stabilizer for the most effective tuning to lessen volatility at low frequencies. A single machine infinite bus (SMIB) system has been used to test the suggested algorithm’s efficacy using the Heffron-Phillips framework. To assert the relevance of OARO in an adaptable situation, the implementation of the suggested method is tested for a wide loading environment. The novelity and superiority of the present work has been validated by comparing the result with other work.

关键词： Damping Rabbits Loading Learning (artificial intelligence) Power system stability Minimization Robustness Optimization Tuning Oscillators

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Bit-slice Architecture for DNN Acceleration with Slice-level Sparsity Enhancement and Exploitation 31

Bit-slice Architecture for DNN Acceleration with Slice-level...

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31st IEEE international symposium on High Performance Computer Architecture, HPCA 2025

作者： Choi, Insu Yoon, Young-Seo Yang, Joon-Sung Yonsei University Department of Electrical and Electronic Engineering Seoul Korea Republic of Yonsei University Department of Systems Semiconductor Engineering Seoul Korea Republic of

ISBN: (纸本)9798331506476

Deep Neural Networks (DNNs) demand significant computational resources, prompting the emergence of bit-slice architectures designed to efficiently accelerate DNNs by leveraging high bit-precision reconfigurability and fine-grained sparsity through slice-level computation. However, fully utilizing slice-level sparsity remains challenging, leading conventional bit-slice architectures to exploit either input or weight sparsity at a coarse-grained level. In this paper, we introduce a Bit-slice Architecture for DNN Acceleration (BADA) that simultaneously leverages both input and weight sparsity at coarse- and fine-grained levels. BADA features a novel architecture that skips computations for bit-slice chunks containing zero values and also skips any set of operands where either the input or weight bit-slice is zero. The design comprises a front-end unit responsible for generating bit-slices and selectively gathering only the non-zero slices, and a back-end unit equipped with a signed multiply-and-accumulate (MAC) unit to process these collected non-zero bit-slices. Additionally, we present two algorithmic optimizations to further enhance the efficiency and performance of BADA. First, we propose a novel bit-slice representation that supports 8-bit data without incurring additional hardware overhead, whereas conventional bit-slice representations are limited to 6-bit or 7-bit data under similar constraints. Second, we introduce a method to narrow the weight distribution during the training process, thereby increasing the proportion of zero-valued higher-order bit-slices and further enhancing slice-level weight sparsity. Experimental results demonstrate that BADA achieves a 2.67× increase in throughput, a 1.52× improvement in area efficiency, and a 2.15× enhancement in energy efficiency compared to LUTein, the state-of-the-art bit-slice architecture. © 2025 IEEE.

关键词： Deep neural networks

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Diplexer for sub-6 GHz, 4G and 5G applications using coupled line filters with parallel stub lines

Diplexer for sub-6 GHz, 4G and 5G applications using coupled...

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Innovation in computing and engineering (ICE), international Conference on

作者： Shaurya Srivastava Harshiv Gupta Madhur Deo Upadhayay Jitendra Prajapati Dept. of Electrical Engineering Shiv Nadar Instituition of Eminence Deemed to be University Greater Noida India

This manuscript presents a diplexer design which can operate in 4G and 5G frequency bands. The proposed design is based on coupled line filter with capacitive and inductive coupling has a bandwidth of 0.35 GHz (2.35 G... 详细信息

ISBN: (数字)9798350380460

ISBN: (纸本)9798350380477

关键词： Power dividers Technological innovation 5G mobile communication Bandwidth Telecommunications Inductive coupling

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Taskgraph Framework: A Competitive Alternative to the OpenMP Thread Model

Taskgraph Framework: A Competitive Alternative to the OpenMP...

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international symposium on Advanced computing and Communication (ISACC)

作者： Snehal Chavan Prathamesh Nile Sunil Kumar Biswajit Bhowmik Dept. of Computer Science and Engineering Maharshi Sushrut CAS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering Maharshi Patanjali CPS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

OpenMP is the predominant standard for shared memory systems in high-performance computing (HPC), offering a tasking paradigm for parallelism. However, existing OpenMP implementations, like GCC and LLVM, face computational limitations that hinder performance, especially for large-scale tasks. This paper presents the Taskgraph framework, a novel solution that overcomes the limitations of traditional task dependency graphs (TDGs). Unlike conventional TDGs, which require costly reconstruction for dynamic program structures, the Taskgraph framework uses a taskgraph clause with a list of variables, enabling real-time adaptation without complete reconstruction. This approach significantly reduces overhead, making the Task-graph model highly efficient for tasks with minimal dependencies, offering a competitive alternative to the OpenMP thread model, and enhancing efficiency and adaptability in dynamic HPC environments.

关键词： Adaptation models Runtime parallel programming High performance computing Memory management parallel processing Real-time systems Intelligent systems Standards Faces

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Piccolo: Large-Scale Graph Processing with Fine-Grained in-Memory Scatter-Gather 31

Piccolo: Large-Scale Graph Processing with Fine-Grained in-M...

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31st IEEE international symposium on High Performance Computer Architecture, HPCA 2025

作者： Shin, Changmin Song, Jaeyong Jang, Hongsun Kim, Dogeun Sung, Jun Kwon, Taehee Ju, Jae Hyung Liu, Frank Choi, Yeonkyu Lee, Jinho Seoul National University Department of Electrical and Computer Engineering Korea Republic of Old Dominion Univeristy School of Data Science United States Samsung Electronics Korea Republic of

ISBN: (纸本)9798331506476

Graph processing requires irregular, fine-grained random access patterns incompatible with contemporary off-chip memory architecture, leading to inefficient data access. This inefficiency makes graph processing an extremely memory-bound application. Because of this, existing graph processing accelerators typically employ a graph tiling-based or processing-in-memory (PIM) approach to relieve the memory bottleneck. In the tiling-based approach, a graph is split into chunks that fit within the on-chip cache to maximize data reuse. In the PIM approach, arithmetic units are placed within memory to perform operations such as reduction or atomic addition. However, both approaches have several limitations, especially when implemented on current memory standards (i.e., DDR). Because the access granularity provided by DDR is much larger than that of the graph vertex property data, much of the bandwidth and cache capacity are wasted. PIM is meant to alleviate such issues, but it is difficult to use in conjunction with the tiling-based approach, resulting in a significant disadvantage. Furthermore, placing arithmetic units inside a memory chip is expensive, thereby supporting multiple types of operation is thought to be impractical. To address the above limitations, we present Piccolo, an end-to-end efficient graph processing accelerator with fine-grained in-memory random scatter-gather. Instead of placing expensive arithmetic units in off-chip memory, Piccolo focuses on reducing the off-chip traffic with non-arithmetic function-in-memory of random scatter-gather. To fully benefit from in-memory scatter-gather, Piccolo redesigns the cache and miss-handling architecture (MHA) of the accelerator such that it can enjoy both the advantage of tiling and in-memory operations. Piccolo achieves a maximum speedup of 3.28 × and a geometric mean speedup of 1.62 ×, along with up to 59.7% reduction in energy consumption across various and extensive benchmarks. © 2025 IEEE.

关键词： Memory architecture

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A Competent Human Activity Detection Using Integrated Wearable Sensor Data and Machine Learning 5th

A Competent Human Activity Detection Using Integrated Wearab...

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5th international Conference on computing and Network Communications, CoCoNet 2023

作者： Venkatesh, Veeramuthu Raj, Pethuru Nedium, Roshitha Edara, Jahnavi Reddy, Kalluru Amarnath Anushiadevi, R. School of Computing SASTRA Deemed University Tirumalaisamudram Tamil Nadu Thanjavur613401 India Bangalore560025 India

ISBN: (纸本)9789819747108

A significant advancement in sensor-based technologies has led to a rapid expansion of applications for the Internet of Things (IoT), which can be used to build any real-time monitoring system. This expansion can be attributed to the significant advancement in sensor-based technologies. Nowadays, an increasing number of elderly people live alone in various locations worldwide, and it is essential to monitor the current state in which their health function or activity is critical. Human activity recognition (HAR) technology based on wearable sensors has many applications, including healthcare, fitness, smart homes, and surveillance. However, despite extensive computational research on HAR, multi-sensor-based activity recognition has numerous open challenges. One of these challenges is recognising complex temporal data, identifying discriminate feature vectors from multi-modal data and reducing data dimensionality. These issues necessitate extensive research. The Internet of Things (IoT) is the foundation for this paper’s proposed human activity monitoring model. Using innovative sensor-based technologies, the model is designed to examine the actions of elderly people continuously. This model collects vital information using intelligent sensors or devices powered by the Internet of Things (IoT). Machine learning algorithms analyse this data to identify potential human behaviour risks that can be deduced from their actions. The proposed work’s utility is assessed using a dataset made public by UCI. The findings of the experiments, which made use of several different metrics in addition to a parallel coordinate plot (PCP), indicate that the proposed ML-based HAR framework outperforms several state-of-the-art ML techniques and has the potential to achieve a maximum classification accuracy of 96.30%. Following the evaluation of the proposed model, the SVM was found to have committed the best accuracy of 96.30%, which is quite helpful for our objectives. In addition, SVM p

关键词： Health risks

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Defect Dynamics and Flicker Noise in Ferroelectric Field Effect Transistors at Cryogenic Temperatures

Defect Dynamics and Flicker Noise in Ferroelectric Field Eff...

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Annual international symposium on Reliability Physics

作者： Shouzhuo Yang Yannick Raffel Ricardo Olivo Raik Hoffmann David Lehninger Oliver Ostien Maik Simon Konrad Seidel Thomas Kämpfe Maximilian Lederer Gerald Gerlach Thomas Kampfe Faculty of Electrical and Computer Engineering Technische Universität Dresden Dresden Germany Fraunhofer IPMS Center Nanoelectronic Technologies (CNT) Dresden Germany Faculty of Electrical Engineering Information Technology Physics Technische Universität Braunschweig Braunschweig Germany

ISBN: (数字)9798331504779

ISBN: (纸本)9798331504786

Charge trapping and interface defects strongly influence the reliability behavior of ferroelectric field effect transistors. In order to gain deeper insights into the interactions between ferroelectric polarization and defects, cryogenic conductance and Flicker noise measurements were conducted. They reveal strong changes in the defect energy landscape depending on the polarization state. Moreover, the results herein indicate low noise levels for the low threshold voltage state, favorable for the application in neuromorphic systems at cryogenic temperatures for quantum computing periphery and space.

关键词： Quantum computing Neuromorphics Cryogenics Threshold voltage 1/f noise Noise measurement Integrated circuit reliability FeFETs Physics Noise level

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Quantum-Enhanced Machine Learning for Precision Breast Cancer Diagnosis 17

Quantum-Enhanced Machine Learning for Precision Breast Cance...

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17th international Conference on COMmunication Systems and NETworkS, COMSNETS 2025

作者： Banerjee, Agniva Indian Institute of Science Education and Research Bhopal Dept. Electrical Engineering and Computer Science Bhopal India

ISBN: (纸本)9798331531195

Cancer is the leading cause of premature mortality. Globally, the prevalence of cancer is on the rise, and early-stage diagnosis is crucial for cancer recovery and survival. However, the presence of circulating tumor cells (CTCs) and heterogeneity within the tumor makes it hard to track how cancer changes over time and how resistance to treatment develops. Unfortunately, the cancer diagnosis precision remains inadequate, endangering precious human lives and necessitating costly procedures for accurate treatment. Machine learning (ML) has proven capable of discovering meaningful information and making predictions, particularly with large datasets. Moreover, quantum computers (QCs) inherently possess superposition and parallel computation, features not found in classical computing. Researchers have demonstrated that quantum neural networks (QNNs) achieve a significantly better effective dimension than classical NNs. In this context, this study investigates the application of classical and quantum machine learning (QML) algorithms to classify breast cancer images. Region-based segmentation is used to identify regions of interest and image processing algorithms are performed on segmented breast cancer images to extract meaningful features (e.g., perimeter, area, compactness). An user interface (UI) based software is created to swiftly distinguish benign and malignant instances during image analysis. Although QNNs perform poorly than the classical NNs, there is still a long way to go in developing feature maps and techniques for better performance. In contrast, the classical NNs have gone a long way with well-established algorithms and packages available to us. This research shows that with further development, QML has the potential to enhance cancer diagnosis accuracy and speed, ultimately improving early detection and treatment outcomes. © 2025 IEEE.

关键词： Diseases

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