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Improving High-Performance Sparse Libraries using Compiler-Assisted Specialization : A PETSc Case Study

Improving High-Performance Sparse Libraries using Compiler-A...

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Ramalingam, Shreyas Hall, Mary Chen, Chun Univ Utah Sch Comp Salt Lake City UT 84112 USA

ISBN: (纸本)9780769546766

Scientific libraries are written in a general way in anticipation of a variety of use cases that reduce optimization opportunities. Significant performance gains can be achieved by specializing library code to its execution context: the application in which it is invoked, the input data set used, the architectural platform and its backend compiler. Such specialization is not typically done because it is time consuming, leads to non-portable code and requires performance-tuning expertise that application scientists may not have. Tool support for library specialization in the above context could potentially reduce the extensive understanding required while significantly improving performance, code reuse and portability. In this work, we study the performance gains achieved by specializing the single-processor sparse linear algebra functions in PETSc (Portable, Extensible Toolkit for Scientific Computation) in the context of three scalable scientific applications on the Hopper Cray XE6 Supercomputer at NERSC. We use CHiLL (Composable High-Level Loop Transformation Framework) to apply source-level transformations tailored to the special needs of sparse computations and automatically generate highly optimized PETSc functions. We demonstrate significant performance improvements of more than 1.8X on the library functions and overall gains of 9 to 24% on three scalable applications that use PETSc's sparse matrix capabilities.

关键词： PETSc Compilers for High Performance computing Scientific computing Code Optimization Loop transformations Code Specialization

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Implementing High-performance Intensity Model with Blur Effect on GPUs for Large-scale Star Image Simulation

Implementing High-performance Intensity Model with Blur Effe...

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Li, Chao Zhang, Yunquan Zheng, Changwen Hu, Xiaohui Chinese Acad Sci Inst Software Natl Key Lab Integrated Informat Syst Technol Beijing Peoples R China Chinese Acad Sci Inst Software Lab Parallel Software & Computational Sci Beijing Peoples R China Grad Univ Chinese Acad Sci Beijing Peoples R China

ISBN: (纸本)9780769546766

Intensity model with blur effects are widely employed to accurately simulate the imaging process of a star simulator used for attitude determination and guiding feedback. The model is computationally intensive and the time requirements are proportional to the number of stars in the simulation, imposing great demands of computing power for realistic uses. This paper presents two star simulators using Graphic Processing Units (GPUs). We analyze the parallelism inherent in the intensity model and leverage a massive number of computing cores on GPU to efficiently exploit the fine-grain data parallelism. We first give a parallel simulator and discuss the performance trade-offs related to small amount of shared memory and the atomic operations on GPU. We then give the second simulator by adapting the first based on the characteristics of spatial locality with on-chip memory redesign. We analyze the balance between the kernel time and the non-kernel overhead in the two simulators and observe the inflection points in terms of two crucial model parameters. A selection table is given to choose between the two simulators. Benchmarks corresponding to the data parallelism are developed to fully evaluate the performance. The parallel simulator reports one to two orders of magnitude speedups with a maximum of 270 X compared to the widely-used sequential simulators and the average speedup is around 97 times. The adaptive simulator achieved up to 1.8 X compared with the parallel one over the inflection point. The developed code is currently used for simulating complex star images in a realistic large-scale star simulator.

关键词： GPU computing star image CUDA intensity model blur effect

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Efficient On-line Hardware/Software Task Scheduling For Dynamic Run-time Reconfigurable Systems

Efficient On-line Hardware/Software Task Scheduling For Dyna...

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26th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Al-Wattar, Ahmed Areibi, Shawki Saffih, Faycal School of Engineering University of Guelph Guelph ON N1G 2W1 Canada

ISBN: (纸本)9780769546766

Modern reconfigurable devices such as FPGAs can be reconfigured at run time. Some of them can be dynamically partially reconfigured, which means part of the FPGA is changed without interrupting other parts. This feature adds tremendous flexibility to the Reconfigurable computing (RC) Field but also introduces challenges. Reconfigurable Operating Systems tend to ease applications development and most importantly applications verifications and maintenance. In this paper we propose novel scheduling algorithms for reconfigurable computing that can handle both hardware and software tasks. The algorithms proposed reuse hardware tasks to reduce reconfiguration overhead, migrate tasks between software/hardware, and give priority to hardware tasks. Results obtained indicate that adding a software processor element not only adds flexibility, but also increases system performance. Two on-line schedulers were designed and implemented. RCSched-I is a simple based implementation that nominates the first available free Partial Reconfigurable Region (PRR) for new tasks. RCSched-II on the other hand nominates any free PRR. Both schedulers check the nominated PRR(s) against the ready task for a match, then decide if there is a need for reconfiguration or not. RCSched-II reconfigures the least recently configured PRR, which increases hardware tasks reuse and decreases total processing time.

关键词： Reconfigurable computing Reconfigurable OS Partial Reconfiguration Scheduling Hardware tasks Hardware OS Task Migration

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Performance Portability with the Chapel Language

Performance Portability with the Chapel Language

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Sidelnik, Albert Maleki, Saeed Chamberlain, Bradford L. Garzaran, Maria J. Padua, David Univ Illinois Dept Comp Sci 1304 W Springfield Ave Urbana IL 61801 USA Cary Inc Seattle WA USA

ISBN: (纸本)9780769546759

It has been widely shown that high-throughput computing architectures such as GPUs offer large performance gains compared with their traditional low-latency counterparts for many applications. The downside to these architectures is that the current programming models present numerous challenges to the programmer: lower-level languages, loss of portability across different architectures, explicit data movement, and challenges in performance optimization. This paper presents novel methods and compiler transformations that increase programmer productivity by enabling users of the language Chapel to provide a single code implementation that the compiler can then use to target not only conventional multiprocessors, but also high-throughput and hybrid machines. Rather than resorting to different parallel libraries or annotations for a given parallel platform, this work leverages a language that has been designed from first principles to address the challenge of programming for parallelism and locality. This also has the advantage of providing portability across different parallel architectures. Finally, this work presents experimental results from the Parboil benchmark suite which demonstrate that codes written in Chapel achieve performance comparable to the original versions implemented in CUDA on both GPUs and multicore platforms.

关键词： parallel architectures

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An Extended PRAM-NUMA Model of Computation for TCF Programming

An Extended PRAM-NUMA Model of Computation for TCF Programmi...

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Forsell, Martti Leppanen, Ville VTT Tech Res Ctr Finland Platform Architectures Team Box 1100 FI-90571 Oulu Finland Turku Univ Dept Informat Technol FI-20014 Turku Finland

ISBN: (纸本)9780769546766

The parallel Random Access Machine - Non Uniform Memory Access (PRAM-NUMA) model of computation can be used to implement efficient emulated shared memory (ESM) computers for general purpose parallel applications and yet support sequential and NUMA legacy code and avoid loss of performance in applications with low parallelism. While programming of these computers is provably easy, there is still room for improvement since they make implementing time-shared multitasking expensive, sometimes replicate much of the execution unnecessarily, and force a programmer to use looping and conditional control primitives in the case the application parallelism does not match the hardware parallelism. Thick Control Flow (TCF) is a parallel programming model that does not provide a fixed number of threads like PRAM-NUMA but a number of control flows that have certain thickness that can vary according to needs of the application catching the best parts of the dynamicism and generality of the original unbounded PRAM model and simplicity of the Single Instruction Stream Multiple Data Streams (SIMD) model. In this paper we study implementing the TCF model on a top of the PRAM-NUMA model and propose an extended PRAM-NUMA model that makes this straight-forward. Architectural implementation and programming of the extended model are discussed with short examples.

关键词： parallel computing models of computation programming model PRAM NUMA Thick control flow

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Modeling and Analysis for Performance and Power

Modeling and Analysis for Performance and Power

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Choi, Jee Whan Vuduc, Richard W. Georgia Inst Technol Atlanta GA 30332 USA

ISBN: (纸本)9780769546766

Accurately modeling application performance for specific architectures allows us to understand and analyze the impact of various architectural features on performance which will ultimately lead to improved performance and better architecture design choices for efficiency and scalability on future systems. Moreover, with the end of Dennard scaling, processors can no longer maintain constant power per unit area as before and consequently power and energy efficiencies has become arguably an even more important factor than performance for future systems. In this paper we propose to search for a method of modeling that, given an application, extract a unique set of performance-influencing features and automatically determine and match them to relevant architecture-specific features for the purpose of deriving accurate models for performance, energy and power. Different applications will display different sets of features which will allow for more accurate models and analysis. Ultimately these models will help us to better understand the impact of application and architectural features on performance, energy and power and help us design applications and systems to maximize their efficiencies.

关键词： performance modeling energy and power modeling scientific computing sparse matrix-vector multiply lattice quantum chromodynamics fast multipole method

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Scheduling Closed-Nested Transactions in distributed Transactional Memory

Scheduling Closed-Nested Transactions in Distributed Transac...

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Kim, Junwhan Ravindran, Binoy Virginia Tech ECE Dept Blacksburg VA 24061 USA

ISBN: (纸本)9780769546759

distributed software transactional memory (D-STM) is an emerging, alternative concurrency control model for distributed systems that promises to alleviate the difficulties of lock-based distributed synchronization-e.g., distributed deadlocks, livelocks, and lock convoying. We consider Herlihy and Sun's dataflow D-STM model, where objects are migrated to invoking transactions, and the closed nesting model of managing inner (distributed) transactions. We present a transactional scheduler called, reactive transactional scheduler (or RTS) to boost the throughput of closed-nested transactions. RTS determines whether a conflicting parent transaction must be aborted or enqueued according to the level of contention. If a transaction is enqueued, its nested inner transactions do not have to retrieve objects again, resulting in reduced communication delays. Our implementation of RTS in the HyFlow D-STM framework and experimental evaluations reveal that RTS improves throughput over D-STM without RTS, by as much as 88%.

关键词： Software Transactional Memory Closed-Nested Transactions Transactional Scheduling distributed Systems

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Meteor Shower: A Reliable Stream Processing System for Commodity Data Centers

Meteor Shower: A Reliable Stream Processing System for Commo...

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Wang, Huayong Peh, Li-Shiuan Koukoumidis, Emmanouil Tao, Shao Chan, Mun Choon MIT Comp Sci & Artificial Intelligence Lab Cambridge MA 02139 USA Natl Univ Singapore Sch Comp Singapore Singapore

ISBN: (纸本)9780769546759

Large-scale failures are commonplace in commodity data centers, the major platforms for distributed Stream Processing Systems (DSPSs). Yet, most DSPSs can only handle single-node failures. Here, we propose Meteor Shower, a new fault-tolerant DSPS that overcomes large-scale burst failures while improving overall performance. Meteor Shower is based on checkpoints. Unlike previous schemes, Meteor Shower orchestrates operators' checkpointing activities through tokens. The tokens originate from source operators, trickle down the stream graph, triggering each operator that receives these tokens to checkpoint its own state1. Meteor Shower is a suite of three new techniques: 1) source preservation, 2) parallel, asynchronous checkpointing, and 3) application-aware checkpointing. Source preservation allows Meteor Shower to avoid the overhead of redundant tuple saving in prior schemes;parallel, asynchronous checkpointing enables Meter Shower operators to continue processing streams during a checkpoint;while application-aware checkpointing lets Meteor Shower learn the changing pattern of operators' state size and initiate checkpoints only when the state size is minimal. All three techniques together enable Meteor Shower to improve throughput by 226% and lower latency by 57% vs prior state-of-the-art. Our results were measured on a prototype implementation running three real world applications in the Amazon EC2 Cloud.

关键词： stream computing fault tolerance reliability

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HydEE: Failure Containment without Event Logging for Large Scale Send-Deterministic MPI Applications

HydEE: Failure Containment without Event Logging for Large S...

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Guermouche, Amina Ropars, Thomas Snir, Marc Cappello, Franck INRIA Saclay Ile France F-91405 Orsay France Ecole Polytech Fed Lausanne Lausanne Switzerland Univ Illinois Urbana IL 60680 USA

ISBN: (纸本)9780769546759

High performance computing will probably reach exascale in this decade. At this scale, mean time between failures is expected to be a few hours. Existing fault tolerant protocols for message passing applications will not be efficient anymore since they either require a global restart after a failure (checkpointing protocols) or result in huge memory occupation (message logging). Hybrid fault tolerant protocols overcome these limits by dividing applications processes into clusters and applying a different protocol within and between clusters. Combining coordinated checkpointing inside the clusters and message logging for the inter-cluster messages allows confining the consequences of a failure to a single cluster, while logging only a subset of the messages. However, in existing hybrid protocols, event logging is required for all application messages to ensure a correct execution after a failure. This can significantly impair failure free performance. In this paper, we propose HydEE, a hybrid rollback-recovery protocol for send-deterministic message passing applications, that provides failure containment without logging any event, and only a subset of the application messages. We prove that HydEE can handle multiple concurrent failures by relying on the send-deterministic execution model. Experimental evaluations of our implementation of HydEE in the MPICH2 library show that it introduces almost no overhead on failure free execution.

关键词： High performance computing MPI fault tolerance send-determinism failure containment

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Provisioning Policies for Elastic computing Environments

Provisioning Policies for Elastic Computing Environments

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26th IEEE international parallel and distributed Processing symposium (IPDPS) / Workshop on High Performance Data Intensive computing

作者： Marshall, Paul Tufo, Henry Keahey, Kate Univ Colorado Dept Comp Sci Boulder CO 80309 USA Argonne Natl Lab Argonne IL 60439 USA

ISBN: (纸本)9780769546766

Resources experience dynamic load as demand fluctuates. Therefore, resource providers must estimate the appropriate amount of resources to purchase in order to meet variable user demand. With the relatively recent introduction of infrastructure-as-a-service (IaaS) clouds (e. g. Amazon EC2) resource providers may choose to outsource demand as needed. As a result, a resource provider may decide to decrease his initial capital outlay and purchase a smaller resource that meets the needs of his users the majority of the time while budgeting for future outsourcing costs. When bursts in demand exceed the capacity of the resource, a resource provider can use elastic computing to outsource excess demand to IaaS clouds based on a defined budget. To create efficient elastic environments, existing services must be extended with elastic computing functionality and resource provisioning policies that match resource deployments with demand must be developed. In this paper we consider an elastic environment that extends a local cluster resource with IaaS resources. We present resource provisioning policies to dynamically match resource supply with demand. Our policies balance the requirements of users and administrators, such as minimizing the monetary cost of the IaaS deployment and reducing job queued time. We develop a discrete event simulator, the elastic cloud simulator (ECS), to evaluate our policies using scientific workloads. Our results demonstrate that by outsourcing on a flexible basis instead of simply provisioning the maximum number of instances preemptively, we reduce the average queued time by up to 58% and cost by 38%. Our results also demonstrate that our multi-variable policies provide more flexibility in balancing budget and time requirements than typical single-variable reference policies, giving resource providers controls to manage their elastic environments.

关键词： Infrastructure-as-a-Service cloud computing elastic computing

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