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Towards the Acceleration of the Sparse Blossom Algorithm for Quantum Error Correction

Towards the Acceleration of the Sparse Blossom Algorithm for...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Marco Venere Valentino Guerrini Beatrice Branchini Davide Conficconi Donatella Sciuto Marco D. Santambrogio Dipartimento di Elettronica Informazione e Bioingegneria Politecnico di Milano Milan Italy

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

Quantum computing is a new computing paradigm that exploits laws of quantum mechanics to achieve an exponential speedup compared to classical logic. However, noise strongly limits current quantum hardware, reducing achievable performance. Quantum Error Correction (QEC) techniques are a valuable approach to reduce the effects of noise. Nevertheless, the high computational complexity of QEC algorithms is incompatible with the tight time constraints of quantum devices. Thus, hardware acceleration is paramount to achieving real-time QEC. This work represents the first step in the FPGA acceleration of the Sparse Blossom Algorithm (SBA), a state-of-the-art decoding algorithm for QEC. We provide a performance profiling and a design methodology for the hardware development of the SBA. We evaluate the execution time, and energy efficiency of our solution, attaining up to 2.75× speedup and 9.59× improvement in energy efficiency compared to the software baseline.

关键词： Performance evaluation Quantum computing Software algorithms Noise Quantum mechanics Energy efficiency Error correction

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Developing AI Applications for the HPC-Cloud Continuum with ColonyOS

Developing AI Applications for the HPC-Cloud Continuum with ...

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international symposium on parallel and distributed computing

作者： Johan Kristiansson Thor Wikfeldt Department of Computer Science RISE Research Institutes of Sweden Luleå Sweden

ISBN: (数字)9798350369199

ISBN: (纸本)9798350369205

Artificial Intelligence (AI) and machine learning have seen significant growth in recent years, leading to an increased demand for computational resources. To meet this demand and to boost Europe’s competitive edge, the European Commission has built several supercomputers across the continent. However, these traditional supercomputers often lack modern APIs and automation tools necessary for AI development. This paper outlines how High-Performance computing (HPC) systems and cloud platforms can be seamlessly integrated using ColonyOS, an open-source meta-operating system designed to connect and integrate diverse computing environments into a cohesive compute continuum. ColonyOS enables development of AI workflows that are portable across HPC systems and cloud environments, including Kubernetes, Docker, and Slurm. This integration makes it possible to develop automation workflows, such as training AI models on HPC systems and automatically deploy trained models to cloud platforms for inference. The paper details the architecture of ColonyOS and how it can be used to build AI applications that can run in an HPC-Cloud Continuum. This will be exemplified through a satellite image segmentation case study, showcasing the benefits of combining the Leonardo EuroHPC supercomputer with a Kubernetes cluster. Ultimately, ColonyOS paves the way for hyper-distributed AI applications that can seamlessly utilize both cloud and HPC systems, including existing EuroHPC supercomputers.

关键词： Training Image segmentation Automation Computational modeling High performance computing Europe Machine learning Supercomputers Satellite images Artificial intelligence

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SchedInspector: A Batch Job Scheduling Inspector Using Reinforcement Learning 22

SchedInspector: A Batch Job Scheduling Inspector Using Reinf...

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31st international symposium on High-Performance parallel and distributed computing (HPDC)

作者： Zhang, Di Dai, Dong Xie, Bing Univ North Carolina Charlotte Comp Sci Dept Charlotte NC 28223 USA Oak Ridge Natl Lab Oak Ridge Leadership Comp Facil Oak Ridge TN USA

ISBN: (纸本)9781450391993

Improving the performance of job executions is an important goal of HPC batch job schedulers, such as minimizing job waiting time, slowdown, or completion time. Such a goal is often accomplished using carefully designed heuristics based on job features, such as job size and job duration. However, these heuristics overlook important runtime factors (e.g., cluster availability and waiting job patterns), which may vary across time and make a previously sound scheduling decision not hold any longer. In this study, we propose a new approach to incorporate runtime factors into batch job scheduling for better job execution performance. The key idea is to add a scheduling inspector on top of the base job scheduler to scrutinize its scheduling decisions. The inspector will take the runtime factors into consideration and accordingly determine the fitness of the scheduled job. It then either accepts the scheduled job or rejects it and asks the base schedulers to try again later. We realize such an inspector, namely SchedInspector, by leveraging the intelligence of reinforcement learning. Through extensive experiments, we show SchedInspector can intelligently integrate the runtime factors into various batch job scheduling policies, including the state-of-the-art one, to gain better job execution performance, such as smaller average bounded job slowdown (up to 69% better) or average job waiting time (up to 52% better), across various real-world workloads. We also show that although rejecting scheduling decisions may leave the resources idle hence affect the system utilization, SchedInspector is able to achieve the job execution performance improvement with marginal impact on the system utilization (typically less than 1%). We consider one key advantage of SchedInspector is it automatically learns to work with and improve existing job scheduling policies without changing them, which makes it promising to serve as a generic enhancer for various batch job scheduling policies.

关键词： High Performance computing (HPC) batch job scheduling reinforcement learning

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Proactive SLA-aware Application Placement in the computing Continuum

Proactive SLA-aware Application Placement in the Computing C...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Zahra Najafabadi Samani Narges Mehran Dragi Kimovski Radu Prodan Institute of Information Technology Alpen-Adria-Universität Klagenfurt Austria

The accelerating growth of modern distributed applications with low delivery deadlines leads to a paradigm shift towards the multi-tier computing continuum. However, the geographical dispersion, heterogeneity, and availability of the continuum resources may result in failures and quality of service degradation, significantly negating its advantages and lowering users’ satisfaction. We propose in this paper a proactive application placement (PROS) method relying on distributed coordination to prevent the quality of service violations through service-level agreements on the computing continuum. PROS employs a sigmoid function with adaptive weights for the different parameters to predict the service level agreement assurance of devices based on their past credentials and current capabilities. We evaluate PROS using two application workloads with different traffic stress levels up to 90 million services on a real testbed with 600 heterogeneous instances deployed over eight geographical locations. The results show that PROS increases the success rate by 7%–33%, reduces the response time by 16%–38%, and increases the deadline satisfaction rate by 19%–42% compared to two related work methods. A comprehensive simulation study with 1000 devices and a workload of up to 670 million services confirm the scalability of the results.

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A Methodology for computing Irrational Numbers

A Methodology for Computing Irrational Numbers

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international symposium on parallel and distributed computing

作者： Thomas Keller Michael Burch Heiko Rölke University of Applied Sciences DAViS Chur Switzerland

ISBN: (数字)9798350369199

ISBN: (纸本)9798350369205

Irrational numbers are difficult to compute due to their non-rational nature, i.e. they cannot just be expressed as a ratio consisting of two integer numbers. Various examples of these irrational constants exist, like the circle’s circumference to its diameter $\pi$, Euler’s number e, the Golden ratio $\phi$, or the square roots of 2,3, or 5, and the like. Irrational numbers can be expressed as a sequence of decimal digits just like other real numbers, however, they do not terminate nor do they contain some kind of repeating number pattern. The goal of our work is to efficiently compute and store a very large irrational number by computing as many digits as possible. This test is designed to improve our ability to compute and process extremely large datasets in order to prepare ourselves for future real-world applications based on computational-intensive data analytics concepts, hence high-performance computing is required to solve such data-related problems. To reach these goals we make use of two AMD processors with one terabyte of RAM and 64 cores in total, and an aggregated 510 terabytes of disk space. To run such a computation, we employ 38 hard disk drives running at $7,200 \mathrm{rpm}. 34$ of these disks are used as swap space and 4 disks will hold the final digits. We illustrate our approach by applying it to the irrational number $\pi$ and compute 62.8 trillion decimal places of it. Finally, we discuss scalability issues, limitations, challenges, and future directions of our methodology.

关键词： Program processors Data analysis Scalability High performance computing Random access memory Hard disks distributed computing

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Systematic Literature Review of VANET Simulators: Comparative Analysis, Technological Advancements, and Research Challenges

Systematic Literature Review of VANET Simulators: Comparativ...

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parallel computing and distributed Systems (PCDS), international symposium on

作者： Reham Almutairi Giacomo Bergami Graham Morgan School of Computing Newcastle University UK College of Computer Science and Engineering University of Hafr Albatin Saudi Arabia School of Computing Newcastle University Newcastle Upon Tyne UK

ISBN: (数字)9798350349658

ISBN: (纸本)9798350349665

Vehicular Ad-hoc Networks (VANETs) are integral to the future of smart vehicles and transportation, facilitating real-time information sharing and communication among vehicles to enhance safety, improve traffic flow, and reduce accidents. With the rise of self-driving vehicles and emerging technologies such as 5G and edge computing, new challenges arise for VANET simulators. These simulators must now accommodate dynamic environments, necessitating features such as high scalability, real-time large-scale experiment support, and node mobility. Furthermore, they should support battery management, recharging during movement, and integrate renewable energy sources. This survey evaluates current VANET simulators against these criteria, comparing their features, discussing advancements in VANET technology, and identifying ongoing research challenges. Our findings reveal that no existing VANET simulator fully supports the integration of renewable energy sources or the real-time recharging of vehicle batteries. Additionally, there is a significant gap in simulating the effects of encryption without implementing specific encryption algorithms.

关键词： Renewable energy sources 5G mobile communication Vehicular ad hoc networks Transportation Battery management systems Real-time systems Encryption Batteries Testing Edge computing

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Voxelization of Moving Deformable Geometries on GPU

Voxelization of Moving Deformable Geometries on GPU

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international symposium on parallel and distributed computing

作者： Ronith Kumar Raman Deep Dip Sankar Banerjee Nipun Arora Department of Computer Science and Engineering Indian Institute of Technology Jodhpur India Department of Mechanical Engineering Indian Institute of Technology Jodhpur India

ISBN: (数字)9798350369199

ISBN: (纸本)9798350369205

Voxelization is a standard technique to represent arbitrary shaped geometries on a Cartesian grid. It is often utilized in pre-processing stage of any computational fluid dynamics (CFD) simulation for distinguishing the fluid and solid domain. In addition, identification of boundary fluid nodes in the immediate vicinity of the solid body is extremely crucial for proper imposition of boundary conditions and force evaluation. These nodes are therefore tagged separately and is often termed as surface voxelization. However, this procedure becomes non-trivial and computationally expensive as the complexity of geometry increases, especially if it is deformable and moving. Here voxelization needs to be performed in the solid volume as well, as the nodes keep switching from solid to fluid and vice versa at every iteration. For fluid-structure interaction problems, the analysis of flow behaviour requires an additional operation where the point of intersection of the lattice links connecting the fluid boundary nodes and solid bound nodes need to be further calculated. This ensures that deformation of geometry is properly captured and the correct boundary velocity is enforced onto the fluid (no slip). In this work we present techniques for GPU acceleration of voxelization for moving deformable geometries intended for CFD solvers based on the lattice Boltzmann method (LBM). The proposed techniques show speed-ups of up to 5.1x over equivalent parallel implementations.

关键词： Geometry Fluids Computational fluid dynamics Force Graphics processing units Switches Solids distributed computing Standards Lattice Boltzmann methods

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Multi-domain Resources Scheduling in Edge computing Power Network for IIoT

Multi-domain Resources Scheduling in Edge Computing Power Ne...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Jiarun Zhuang Ming Tao Shuyue Chen Xueqiang Li School of Computer Science and Technology Dongguan University of Technology Dongguan China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

The Industrial Internet of Things (IIoT) imposes strict requirements on task processing delays. To ensure low-latency services, the edge computing Power Network (CPN) integrates various multi-domain resources, including computing, storage and communication, enabling fast processing and responsiveness. However, the performance of the CPN is significantly influenced by the scheduling scheme for these multi-domain resources. To explore an optimal scheduling scheme, this paper proposes a mathematical optimization model for the resource scheduling problem. The problem is then transformed into a Markov Decision Process (MDP) and the Discrete Probabilistic Deep Deterministic Policy Gradient (DP-DDPG) algorithm, which modifies the actor network of the original DDPG to output a discrete probability vector, is introduced to obtain the optimal scheme. Experimental results demonstrate that the proposed approach reduces latency within the constraints of limited multi-domain resources, validating its feasibility and effectiveness in IIoT scenarios.

关键词： Job shop scheduling Processor scheduling Optimization models Markov decision processes Optimal scheduling Probabilistic logic Vectors Resource management Industrial Internet of Things Edge computing

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INT Based Network-Aware Task Scheduling for Edge computing

INT Based Network-Aware Task Scheduling for Edge Computing

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Shreshta, Bibek Cziva, Richard Arslan, Engin Univ Nevada Comp Sci & Engn Reno NV 89557 USA Lawrence Berkeley Natl Lab Energy Sci Network Berkeley CA USA

ISBN: (纸本)9781665435772

Edge computing promises low-latency computation for delay sensitive applications by processing data close to its source. Task scheduling in edge computing is however not immune to performance fluctuations as dynamic and unpredictable nature of network traffic can adversely affect the data transfer performance between end devices and edge servers. In this paper, we leverage In-band Network Telemetry (INT) to gather fine-grained, temporal statistics about network conditions and incorporate network-awareness into task scheduling for edge computing. Unlike legacy network monitoring techniques that collect port-level or flow-level statistics at the order of tens of seconds, INT offers highly accurate network visibility by capturing network telemetry at packet-level granularity, thereby presenting a unique opportunity to detect network congestion precisely. Our experimental analysis using various workload types and network congestion scenarios reveal that enhancing task scheduling of edge computing with high-precision network telemetry can lead up to 40% reduction in data transfer times and up to 30% reduction in total task execution times by favoring edge servers in uncongested (or mildly congested) sections of network when scheduling tasks.

关键词： Scheduling In-network Telemetry P4 Edge-computing

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parallel And-Inverter Graph Simulation Using a Task-graph computing System

Parallel And-Inverter Graph Simulation Using a Task-graph Co...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Elmir Dzaka Dian-Lun Lin Tsung-Wei Huang Department of Electrical and Computer Engineering University of Utah Salt Lake City UT

Acquiring significant speedup in gate-level simulation has proven challenging due to limitations such as synchronization and partition overhead. As a result, serial event-driven simulation remains the industry standard despite its slow runtime performance. This paper presents the utilization of Taskflow, a task-graph computing system, to effectively enhance the speedup of gate-level simulation. Taskflow provides solutions to challenges faced in previous attempts at parallelizing gate-level simulation, such as scalable pipelines, conditional tasking, and heterogeneous work stealing. The focus of the paper is on improving speedup within and-inverter graphs, which are used to represent structural implementations of circuits at the gate-level. Experimental results demonstrate significant speedup within and-inverter graph benchmarks.

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