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Communication-Computation Overlapping for parallel Multigrid Methods

Communication-Computation Overlapping for Parallel Multigrid...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Kengo Nakajima Information Technology Center/R-CCS The University of Tokyo/RIKEN Tokyo Japan

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

Preconditioned iterative methods based on the Krylov subspace technique are widely employed in various scientific and technical computing. When utilizing large-scale parallel computing systems, the communication overhead tends to increase with the growth in the number of nodes, making its reduction a crucial challenge. In parallel finite element methods (FEM) and finite volume methods (FVM), halo communication and computation overlapping (CC-Overlapping) are commonly employed, often in conjunction with the dynamic loop scheduling feature of OpenMP. This approach has been primarily applied to sparse matrix-vector products (SpMV) and explicit solvers. Previous studies by the author have proposed reordering techniques for applying CC-Overlapping to processes involving global data dependencies, such as the Conjugate Gradient method preconditioned by Incomplete Cholesky Factorization (ICCG). Successful implementations on massively parallel supercomputers demonstrated high parallel performance, but the application of CC-Overlapping was limited to SpMV. In the present work, the author proposes a method to apply CC-Overlapping to the forward and backward substitutions of the IC(0) smoother of the parallel Conjugate Gradient method preconditioned by Multigrid (MGCG). Using up to 4,096 nodes on Wisteria/BDEC-01 (Odyssey) with A64FX, performance improvement of approximately 40+% was achieved compared to the original implementation, while improvement was 20+% on 1,024 nodes of Oakbridge-CX system with Intel Xeon CPU's.

关键词： Gradient methods Processor scheduling Multigrid methods parallel processing Dynamic scheduling Supercomputers Finite element analysis

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Effective implementation of the High Performance Conjugate Gradient benchmark on GraphBLAS

Effective implementation of the High Performance Conjugate G...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Alberto Scolari Albert-Jan Yzelman Computing Systems Laboratory Zurich Research Center Huawei Technologies Switzerland

Applications in High-Performance computing (HPC) environments face challenges due to increasing complexity. Among them, the increasing usage of sparse data pushes the limits of data structures and programming models and hampers the efficient usage of existing, highly parallel hardware. The GraphBLAS specification tackles these challenges by proposing a set of data containers and primitives, coupled with a semantics based on abstract algebraic concepts: this allows multiple applications on sparse data to be described with a small set of primitives and benefit from the many optimizations of a compile-time-known algebraic specification. Among HPC applications, the High Performance Conjugate Gradient (HPCG) benchmark is an important representative of a large body of sparse workloads, and its structure poses several programmability and performance challenges. This work tackles them by proposing and evaluating an implementation on GraphBLAS of HPCG, highlighting the main changes to its kernels. The results for shared-memory systems outperforms the reference, while results in distributed systems highlight fundamental limitations of GraphBLAS-compliant implementations, which suggests several future directions.

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Unlocking the Potential: Performance Portability of Graph Algorithms on Kokkos Framework

Unlocking the Potential: Performance Portability of Graph Al...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Shaikh Arifuzzaman Hasan S. Arikan M.A.M. Faysal Maximilian Bremer John Shalf Doru Popovici University of Nevada Las Vegas (UNLV) USA Lawrence Berkeley National Laboratory USA

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

Graph algorithms are fundamental tools for deriving valuable insights from complex network structures. As network data grows in scale, and hardware architecture becomes more diverse than ever, the demand for efficient and portable graph algorithms has surged. The Kokkos framework has emerged as a promising solution for achieving high performance and portability in parallel computing applications. This paper presents a thorough evaluation of Kokkos-implemented triangle counting, an important graph kernel. Employing diverse algorithmic and implementation methods, we benchmark Kokkos-enabled graph algorithms targeting CPUs and GPUs. We explore the impact of both graph properties and Kokkos' parallel execution model on algorithmic efficiency. Our results indicate that thread scheduling can improve performance by up to 10×,data structure choice by 6 ×, and configuring the parallel hierarchy based on degree properties can result in a remarkable 300 ×difference in performance over untuned implementations on Kokkos.

关键词： distributed processing Conferences Computational modeling Computer architecture Complex networks parallel processing Benchmark testing

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Proceedings - 2022 10th international symposium on computing and Networking Workshops, CANDARW 2022

Proceedings - 2022 10th International Symposium on Computing...

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10th international symposium on computing and Networking Workshops, CANDARW 2022

ISBN: (纸本)9781665475327

The proceedings contain 72 papers. The topics discussed include: causality-aware metadata propagation scheme for federated social network servers;a portable time synchronization method using eBPF;an evacuation system using autonomous clustering-based MANET for sharing disaster information;ALR switching and routing strategy for multiple sites based on traffic splitting method for power saving;measurement of pH in the cow’s rumen for high- quality dairy product;delivery routing to reduce calculation load of drones on divided logistics areas for drone logistics networks;construction of hierarchical matrix on distributed memory systems using a task parallel language;communication size reduction of federated learning based on neural ODE model;accelerating next generation genome sequencing leveraging high bandwidth memory on FPGAs;and a packet routing using lightweight reinforcement learning based on online sequential learning.

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Joint Optimization of Data Caching and Task Scheduling based on Information Entropy for Mobile Edge computing 19

Joint Optimization of Data Caching and Task Scheduling based...

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19th IEEE international symposium on parallel and distributed Processing with Applications (IEEE ISPA)

作者： Wang, Pengwei Zhao, Yajun Zhang, Zhaohui Donghua Univ Sch Comp Sci & Technol Shanghai 201620 Peoples R China Minist Educ Engn Res Ctr Digitalized Text & Fash Technol Shanghai 201620 Peoples R China

ISBN: (纸本)9781665435741

The rise of 5G technology has prompted the emergence of mobile edge computing (MEC), which deploys edge servers at the edge of networks to process task requests. Most work on MEC considers either data caching or task scheduling, but not their combination. However, the two are related, and should be considered together. We do so in this work, with the aim to reduce the average response delay of user task requests. A multi-index collaborative cache replacement (MCCR) algorithm based on the theory of information entropy is proposed, which considers the priority, replacement cost, and size of cached data, so as to replace data with low caching value. An effective task scheduling algorithm, NHSA-MCCR, based on the nearest hierarchical scheduling strategy (NHSA) and MCCR, is then proposed. Experiments are conducted to evaluate the performance of our proposed algorithms, whose results show that MCCR is superior to other caching algorithms in terms of cache hit rate, and that NHSA-MCCR can achieve lower response delay and energy consumption than other scheduling algorithms.

关键词： Mobile edge computing Data caching Task scheduling Information entropy

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An architecture interface and offload model for low-overhead, near-data, distributed accelerators 55

An architecture interface and offload model for low-overhead...

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55th Annual IEEE/ACM international symposium on Microarchitecture (MICRO)

作者： Baskaran, Saambhavi Kandemir, Mahmut Taylan Sampson, Jack Penn State Univ University Pk PA 16802 USA

ISBN: (数字)9781665462723

ISBN: (纸本)9781665462723

The performance and energy costs of coordinating and performing data movement have led to proposals adding compute units and/or specialized access units to the memory hierarchy. However, current on-chip offload models are restricted to fixed compute and access pattern types, which limits software-driven optimizations and the applicability of such an offload interface to heterogeneous accelerator resources. This paper presents a computation offload interface for multi-core systems augmented with distributed on-chip accelerators. With energy-efficiency as the primary goal, we define mechanisms to identify offload partitioning, create a low-overhead execution model to sequence these fine-grained operations, and evaluate a set of workloads to identify the complexity needed to achieve distributed near-data execution. We demonstrate that our model and interface, combining features of dataflow in parallel with near-data processing engines, can be profitably applied to memory hierarchies augmented with either specialized compute substrates or lightweight near-memory cores. We differentiate the benefits stemming from each of elevating data access semantics, near-data computation, inter-accelerator coordination, and compute/access logic specialization. Experimental results indicate a geometric mean (energy efficiency improvement;speedup;data movement reduction) of (3.3;1.59;2.4)x, (2.46;1.43;3.5)x and (1.46;1.65;1.48)x compared to an out-of-order processor, monolithic accelerator with centralized accesses and monolithic accelerator with decentralized accesses, respectively. Evaluating both lightweight core and CGRA fabric implementations highlights model flexibility and quantifies the benefits of compute specialization for energy efficiency and speedup at 1.23x and 1.43x, respectively.

关键词： distributed accelerator near-data offload energy efficiency heterogeneous architecture interface

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Performance Comparison for Scientific Computations on the Edge via Relative Performance

Performance Comparison for Scientific Computations on the Ed...

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Sankaran, Aravind Bientinesi, Paolo Rhein Westfal TH Aachen IRTG Modern Inverse Problems Aachen Germany Umea Univ Dept Comp Sci Umea Sweden

ISBN: (纸本)9781665435772

In a typical Internet-of-Things setting that involves scientific applications, a target computation can be evaluated in many different ways depending on the split of computations among various devices. On the one hand, different implementations (or algorithms)-equivalent from a mathematical perspective-might exhibit significant difference in terms of performance. On the other hand, some of the implementations are likely to show similar performance characteristics. In this paper, we focus on analysing the performance of a given set of algorithms by clustering them into performance classes. To this end, we use a measurement-based approach to evaluate and score algorithms based on pair-wise comparisons;we refer to this approach as "Relative performance analysis". Each comparison yields one of three outcomes: one algorithm can be "better", "worse", or "equivalent" to another;those algorithms evaluating to have "equivalent" performance are merged into the same performance class. We show that our clustering methodology facilitates algorithm selection with respect to more than one metric;for instance, from the subset of equivalently fast algorithms, one could then select an algorithm that consumes the least energy on a certain device.

关键词： performance analysis algorithm ranking clustering scientific computing distributed computing edge computing

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A Blockchain-based Verified Locating Scheme for IoT Devices 19

A Blockchain-based Verified Locating Scheme for IoT Devices

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19th IEEE international symposium on parallel and distributed Processing with Applications (IEEE ISPA)

作者： Guan, Zhenyu Wen, Xiaoqing Li, Dawei Xu, Mai Li, Haihua Beihang Univ Sch Cyber Sci & Technol Beijing Peoples R China Beihang Univ Sch Elect & Informat Engn Beijing Peoples R China China Acad Informat & Commun Technol Beijing Peoples R China

ISBN: (纸本)9781665435741

Recently, with the rapid growth of IoT devices followed by the rise of Location-Based Services, location is playing an increasingly important role in the Internet of Things. How to acquire the accurate and real-time location of IoT devices has become a significant issue which attracts many attentions. However, some existing IoT devices do not have the ability to actively locate themselves. Meanwhile, the tampering and forgery of location also occur at times. To address these challenges, blockchain-based verified locating scheme is proposed in this paper. We embed location fingerprint as the supplement of GPS, which provides location for locating-unabled devices and increases the cost of attacks aiming at location. Besides, blockchain is leveraged in this system to model the locating environment for IoT device. The location fingerprint database on the chain guards the security of fingerprint and provides a channel for online updating and data sharing. By combining the smart contract and off-chain computing, the fingerprint locating algorithm is deployed on the blockchain, which ensures the credibility of locating through distributed computing. Finally, the scheme is implemented on the Fabric in form of chaincode and the experimental results validate the practical value of system proposed.

关键词： Blockchain Internet of Thing smart contract location off-chain computing

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SRNoC: A Statically-Scheduled Circuit-Switched Superconducting Race Logic NoC 35

SRNoC: A Statically-Scheduled Circuit-Switched Superconducti...

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Michelogiannakis, George Lyles, Darren Gonzalez-Guerrero, Patricia Bautista, Meriam Vasudevan, Dilip Butko, Anastasiia Lawrence Berkeley Natl Lab Berkeley CA 94720 USA

ISBN: (纸本)9781665440660

Temporal encoding has been shown to be a natural fit for single flux quantum (SFQ) superconducting computing since SFQ already encodes information with the presence or absence of voltage pulses. However, past work in SFQ has focused on binary-encoded networks on chip (NoCs). In this paper, we propose superconducting rotary NoC (SRNoC), a NoC where both data and control paths operate in the tempo ral domain following the race logic (RL) convention. Therefore, SFQ chips with temporal compute or memory can use SRNoC to avoid converting between the temporal and binary domains that would result from using a binary-encoded NoC. Using RL also enables SRNoC to be area-efficient, mitigating SFQ technology's low device density. SRNoC treats pulses as independent packets and delivers them to outputs without changing their value, i.e. preserving the RL convention. SRNuC operates on a fixed, rotating connection schedule between inputs and outputs. In each connection window, multiple pulses (packets) can he transmitted sequentially. SRNoC provides 13.1 x higher throughput per port per Josephson junction (JJ) compared to the best-performing of three demonstrated NoCs.

关键词： Performance evaluation Schedules distributed processing Quantum computing Superconducting logic circuits Throughput Josephson junctions

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FRAME 2022: The 2nd Workshop on Flexible Resource and Application Management on the Edge 22

FRAME 2022: The 2nd Workshop on Flexible Resource and Applic...

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31st international symposium on High-Performance parallel and distributed computing (HPDC)

作者： Ferrucci, Luca Coppola, Massimo Kavalionak, Hanna Kontopoulos, Ioannis ISTI Consiglio Nazl Ric Pisa Italy Harokopio Univ Athens Athens Greece

ISBN: (纸本)9781450391993

The 2nd internationalWorkshop on Flexible Resource and Application Management on the Edge (FRAME 2022) is dedicated to the so-called Cloud/Edge Continuum, where Cloud and Edge infrastructures can work together to fulfill requirements from a variety of NextGen applications. Clouds provide appropriate levels of performance to large groups of different users, whereas Edge resources act as a first layer of computing capacity that is closer to the user, to reduce the service latency. With respect to Clouds, Edge infrastructures typically are composed of heterogeneous and constrained resources and introduce new challenges from the viewpoint of security, orchestration and resource management. Tackling these new issues calls for innovative combinations of tools and abstractions, where AI and machine learning techniques complement algorithmic orchestration and optimization, bringing about new levels of distributed adaptivity and self-management. As real-time data-driven decisions can be promptly taken on the spot, without the need to wait for data to travel to the Cloud and back, also interactive and time-sensitive services like the immersive data processing of Extended Reality (XR) applications can be partially extended toward the edge, thus exploiting a better computation to communication tradeoff and smoother connections to improve their QoE and remote collaboration. The FRAME'22 workshop proceedings are available at: https://***/***?id=3526059.

关键词： network mobility edge storage autonomic management federated learning cloud computing resource management artificial intelligence edge continuum virtualization 3d point cloud cloud federation edge computing machine learning edge orchestration

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