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Interpreting Write Performance of Supercomputer I/O Systems with Regression Models 35

Interpreting Write Performance of Supercomputer I/O Systems ...

引用

35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Xie, Bing Tan, Zilong Carns, Philip Chase, Jeff Harms, Kevin Lofstead, Jay Oral, Sarp Vazhkudai, Sudharshan S. Wang, Feiyi Oak Ridge Natl Lab Oak Ridge TN 37830 USA Carnegie Mellon Univ Pittsburgh PA 15213 USA Argonne Natl Lab Lemont IL USA Duke Univ Durham NC USA Sandia Natl Labs POB 5800 Albuquerque NM 87185 USA

ISBN: (纸本)9781665440660

This work seeks to advance the state of the art in HPC I/O performance analysis and interpretation. In particular, we demonstrate effective techniques to: (1) model output performance in the presence of I/O interference from production loads;(2) build features from write patterns and key parameters of the system architecture and configurations;(3) employ suitable machine learning algorithms to improve model accuracy. We train models with five popular regression algorithms and conduct experiments on two distinct production HPC platforms. We find that the lasso and random forest models predict output performance with high accuracy on both of the target systems. We also explore use of the models to guide adaptation in I/O middleware systems, and show potential for improvements of at least 15% from model-guided adaptation on 70% of samples, and improvements up to 10x on some samples for both of the target systems.

关键词： high performance computing I/O performance machine learning

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SimV: A Self-extension Similarity Viterbi Algorithm for Service Function Chain Deployment for Multi-access Edge computing

SimV: A Self-extension Similarity Viterbi Algorithm for Serv...

引用

international symposium on parallel and distributed Processing with Applications, ISPA

作者： Wenqiang Deng School of Computer Science Guangzhou College of Applied Science and Technology Zhaoqing China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Advancements in Multi-access Edge computing (MEC) and Network Function Virtualization (NFV) offer a lot of potential for providing flexible and low-latency network services at the edge. In NFV, traditional middleboxes are transformed into Virtual Network Functions (VNFs), which are then combined into Service Function Chains (SFCs) to deliver complex network services. However, the features of MEC hosts and VNFs, along with the heterogeneity of their resources, make it challenging to develop low-latency deployment solutions. In this paper, we formulate the problem of Service Function Chain Deployments in Edge networks to minimize Latency under Heterogeneous conditions (SDELH). To address this problem, we designed a self-extension Similarity Viterbi algorithm (SimV), which contains three sub-algorithms. Firstly, a basic Viterbi algorithm is employed to find the delay-optimized SFC deployment path. Secondly, a similarity algorithm is designed to assess suitable hosts for each VNF to streamline the matching process and reduce the time complexity of the Viterbi algorithm. Lastly, a self-extension method is devised to broaden the solution space for enhancing the SFC acceptance rate. Extensive simulations are conducted. Based on the comparison simulation results, SimV significantly reduces decision time for deployment, and outperforms the compared algorithms in terms of latency, number of accepted requests, and scalability, with average improvements of 20.37%, 6.04%, and 14.49%, respectively.

关键词： distributed processing Multi-access edge computing Viterbi algorithm Service function chaining Scalability Simulation Middleboxes Network function virtualization Low latency communication Time complexity

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Tackling Cold Start in Serverless computing with Multi-Level Container Reuse

Tackling Cold Start in Serverless Computing with Multi-Level...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Amelie Chi Zhou Rongzheng Huang Zhoubin Ke Yusen Li Yi Wang Rui Mao Hong Kong Baptist University Nankai University Guangdong Provincial Key Lab of Popular High Performance Computers Shenzhen University

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

In Serverless computing, function cold-start is a major issue that causes delay of the system. Various solutions have been proposed to address function cold-start issue, among which keeping containers alive after function completion is an easy and commonly adopted way in real serverless clouds. However, when reusing warm containers for function warm starts, existing systems only match functions to containers with the same configurations. This greatly limits the warm resource utilization. Our analysis of real-world applications reveals that many serverless applications share the same operating system and language frameworks. Thus, we propose multi-level container reuse that tries to reduce the startup latency of functions using "similar" containers to greatly improve warm resource utilization. Due to the complexity of selecting the best container reuse solutions, we designed a Deep Reinforcement Learning (DRL) based scheduler to efficiently and effectively address the problem. Moreover, we released a new serverless benchmark named FStartBench that contains detailed package information for comparing the effectiveness of different function cold-start methods. Experiments based on FStartBench show that, given a warm resource pool with fixed size, our DRL-based scheduler can achieve up to 53% reduction on the average function startup latency compared to state-of-the-art solutions.

关键词： distributed processing Operating systems Serverless computing Containers Benchmark testing Deep reinforcement learning Complexity theory

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A Probabilistic Model for Asynchronous Iterative Methods

A Probabilistic Model for Asynchronous Iterative Methods

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Pratik Nayak Hartwig Anzt Karlsruhe Institute of Technology Karlsruhe Germany Technical University of Munich Germany University of Tennessee USA

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

The bulk-synchronous nature of the state-of-the-art iterative algorithms form a hurdle to their scalability. With increasing problem size and the need for hundreds of thousands of computing units, alleviating synchronization bottlenecks is important. Asynchronous methods, which remove these synchronization bottlenecks, and compute on latest available, possibly stale data are an alternative to the synchronous methods. The analysis of these asynchronous methods is particularly challenging due to the stochastic nature of their computation. We present a probabilistic model which can be used to understand the behaviour of these asynchronous methods. Using this model, we analyze two asynchronous iterative methods: asynchronous Richardson and the asynchronous multi-level Schwarz methods, and study the convergence behaviour of these methods from an empirical perspective. We also show that tunable parameters such as the relaxation parameter, wand additive weights in the asynchronous Richardson and asynchronous Schwarz methods, respectively, can be used to improve convergence of the methods, depending on the latency and network characteristics of the machine.

关键词： Analytical models distributed processing Computational modeling Scalability Stochastic processes Probabilistic logic Delays

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Scalable All-pairs Shortest Paths for Huge Graphs on Multi-GPU Clusters 21

Scalable All-pairs Shortest Paths for Huge Graphs on Multi-G...

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30th international symposium on High-Performance parallel and distributed computing (HPDC)

作者： Sao, Piyush Lu, Hao Kannan, Ramakrishnan Thakkar, Vijay Vuduc, Richard Potok, Thomas Oak Ridge Natl Lab Oak Ridge TN 37830 USA Georgia Inst Technol Atlanta GA 30332 USA

ISBN: (纸本)9781450382175

We present an optimized Floyd-Warshall (Floyd-Warshall) algorithm that computes the All-pairs shortest path (Apsp) for GPU accelerated clusters. The Floyd-Warshall algorithm due to its structural similarities to matrix-multiplication is well suited for highly parallel GPU architectures. To achieve high parallel efficiency, we address two key algorithmic challenges: reducing high communication overhead and addressing limited GPU memory. To reduce high communication costs, we redesign the parallel Floyd-Warshall (a) to expose more parallelism, (b) aggressively overlap communication and computation with pipelined and asynchronous scheduling of operations, and (c) tailored MPI-collective. To cope with limited GPU memory, we employ an offload model, where the data resides on the host and is transferred to GPU on-demand. The proposed optimizations are supported with detailed performance models for tuning. Our optimized parallel Floyd-Warshall implementation is up to 5x faster than a strong baseline and achieves 8.1 PetaFLOPS/sec on 256 nodes of the Summit supercomputer at Oak Ridge National Laboratory. This performance represents 70% of the theoretical peak and 80% parallel efficiency. The offload algorithm can handle 2.5x larger graphs with a 20% increase in overall running time.

关键词： Floyd-Warshall algorithm all-pair shortest path semi-ring algebra GPU computing distributed algorithm

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Pose Convolutional Routing Towards Lightweight Capsule Networks

Pose Convolutional Routing Towards Lightweight Capsule Netwo...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Chengxin Lv Guangqi Jiang Shoukun Xu Yi Liu Academy of Computing and Artificial Intelligence Changzhou University Changzhou China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

An important branch of artificial intelligence systems and architectures is Capsule Networks (CapsNets) have been known extremely large amount of parameters and computation because of the complex capsule routing algorithm, making it difficult deep architectures in the era of deep learning. To address this challenge, in this paper, we propose a simple yet effective capsule routing algorithm. Specifically, we activate the pose of the entity using its activation probability. On top of that, a convolution on the activated pose matrix to learn the high-level capsules’ pose matrices. Activations of the high-level capsules can be digged from their pose matrices via convolution and activation. Such mechanism generates fewer network parameters and lightweight computation, which make it practitable a deep CapsNets architecture. Experiments on CIFAR-10/100, Small-NORB, MINIST and even large-scale benchmark PASCAL VOC 2007, demonstrate the effectiveness of the proposed method.

关键词： Deep learning Technological innovation distributed processing Convolution Computer architecture Object detection Benchmark testing Routing Artificial intelligence

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cuGraph C++ primitives: vertex/edge-centric building blocks for parallel graph computing

cuGraph C++ primitives: vertex/edge-centric building blocks ...

引用

IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Seunghwa Kang Chuck Hastings Joe Eaton Brad Rees NVIDIA

Software development of high-performance graph algorithms is difficult on modern parallel computers. To simplify this task, we have designed and implemented a collection of C++ graph primitives, basic building blocks, within cuGraph to assist graph analytics software developers on parallel computers, ranging from desktops to large clusters. This graph primitives API provides a vertex/edge-centric C++ Standard Template Library (STL)-like interface, allowing users to pick a primitive algorithm, and specify desired operations on vertices and edges and how to reduce the output of such operations through C++ functors. The API implementation is responsible for executing these functors on the underlying hardware. In this case, the graph primitives are implemented to run on NVIDIA GPU systems, from a single-GPU to multi-GPUs in a distributed cluster. RAPIDS cuGraph is NVIDIA’s graph analytics solution for data scientists and software integrators. Algorithms in cuGraph are either implemented using the cuGraph C++ primitives API or being migrated over to using the primitives API. The Louvain and PageRank algorithms have been tested on clusters with over 1000 GPUs.

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A Cloud-Agnostic Serverless Architecture for distributed Machine Learning

A Cloud-Agnostic Serverless Architecture for Distributed Mac...

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IEEE/ACM international symposium on Big Data computing (BDC)

作者： Ionut Predoaia Pedro García-López University of York United Kingdom Universitat Rovira i Virgili Spain

ISBN: (数字)9798350367300

ISBN: (纸本)9798350367317

Serverless computing has shown vast potential for big data analytics applications, especially involving machine learning algorithms. Nevertheless, little consideration has been given in the literature to cloud-agnostic serverless architectures that leverage existing parallel implementations of machine learning algorithms. This work bridges this gap by proposing a multicloud serverless architecture for distributed machine learning, that enables machine learning engineers without cloud computing expertise to effortlessly port already implemented parallel machine learning algorithms to serverless, whilst overcoming vendor lock-in. In this work, two stateful machine learning algorithms have been ported to serverless, k-means clustering and logistic regression. The serverless implementation of k-means provided superior performance and scalability compared to a serverful implementation when using a number of workers that is equal to or slightly lower than the total number of vCPUs available on the VM running the serverful implementation. Additionally, it achieved an 87-fold speedup compared to a sequential implementation. Moreover, two storage designs of the shared state will be proposed for the serverless implementations, one that requires locks for updating the shared state, and another that is lock-free. Our experimental evaluation demonstrates that the performance of the lock-free serverless implementation of k-means declines with the increase in the number of clusters.

关键词： Bridges Logistic regression Machine learning algorithms Scalability Serverless computing Clustering algorithms Machine learning Computer architecture Big Data parallel machines

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An O(N) distributed-memory parallel direct solver for planar integral equations

An O(N) distributed-memory parallel direct solver for planar...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Tianyu Liang Chao Chen Per-Gunnar Martinsson George Biros University of California Berkeley USA North Carolina State University USA The University of Texas Austin USA

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Boundary value problems involving elliptic PDEs such as the Laplace and the Helmholtz equations are ubiquitous in mathematical physics and engineering. Many such problems can be alternatively formulated as integral equations that are mathematically more tractable. However, an integral-equation formulation poses a significant computational challenge: solving large dense linear systems that arise upon discretization. In cases where iterative methods converge rapidly, existing methods that draw on fast summation schemes such as the Fast Multipole Method are highly efficient and well-established. More recently, linear complexity direct solvers that sidestep convergence issues by directly computing an invertible factorization have been developed. However, storage and computation costs are high, which limits their ability to solve large-scale problems in practice. In this work, we introduce a distributed-memory parallel algorithm based on an existing direct solver named "strong recursive skeletonization factorization [1]." Specifically, we apply low-rank compression to certain off-diagonal matrix blocks in a way that minimizes computation and data movement. Compared to iterative algorithms, our method is particularly suitable for problems involving ill-conditioned matrices or multiple righthand sides. Large-scale numerical experiments are presented to show the performance of our Julia implementation.

关键词： Linear systems distributed processing Transmission line matrix methods Costs Integral equations Complexity theory Iterative methods

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IEEE Workshop on parallel / distributed Combinatorics and Optimization (PDSC)

IEEE Workshop on Parallel / Distributed Combinatorics and Op...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

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