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Auto-Generating Diverse Heterogeneous Designs

Auto-Generating Diverse Heterogeneous Designs

引用

IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Jessica Vandebon Jose G.F. Coutinho Wayne Luk Department of Computing Imperial College London UK

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

This paper presents a novel architecture for end-to-end design automation, facilitating high-level design porta-bility across diverse technologies. We introduce programmatic, customizable and reusable design-flows capable of generating multiple implementations (e.g., CPU, GPU, FPGA) from a single technology-agnostic high-level application source. Notably, our approach incorporates design-flow branch points and automated path selection strategies, mitigating the manual effort currently needed for efficient design production, particularly for hetero-geneous platforms. To validate our approach, we implement optimizing design-flows tailored to different hardware platforms. Through experiments on five AI and HPC benchmarks, we demonstrate significant speed improvements compared to single-threaded CPU execution. Our approach generates multi-thread CPU, CPU+FPGA, and CPU+GPU designs from a single high-level source description, achieving speedups of up to 30 times for OpenMP multi-thread CPU, 32 times for oneAPI CPU+FPGA, and 779 times for HIP CPU+GPU designs. We also showcase cost-effective implementations targeting heterogeneous computing platforms. Additionally, these performance advancements are accompanied by gains in developer productivity, quantified based on added lines of code.

关键词： Productivity Graphics processing units Manuals Heterogeneous networks Hardware Task analysis Optimization

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A Task Dependency-based Deduplicated Task Offloading Mechanism in Vehicular Edge computing

A Task Dependency-based Deduplicated Task Offloading Mechani...

引用

international symposium on parallel and distributed Processing with Applications, ISPA

作者： Zhenyi Shao Zhuofan Liao Xiaoyong Tang School of Computer and Communication Engineering Changsha University of Science and Technology Changsha China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

The increasing demand for in-vehicle applications has raised the complexity and computational load, while the in-vehicle tasks exhibit a sensitivity to latency. Previous research has proposed utilizing the idle computational resources of roadside vehicles to alleviate this contradiction. However, the high mobility of vehicles leads to communication interruptions, and the time-varying nature of vehicle density makes resource allocation challenging. In this work, we leverage the dependencies between vehicular computing tasks and design a deduplication offloading mechanism for stable reduction of latency. This mechanism consists of two stages, named the Multi-hop Clustering Deduplication Offloading (MCDO) mechanism. Firstly, a Multi-hop Two Layer Clustering (MTLC) algorithm is designed to divide vehicles based on task dependencies, speed, and position information. Then, a Deduplication Layered Offloading (DLO) algorithm is proposed to identify and remove duplicated tasks within each cluster while maintaining their inter-dependencies. Simulation results demonstrate that MCDO effectively divides vehicle clusters and offloads tasks efficiently under various road conditions. Compared to existing approaches, MCDO significantly enhances system performance, achieving a minimum improvement of 15.1% in terms of latency.

关键词： Sensitivity Simulation System performance Roads Clustering algorithms Transforms Delays Resource management Time complexity Optimization

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SAT-GAV: A Electricity-Costs Aware Resources Placement Strategy for Data Centers

SAT-GAV: A Electricity-Costs Aware Resources Placement Strat...

引用

international symposium on parallel and distributed Processing with Applications, ISPA

作者： Hao Feng Xinren Xu Lin Chen Jie Li School of Computer Science and Technology Hainan University Haikou China School of Software South China Normal University Foshan China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

With the rise of cloud computing and artificial intelligence, the resource utilization rate of data centers is soaring, resulting in significant power consumption and electricity costs. Traditional inappropriate resource placement methods cannot match the local electricity pricing form well, leading to data centers consuming a large amount of energy and requiring large electricity bills. In this paper, firstly, this paper study a global electricity-cost-minimization model, which takes into account both IT and non-IT resource usage. Secondly, We introduce a two-step algorithm (SAT-GAV) to solve the NP-hard TVMP problem. The first step of SAT-GAV uses the simulated annealing algorithm to arrange task placements to reduce electricity costs. In the second step, we uses the greedy algorithm to place virtual machines by leveraging of minimizing data center electricity costs. We conduct extensive experiments to evaluate the effectiveness of SAT-GAV. And compare the performance of our SAT-GAV with other state-of-art algorithms. Experimental results indicate that, compared to other algorithms, our VMP strategy can reduce the electricity costs by 8.9% compared to the best-performing PDGA algorithm and by 33.34% compared to the earlier XINT-GA algorithm.

关键词： Data centers Cloud computing Costs Electricity Simulation Simulated annealing Virtual machines Resource management Time complexity Testing

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Optimizing General Matrix Multiplications on Modern Multi-core DSPs

Optimizing General Matrix Multiplications on Modern Multi-co...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Kainan Yu Xinxin Qi Peng Zhang Jianbin Fang Dezun Dong Ruibo Wang Tao Tang Chun Huang Yonggang Che Zheng Wang School of Computer Science and Technology National University of Defense Technology Changsha China School of Information Science and Technology Northwest University Xi’an China

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

General Matrix Multiplication (GEMM) is a key subprogram in high-performance computing (HPC) and deep learning workloads. With the rising significance of power and energy consumption in HPC systems, accelerators based on Digital Signal Processors (DSPs) have been integrated into general-purpose HPC systems. Due to the architecture disparities, the GEMM optimization techniques used on conventional multi-core CPUs and GPGPUs are not always applicable to DSPs. This paper shares our experience in optimizing GEMM on multi-core GPDSPs, using a CPU-DSP processor as a case study. Our approach employs a range of techniques to optimize performance for DSP architectures. These include data partitioning, three-level pipelining, dedicated micro-kernel design, and improved vector reduction. These optimizations maximize the overlap between computation and communication while fully exploiting the capabilities of floating-point arithmetic units to achieve high performance. Our experimental results demonstrate that the performance attained by our optimization is up to 96% of the theoretical peak performance of the hardware.

关键词： Single instruction multiple data Shape High performance computing Digital signal processors Computer architecture Vectors Hardware

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Message from the HCW Technical Program Committee Chair

Message from the HCW Technical Program Committee Chair

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

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Nonlinear Control of Crane Systems Based on Intelligence computing of Disturbance Observer Under Mismatched Disturbance

Nonlinear Control of Crane Systems Based on Intelligence Com...

引用

international symposium on parallel and distributed Processing with Applications, ISPA

作者： Tianlei Wang Yiyan Wang Meng Xu Jiajie Tian Jingling Zhang Zhiyong Hong School of Electronic and Information Engineering Wuyi University Jiangmen China Jiangmen Key Laboratory of Kejie Semiconductor Bonding Technology and Control System Jiangmen China School of Mechanical and Automation Engineering Wuyi University Jiangmen China Guangdong Kejie Technology Co. Ltd Jiangmen China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

A control method based on disturbance observer is proposed to address the positioning drift issue of the gantry crane under unmatched disturbances, aiming at precise positioning of the trolley and effective payload swing angle attenuation in a variable-length two-dimensional lifting system. The control scheme comprises a combination of a proportional-derivative controller and a disturbance observer. Firstly, the design of the coupling function in this paper is based on the observation of the natural characteristics of the dynamical model. It cleverly designs the coupling function, which not only helps to effectively reduce the swing angle but also prevents the problem of positioning drift under non-matching disturbances, subsequently, design a controller by integrating intelligent computing with control theory. Secondly, the designed disturbance observer observes and compensates for the system output to achieve disturbance suppression. Thirdly, a thorough stability analysis has been conducted to demonstrate that the proposed controller satisfies the desired conditions. Finally, simulation results illustrate that the pro-posed method success-fully addresses the limitations of existing methods and exhibits superior performance and robustness.

关键词： Couplings Cranes Computational modeling Simulation Attenuation Disturbance observers Stability analysis Robustness Mathematical models Payloads

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SCONNA: A Stochastic computing Based Optical Accelerator for Ultra-Fast, Energy-Efficient Inference of Integer-Quantized CNNs

SCONNA: A Stochastic Computing Based Optical Accelerator for...

引用

international symposium on parallel and distributed Processing (IPDPS)

作者： Sairam Sri Vatsavai Venkata Sai Praneeth Karempudi Ishan Thakkar Ahmad Salehi Todd Hastings Department of Electrical and Computer Engineering University of Kentucky Lexington KY USA

Convolutional Neural Networks (CNNs) are used extensively for artificial intelligence applications due to their record-breaking accuracy. For efficient and swift hardware-based acceleration, CNNs are typically quantized to have integer input/weight parameters. The acceleration of a CNN inference task uses convolution operations that are typically transformed into vector-dot-product (VDP) operations. Several photonic microring resonators (MRRs) based hardware architectures have been proposed to accelerate integer-quantized CNNs with remarkably higher throughput and energy efficiency compared to their electronic counterparts. However, the existing photonic MRR-based analog accelerators exhibit a very strong trade-off between the achievable input/weight precision and VDP operation size, which severely restricts their achievable VDP operation size for the quantized input/weight precision of 4 bits and higher. The restricted VDP operation size ultimately suppresses computing throughput to severely diminish the achievable performance benefits. To address this shortcoming, we for the first time present a merger of stochastic computing and MRR-based CNN accelerators. To leverage the innate precision flexibility of stochastic computing, we invent an MRR-based optical stochastic multiplier (OSM). We employ multiple OSMs in a cascaded manner using dense wavelength division multiplexing, to forge a novel Stochastic computing based Optical Neural Network Accelerator (SCONNA). SCONNA achieves significantly high throughput and energy efficiency for accelerating inferences of high-precision quantized CNNs. Our evaluation for the inference of four modern CNNs at 8-bit input/weight precision indicates that SCONNA provides improvements of up to 66.5×, 90× and 91× in frames-per-second (FPS), FPS/W and FPS/W/mm 2 respectively, on average over two photonic MRR-based analog CNN accelerators from prior work, with Top-1 accuracy drop of only up to 0.4% for large CNNs and up to 1.5% for sma

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A Serverless Framework for distributed Bulk Metadata Extraction 21

A Serverless Framework for Distributed Bulk Metadata Extract...

引用

30th international symposium on High-Performance parallel and distributed computing (HPDC)

作者： Skluzacek, Tyler J. Wong, Ryan Li, Zhuozhao Chard, Ryan Chard, Kyle Foster, Ian Univ Chicago Chicago IL 60637 USA Argonne Natl Lab Lemont IL USA

ISBN: (纸本)9781450382175

We introduce Xtract, an automated and scalable system for bulk metadata extraction from large, distributed research data repositories. Xtract orchestrates the application of metadata extractors to groups of files, determining which extractors to apply to each file and, for each extractor and file, where to execute. A hybrid computing model, built on the funcX federated FaaS platform, enables Xtract to balance tradeoffs between extraction time and data transfer costs by dispatching each extraction task to the most appropriate location. Experiments on a range of clouds and supercomputers show that Xtract can efficiently process multi-million-file repositories by orchestrating the concurrent execution of container-based extractors on thousands of nodes. We highlight the flexibility of Xtract by applying it to a large, semi-curated scientific data repository and to an uncurated scientific Google Drive repository. We show that by remotely orchestrating metadata extraction across decentralized storage and compute nodes, Xtract can process large repositories in 50% of the time it takes just to transfer the same data to a machine within the same computing facility. We also show that when transferring data is necessary (e.g., no local compute is available), Xtract can scale to process files as fast as they are received, even over a multi-GB/s network.

关键词： serverless metadata extraction search index storage files

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GPU-aware Communication with UCX in parallel Programming Models: Charm plus plus , MPI, and Python

GPU-aware Communication with UCX in Parallel Programming Mod...

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Choi, Jaemin Fink, Zane White, Sam Bhat, Nitin Richards, David F. Kale, Laxmikant, V Univ Illinois Dept Comp Sci Urbana IL 61801 USA Charmworks Inc Urbana IL USA Lawrence Livermore Natl Lab Ctr Appl Sci Comp Livermore CA 94550 USA

ISBN: (纸本)9781665435772

As an increasing number of leadership-class systems embrace GPU accelerators in the race towards exascale, efficient communication of GPU data is becoming one of the most critical components of high-performance computing. For developers of parallel programming models, implementing support for GPU-aware communication using native APIs for GPUs such as CUDA can be a daunting task as it requires considerable effort with little guarantee of performance. In this work, we demonstrate the capability of the Unified Communication X (UCX) framework to compose a GPU-aware communication layer that serves multiple parallel programming models of the Charm++ ecosystem: Charm++, Adaptive MPI (AMPI), and Charm4py. We demonstrate the performance impact of our designs with microbenchmarks adapted from the OSU benchmark suite, obtaining improvements in latency of up to 10.2x, 11.7x, and 17.4x in Charm++, AMPI, and Charm4py, respectively. We also observe increases in bandwidth of up to 9.6x in Charm++, 10x in AMPI, and 10.5x in Charm4py. We show the potential impact of our designs on real-world applications by evaluating a proxy application for the Jacobi iterative method, improving the communication performance by up to 12.4x in Charm++, 12.8x in AMPI, and 19.7x in Charm4py.

关键词： GPU communication UCX Charm plus AMPI CUDA-aware MPI Python Charm4py

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File System Semantics Requirements of HPC Applications 21

File System Semantics Requirements of HPC Applications

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30th international symposium on High-Performance parallel and distributed computing (HPDC)

作者： Wang, Chen Mohror, Kathryn Snir, Marc Univ Illinois Champaign IL 61820 USA Lawrence Livermore Natl Lab Livermore CA 94550 USA

ISBN: (纸本)9781450382175

Most widely-deployed parallel file systems (PFSs) implement POSIX semantics, which implies sequential consistency for reads and writes. Strict adherence to POSIX semantics is known to impede performance and thus several new PFSs with relaxed consistency semantics and better performance have been introduced. Such PFSs are useful provided that applications can run correctly on a PFS with weaker semantics. While it is widely assumed that HPC applications do not require strict POSIX semantics, to our knowledge there has not been systematic work to support this assumption. In this paper, we address this gap with a categorization of the consistency semantics guarantees of PFSs and develop an algorithm to determine the consistency semantics requirements of a variety of HPC applications. We captured the I/O activity of 17 representative HPC applications and benchmarks as they performed I/O through POSIX or I/O libraries and examined the metadata operations used and their file access patterns. From this analysis, we find that 16 of the 17 applications can utilize PFSs with weaker semantics.

关键词： consistency semantics parallel file system scientific applications

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