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Speculative parallel Reverse Cuthill-McKee Reordering on Multi- and Many-core Architectures 35

Speculative Parallel Reverse Cuthill-McKee Reordering on Mul...

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Mlakar, Daniel Winter, Martin Parger, Mathias Steinberger, Markus Graz Univ Technol Graz Austria

ISBN: (纸本)9781665440660

Bandwidth reduction of sparse matrices is used to reduce of linear solvers and to increase performance of other sparse matrix operations, e.g., sparse matrix vector multiplication in iterative solvers. To compute a bandwidth reducing permutation, Reverse Cuthill-McKee (RCM) reordering is often applied, which is challenging to parallelize, as its core is inherently serial. As many-core architectures, like the GPU, offer subpar single-threading performance and are typically only connected to high-performance CPU cores via a slow memory bus, neither computing RCM on the GPU nor moving the data to the CPU are viable options. Nevertheless, reordering matrices, potentially multiple times in-between operations, might be essential for high throughput. Still, to the best of our knowledge, we are the first to propose an RCM implementation that can execute on multicore CPUs and many-core GPUs alike, moving the computation to the data rather than vice versa. Our algorithm parallelizes RCM into mostly independent batches of nodes. For every batch, a single CPU-thread/a GPU thread-block speculatively discovers child nodes and sorts them according to the RCM algorithm. Before writing their permutation, we re-evaluate the discovery and build new batches. To increase parallelism and reduce dependencies, we create a signaling chain along successive batches and introduce early signaling conditions. In combination with a parallel work queue, new batches are started in order and the resulting RCM permutation is identical to the ground-truth single-threaded algorithm. We propose the first RCM implementation that runs on the GPU. It achieves several orders of magnitude speed-up over NVIDIA's single-threaded cuSolver RCM implementation and is significantly faster than previous parallel CPU approaches. Our results are especially significant for many-core architectures, as it is now possible to include RCM reordering into sequences of sparse matrix operations without major performance loss.

关键词： many-core multicore CPU GPU Reverse Cuthill-McKee scheduling work distribution

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Think Before Acting: The Necessity of Endowing Robot Terminals With the Ability to Fine-Tune Reinforcement Learning Policies

Think Before Acting: The Necessity of Endowing Robot Termina...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Dawei Feng Xudong Gong Xunhui Zhang Jun Fu College of Computer National University of Defense Technology Changsha China State Key Laboratory of Complex & Critical Software Environment Changsha China College of Information and Communication National University of Defense Technology Wuhan China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Goal-Conditioned Reinforcement Learning (GCRL) has gained widespread application in robotics. A typical application of GCRL is to pre-train policies in a development environment and then deploy them to robots. In this approach of application, we find that the policies trained by GCRL exhibit discontinuity in goal space, indicating that we cannot effectively estimate the policy’s performance in the actual production environment based on its evaluation results in the development environment. To ensure that the robot terminals can complete tasks effectively, we propose the Think Before Acting (TBA) framework, which evaluates and fine-tunes policies on the robot terminal. Within the TBA framework, for a goal to be executed, the policy’s performance is first evaluated. If the performance does not meet the requirements, the policy is fine-tuned based on this goal. We conduct experiments on velocity vector control of fixed-wing UAVs to validate the effectiveness of TBA. The results show that for a well-pre-trained policy, less than 10 5 samples and less than 2 minutes of fine-tuning time are required to achieve satisfactory performance on the target goal.

关键词： distributed processing Production Reinforcement learning Ubiquitous computing Robots Best practices

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Empirical Study of Molecular Dynamics Workflow Data Movement: DYAD vs. Traditional I/O Systems

Empirical Study of Molecular Dynamics Workflow Data Movement...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Ian Lumsden Hariharan Devarajan Jack Marquez Stephanie Brink David Boehme Olga Pearce Jae-Seung Yeom Michela Taufer Department of Electrical Engineering and Computer Science University of Tennessee Knoxville TN USA Lawrence Livermore National Laboratory Livermore CA USA

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

This experimental work examines data movement in molecular dynamics (MD) workflows, comparing the Dynamic and Asynchronous Data Streamliner (DYAD) middleware with traditional, industry-standard I/O systems such as XFS and Lustre. DYAD moves MD simulation frames to analytics processes, providing enhanced flexibility and efficiency for dynamic data transfers and in situ analytics. At the same time, traditional I/O storage systems provide durability and scalability for high-performance computing (HPC) systems. The study integrates MD workflows with common simulation codes, facilitating immediate capture and transfer of MD frames to a staging area. It explores various molecular models, from simple to complex, assessing data management performance and scalability. Different producer-consumer pairs, molecular models, and data transaction frequency enable testing across small to large-scale HPC scenarios, from single-node configurations to large, distributed environments. The findings reveal that adaptive mechanisms for minimizing synchronization, direct network communication between producer and consumer processes, and optimizations of both data movement and synchronization are crucial for performance and scalability in MD workflows.

关键词： Adaptation models Scalability Computational modeling distributed databases Production Data transfer Aerodynamics

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Revisiting Huffman Coding: Toward Extreme Performance on Modern GPU Architectures 35

Revisiting Huffman Coding: Toward Extreme Performance on Mod...

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Tian, Jiannan Rivera, Cody Di, Sheng Chen, Jieyang Liang, Xin Tao, Dingwen Cappello, Franck Washington State Univ Sch Elect Engn & Comp Sci Pullman WA 99164 USA Univ Alabama Dept Comp Sci Tuscaloosa AL 35487 USA Argonne Natl Lab Math & Comp Sci Div Lemont IL USA Oak Ridge Natl Lab Oak Ridge TN USA Univ Illinois Champaign IL USA

ISBN: (纸本)9781665440660

Today's high-performance computing (HPC) applications are producing vast volumes of data, which are challenging to store and transfer efficiently during the execution, such that data compression is becoming a critical technique to mitigate the storage burden and data movement cost. Huffman coding is arguably the most efficient Entropy coding algorithm in information theory, such that it could be found as a fundamental step in many modern compression algorithms such as DEFLATE. On the other hand, today's HPC applications are more and more relying on the accelerators such as GPU on supercomputers, while Huffman encoding suffers from low throughput on GPUs, resulting in a significant bottleneck in the entire data processing. In this paper, we propose and implement an efficient Huffman encoding approach based on modern GPU architectures, which addresses two key challenges: (1) how to parallelize the entire Huffman encoding algorithm, including codebook construction, and (2) how to fully utilize the high memory-bandwidth feature of modern GPU architectures. The detailed contribution is fourfold. (1) We develop an efficient parallel codebook construction on GPUs that scales effectively with the number of input symbols. (2) We propose a novel reduction based encoding scheme that can efficiently merge the codewords on GPUs. (3) We optimize the overall GPU performance by leveraging the state-of-the-art CUDA APIs such as Cooperative Groups. (4) We evaluate our Huffman encoder thoroughly using six real-world application datasets on two advanced GPUs and compare with our implemented multi-threaded Huffman encoder. Experiments show that our solution can improve the encoding throughput by up to 5.0x and 6.8x on NVIDIA RTX 5000 and V100, respectively, over the state-of-the-art GPU Huffman encoder, and by up to 3.3x over the multi-thread encoder on two 28-core Xeon Platinum 8280 CPUs.

关键词： distributed processing Platinum Graphics processing units Computer architecture Throughput Data processing Supercomputers

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Enhanced Multi-Intent Recognition with BERT Embeddings and Graph-based Decoding

Enhanced Multi-Intent Recognition with BERT Embeddings and G...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Mengmeng Cui Rui Zhang Haolong Xiang Shengjun Xue Nanjing University of Information Science and Technology Nanjing China Jiangsu Province Engineering Research Center of Advanced Computing and Intelligent Services Nanjing China Silicon Lake College Suzhou China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

In the question-answering system, users frequently express multiple intents within a single utterance. The majority of intent recognition models tend to either primarily address single-intent scenarios or simply aggregate the overall intent context vectors of all tokens, neglecting the integration of multi-intent information. However, current methods suffer from slow inference speed, limited generalization capability, and the relatively independent treatment of multi-intent recognition tasks, leading to suboptimal model performance. In this paper, we design a novel model based on BERT, employing a non-autoregressive approach for the task of multi-intent recognition. This model achieves enhanced speed and accuracy. Additionally, this model introduces a global slot-intent interaction layer, simulating interactions between multiple intents and slots within an utterance. Experimental results on a series of benchmarking datasets demonstrate that this model outperforms the state-of-the-art methods, improving both the effectiveness and efficiency of the overall system.

关键词： distributed processing Accuracy Intent recognition Buildings Benchmark testing Vectors Natural language processing Filling Decoding Context modeling

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Wait-free Trees with Asymptotically-Efficient Range Queries

Wait-free Trees with Asymptotically-Efficient Range Queries

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international symposium on parallel and distributed Processing (IPDPS)

作者： Ilya Kokorin Victor Yudov Vitaly Aksenov Dan Alistarh ITMO University Saint-Petersburg Russia City University of London London UK IST Austria Vienna Austria

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Tree data structures, such as red-black trees, quad trees, treaps, or tries, are fundamental tools in computer science. A classical problem in concurrency is to obtain expressive, efficient, and scalable versions of practical tree data structures. We are interested in concurrent trees supporting range queries, i.e., queries that involve multiple consecutive data items. Existing implementations with this capability can list keys in a specific range, but do not support aggregate range queries: for instance, if we want to calculate the number of keys in a range, the only choice is to retrieve a whole list and return its size. This is suboptimal: in the sequential setting, one can augment a balanced search tree with counters and, consequently, perform these aggregate requests in logarithmic rather than linear *** this paper, we propose a generic approach to implement a broad class of range queries on concurrent trees in a way that is wait-free, asymptotically efficient, and practically scalable. The key idea is a new mechanism for maintaining metadata concurrently at tree nodes, which can be seen as a wait-free variant of hand-over-hand locking (which we call hand-over-hand helping). We did a preliminary implementation of the wait-free binary search tree and preliminary experiments have indicated the soundness of our approach.

关键词： Tree data structures Concurrent computing Computer science distributed processing Aggregates distributed databases Collaboration

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FEDGE: An Interference-Aware QoS Prediction Framework for Black-Box Scenario in IaaS Clouds with Domain Generalization

FEDGE: An Interference-Aware QoS Prediction Framework for Bl...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Yunlong Cheng Xiuqi Huang Zifeng Liu Jiadong Chen Xiaofeng Gao Zhen Fang Yongqiang Yang Department of Computer Science and Engineering MoE Key Lab of Artificial Intelligence Shanghai Jiao Tong University Shanghai China Computing and Networking Innovation Lab Huawei Cloud Computing Technology Co. Ltd China

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Public cloud providers embrace multi-tenancy as a strategy to enhance the utilization and efficiency of resources. However, co-located virtual machines (VMs) suffer from qualityof-service (QoS) degradation caused by shared resource interference. Existing solutions for predicting QoS degradation often rely on the assumption of online access to application-level information. However, in a production environment, this assumption proves invalid as the VMs are black boxes to the providers. This intrinsic characteristic of the IaaS cloud necessitates the prediction model to generalize to unfamiliar applications and imposes specific criteria on the monitorable *** meet the black-box scenario under Infrastructure as a Service (IaaS) cloud computing, we present a novel framework, FEDGE, that can predict interference-aware QoS (IA-QoS) of co-located VMs using only low-level monitorable metrics before migration. Specifically, FEDGE utilizes a stochastic gates layer to select the most informative features from the high-dimensional resource and hardware metrics, which helps to reduce the monitoring overhead. Furthermore, we design a multi-domain MMD-based adversarial denoising autoencoder to regularize the learned hidden representations and prevent over-fitting on the source domains. Next, we employ a multi-layer perceptron (MLP) to accurately predict complex QoS degradation using the learned representations with domain generalization. Experimental results demonstrate that FEDGE outperforms other state-of-the-art methods in terms of both generalizability and effectiveness.

关键词： Measurement Degradation Cloud computing Closed box Stochastic processes Quality of service Production

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parallel Simulation of Stochastic Reward Nets using Theatre 25

Parallel Simulation of Stochastic Reward Nets using Theatre

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25th IEEE/ACM international symposium on distributed Simulation and Real Time Applications (DS-RT)

作者： Cicirelli, Franco Nigro, Libero CNR Inst High Performance Comp & Networking ICAR Natl Res Council Italy I-87036 Arcavacata Di Rende CS Italy Univ Calabria DIMES Dept Informat Modelling Elect & Syst Sci I-87036 Arcavacata Di Rende CS Italy

ISBN: (纸本)9781665433266

This work aims at the development of tools for supporting modelling and analysis of timed systems by Stochastic Reward Nets (SRN). In a first approach it was proposed and experimented a formal reduction of SRN over Timed Automata (TA) in the context of the Uppaal popular toolbox. The reduction has the merit to allow both exhaustive model checking of an SRN model, useful for the assessment of qualitative properties (e.g., absence of deadlocks, occurrence of particular event sequences etc.), and quantitative analysis through the statistical model checker, which is based on simulations. However, although Uppaal enabled formal reasoning on the semantics of SRN, its practical usage suffers of scalability problems, that is it can introduce severe limitations in time and space when studying complex models. To cope with this problem, this paper describes a Java implementation of the SRN operational core engine, using the lock-free and efficient Theatre actor system which permits the parallel simulation of large models. The realization can be used for functional property checking on an untimed version of a source SRN model, and quantitative estimation of measurables through simulations. The paper discusses the design and implementation of the core engine of SRN on top of Theatre, together with supported intuitive configuration process of an SRN model, and reports some experimental results using a scalable grid computing model. The experiments confirm Theatre/SRN are capable of exploiting the potential of modern multi-core machines and can deliver good execution performances on large models.

关键词： Stochastic Reward Nets performability analysis actors high-performance computing Theatre Java

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Efficient erasure-coded multi-data block update methods for heterogeneous storage environments

Efficient erasure-coded multi-data block update methods for ...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Hengyu Wang Bing Wei Ning Luo Qian Chen Yi Wu Shudong Zhang Lijuan Zhou School of Cyberspace Security Hainan University Hainan China School of International Communication and Arts Hainan University Hainan China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Erasure-coded storage systems can achieve highly reliable data storage with low storage overhead. However, updating data blocks necessitates updating parity blocks, and updating multiple data blocks incurs heavy I/O and computational overhead, leading to prolonged update times in heterogeneous storage environments. This paper proposes an erasure-coded multi-data block update method for heterogeneous storage environments, named MBUS, to expedite data updates. MBUS blends re-encoding and delta-based updates and considers factors such as intermediate blocks, computational overhead, and I/O overhead across different storage media. It iteratively computes the minimal I/O time for updating each parity block dynamically. Once the computation equation for each parity block is determined, MBUS prioritizes computing common XOR expressions and reuses the results to reduce the number of XOR operations. MBUS caches a certain number of scheduling plans to minimize redundant computations in subsequent updates, thereby reducing computation time. Experimental results replaying real-world traces demonstrate that MBUS reduces update time by 64.43% compared to state-of-the-art techniques.

关键词： distributed processing Processor scheduling Memory Media Mathematical models Reliability Optimization

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P-AES: Advanced Encryption Standard parallel Optimization on MGPUSim

P-AES: Advanced Encryption Standard Parallel Optimization on...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Jiawei Qin Yaobin Wang Ling Li Shuang Yang Xiaorong Zhang School of Computer Science and Technology Southwest University of Science and Technology Mianyang China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Advanced Encryption Standard (AES), as one of the most popular encryption algorithms, has been widely studied on single GPU and CPU. However, the research on multi-GPU platforms is not deep enough, and with the rapid increase in data size, it is difficult for single-GPU platforms to meet the demand for high-performance computing. To solve this problem, this paper presents a novel AES parallelization study "P-AES" on MGPUSim, including its parallel execution mechanism as well as architectural design. In addition, we modify the instruction set of MGPUSim along with thread optimization to save memory overhead, increase data access speed, and improve system performance by loading S-boxes and key extension arrays from global memory to shared memory. The experimental results show that: (1) P-AES performs well on MGPUSim, achieving an average speedup of 1.5×-1.7× compared to the AES implementation using CUDA kernels, and a speedup of 2.75× compared to M-AES (the unoptimized AES on MGPUSim). (2) By conducting encryption experiments on plaintext data of varying sizes, we found that P-AES exhibits high stability and throughput. Compared to the modern sliced AES, the P-AES algorithm achieves a throughput of up to 812 Gbps, which is 1.3 times that of their implementation and 2.74 times that of M-AES.

关键词： Runtime Instruction sets System performance Memory management Graphics processing units Switches Throughput Encryption Standards Optimization

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