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Proceedings of the 22nd international symposium on High-performance parallel and distributed computing

作者： Harjot Gill Dong Lin Xianglong Han Cam Nguyen Tanveer Gill Boon Thau Loo University of Pennsylvania Philadelphia PA USA

ISBN: (纸本)9781450319102

This paper presents SCALANYTICS, a declarative platform that supports high-performance application layer analysis of network traffic. SCALANYTICS uses (1) stateful network packet processing techniques for extracting application-layer data from network packets, (2) a declarative rule-based language called ANALOG for compactly specifying analysis pipelines from reusable modules, and (3) a task-stealing architecture for processing network packets at high throughput within these pipelines, by leveraging multi-core processing capabilities in a load-balanced manner without the need for explicit performance profiling. We have developed a prototype of SCALANYTICS that enhances a declarative networking engine with support for ANALOG and various stateful components, integrated with a parallel task-stealing execution model. We evaluate our SCALANYTICS prototype on a wide range of pipelines for analyzing SMTP and SIP traffic, and for detecting malicious traffic flows. Our evaluation on a 16-core machine demonstrate that SCALANYTICS achieves up to 11.4× improvement in throughput compared with the best uniprocessor implementation. Moreover, SCALANYTICS outperforms the Bro intrusion detection system by an order of magnitude when used for analyzing SMTP traffic.

关键词： programming languages and environments data-intensive computing applications of parallel and distributed computing

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A framework for exploiting adaptation in high heterogeneous distributed processing

A framework for exploiting adaptation in high heterogeneous ...

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international symposium on Computer Architecture and High Performance Computing (SBAC-PAD)

作者： A.C. Yamin J.V. Barbosa I. Augustin L. da Silva R. Real C. Geyer G. Cavalheiro Catholic University of Pelotas Pelotas Rio Grande do Sul Brazil Federal University of Rio Grande do Sul Porto Alegre Rio Grande do Sul Brazil Federal University of Santa Maria Santa Maria Rio Grande do Sul Brazil University of Vale do Rio dos Sinos-UNISINOS Sao Leopoldo Rio Grande do Sul Brazil

ISAM is a proposal directed to resource management in heterogeneous networks, supporting physical and logical mobility, dynamic adaptation and the execution of distributed applications based on components. In order to achieve its goals, ISAM uses, as strategy, an integrated environment that: (a) provides a programming paradigm and its execution environment; (b) handles the adaptation process through a multilevel collaborative model, in which both the system and the application contribute. In this paper we discuss the main mechanisms used to implement the ISAM features, and we also present a parallel application that explores some of this features.

关键词： distributed processing Grid computing Application software distributed computing Mobile computing Peer to peer computing Computer networks Proposals Collaboration Pervasive computing

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A Unique Vertex Deleting Algorithm for Graph Isomorphism

A Unique Vertex Deleting Algorithm for Graph Isomorphism

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international symposium on Image and Data Fusion (ISIDF)

作者： Baida Zhang Yuhua Tang Junjie Wu Linqi Huang National laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha Hunan P. R. China School of Resources and Safety Engineering Central South University Changsha P. R. China

Graph isomorphism problem has applications in many fields, such as chemistry, computer science, electronics, and network theory. But the exponential complexity of the algorithm makes the testing is time consuming. In this paper, a new algorithm named Unique Vertex Delete (UVD for short) is presented to speed up the process of isomorphic testing. The main idea of UVD algorithm is deleting vertex continuously to reduce the scale of the problem, and new field is added for each vertex to indicate the information of deleted neighbor vertices. Theoretical analysis and experiments show that the UVD algorithm consistently and significantly outperforms existing state-of-the-art approaches.

关键词： Algorithm design and analysis Testing Educational institutions Polynomials Software algorithms Complexity theory Partitioning algorithms

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Paldia: Enabling SLO-Compliant and Cost-Effective Serverless Computing on Heterogeneous Hardware

Paldia: Enabling SLO-Compliant and Cost-Effective Serverless...

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international symposium on parallel and distributed processing (IPDPS)

作者： Vivek M. Bhasi Aakash Sharma Shruti Mohanty Mahmut Taylan Kandemir Chita R. Das The Pennsylvania State University

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Among the variety of applications (apps) being deployed on serverless platforms, apps such as Machine Learning (ML) inference serving can achieve better performance from leveraging accelerators like GPUs. Yet, major serverless providers, despite having GPU-equipped servers, do not offer GPU support for their serverless functions. Given that serverless functions are deployed on various generations of CPUs already, extending this to various (typically more expensive) GPU generations can offer providers a greater range of hardware to serve incoming requests according to the functions and request traffic. Here, providers are faced with the challenge of selecting hardware to reach a well-proportioned trade-off point between cost and performance. While recent works have attempted to address this, they often fail to do so as they overlook optimization opportunities arising from intelligently leveraging existing GPU sharing mechanisms. To address this point, we devise a heterogeneous serverless framework, PALDIA, which uses a prudent Hardware selection policy to acquire capable, cost-effective hardware and perform intelligent request scheduling on it to yield high performance and cost savings. Specifically, our scheduling algorithm employs hybrid spatio-temporal GPU sharing that intelligently trades off job queueing delays and interference to allow the chosen cost-effective hardware to also be highly performant. We extensively evaluate PALDIA using 16 ML inference workloads with real-world traces on a 6 node heterogeneous cluster. Our results show that PALDIA significantly outperforms state-of-the-art works in terms of Service Level Objective (SLO) compliance (up to 13.3% more) and tail latency (up to ∼50% less), with cost savings up to 86%.

关键词： distributed processing Costs Scheduling algorithms Graphics processing units Serverless computing Tail Machine learning

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A tool for optimizing large scale parallel applications

A tool for optimizing large scale parallel applications

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international symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS)

作者： O. Hansen J. Krammer Lehrstuhl fuür Rechnertechnik und Rechnerorganisation Institut fuür Informatik Technische Universität München Munchen Germany

Developments in the field of supercomputing during the last couple of years showed that new classes of applications (The Grand Challenges) gain in importance that demand for new dimensions in computing power. The development of efficient parallel programs has to be supported in all phases of the program design and coding. This paper introduces a tool that supports the optimization of programs on massively parallel computing systems. The tool is scalable with respect to its implementation and in the way it presents performance data. A major feature contributing to the scalable representation of performance data is the ability to focus measurements on points of interest in the program execution by specifying behavioral attributes. Behavioral attributes are given as thresholds to the results of other measurements. Thus a direct link between results of different measurements can be made which enables the user to link global system behavior to the execution of individual program parts. With regard to the implementation, it is shown how the distributed measurement evaluation and the on-line mode of operation enable the tool to handle the problems of tools for massively parallel computing platforms.< >

关键词： Large-scale systems Time measurement Delay Concurrent computing parallel processing Current measurement User interfaces Volume measurement Displays Monitoring

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Analysis of airframe-mounted antennas using parallel and hybridized finite-element time-domain methods

Analysis of airframe-mounted antennas using parallel and hyb...

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Antennas and Propagation Society international symposium

作者： D.J. Riley M.F. Pasik J.D. Kotulski C.D. Turner N.W. Riley Sandia National Laboratories Albuquerque Albuquerque NM USA TRW S&ITG Albuquerque NM

ISBN: (纸本)0780373308

The application of numerical methods to electrically large, three-dimensional geometries typically requires the use of parallel-processing techniques. The distributed parallelization of the finite-element time-domain-finite-difference time-domain (FETD-FDTD) hybrid is described. An application is provided for antenna radiation on a realistic airframe. The parallelization procedure requires two domain decompositions: one for the structured, finite-difference grid, and the other for the unstructured, finite-element grid. The two grids communicate across the interface shown. The FETD method and the interface to FDTD are described, and the parallelization implementation is presented together with applications.

关键词： Finite element methods Time domain analysis Finite difference methods Boundary conditions Laboratories Geometry Partial differential equations Surface waves Sparse matrices Stability

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A parallel And Scalable Multi-FPGA based Architecture for High Performance applications (Abstract Only) 15

A Parallel And Scalable Multi-FPGA based Architecture for Hi...

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Proceedings of the 2015 ACM/SIGDA international symposium on Field-Programmable Gate Arrays

作者： Venkatasubramanian Viswanathan Rabie Ben Atitallah Jean-Luc Dekeyser Benjamin Nakache Maurice Nakache Nolam Embedded Systems Paris France University of Valenciennes Valenciennes France University of Lille 1 Lille France Nolam Embedded Systems Pariis France

ISBN: (纸本)9781450333153

Several industrial applications are becoming highly sophisticated and distributed as they capture and process real-time data from several sources at the same time. Furthermore, availability of acquisition channels such as I/O interfaces per FPGA, also dictates how applications are partitioned over several devices. Thus computationally intensive, resource consuming functions are implemented on multiple hardware accelerators, making low-latency communication to be a crucial factor. In such applications, communication between multiple devices means using high-speed point-to-point protocols with little flexibility in terms of communication scalability. The problem with the current systems is that, they are usually built to meet the needs of a specific application, i.e., lacks flexibility to change the communication topology or upgrade hardware resources. This leads to obsolescence, hardware redesign cost, and also wastes computing power. Taking this into consideration, we propose a scalable, modular and customizable computing platform, with a parallel full-duplex communication network, that redefines the computation and communication paradigm in such applications. We have implemented a scalable distributed secure H.264 encoding application with 3 channels over 3 customizable FPGA modules. In a distributed architecture, the inter-FPGA communication time is almost completely overshadowed by the overall execution time for bigger data-sets, and is comparable to the overall execution time of a non-distributed architecture, for the same implementation scaled down to 1 channel for 1 FPGA. This makes our architecture highly scalable and suitable for high-performance streaming applications. With 3 detachable FPGA modules, each sending and receive data simultaneously at 3 GB/s each, we measured the total net unidirectional traffic at any given time in the system is 9 GB/s, making the total net bidirectional bandwidth for 6 modules to be 36 GB/s.

关键词： scalable system parallel reconfigurable architecture distributed intensive signal processing

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Proceedings of the 16th international workshop on high-level parallel programming models and supportive environments

IEEE International Symposium on Parallel and Distributed Pro...

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IEEE international symposium on parallel and distributed processing Workshops and Phd Forum 2011年 1139-1140页

作者： Hoefler, Torsten Eigenmann, Rudolf Gerndt, Michael Müller, Frank Rasmussen, Craig Schulz, Martin Alam, Sadaf Balaji, Pavan Barrett, Richard Bode, Brett Bosilca, George Bronevetsky, Greg Danalis, Anthony De Supinski, Bronis Ding, Chen Fahringer, Thomas Ishikawa, Yutaka Knüpfer, Andreas Mohr, Bernd Scholz, Sven-Bodo Skjellum, Tony Snir, Marc Tillier, Fabian Larsson, Jesper Willcock, Jeremiah Wolf, Felix Blue Waters Directorate NCSA University of Illinois Urbana-Champaign United States Purdue University United States Technische Universität München Germany North Carolina State University United States Los Alamos National Laboratory United States Lawrence Livermore National Laboratory United States Swiss National Supercomputing Centre Switzerland Argonne National Laboratory United States Sandia National Laboratories United States National Center for Supercomputing Applications United States University of Tennessee Knoxville United States University of Rochester United States University of Innsbruck Austria University of Tokyo Japan Technische Universität Dresden Germany Forschungszentrum Jülich Germany University of Herfordshire United Kingdom University of Alabama Birmingham United States University of Illinois Urbana-Champaign United States Microsoft United States Träff University of Vienna Austria Indiana University United States German Research School for Simulation Sciences Germany

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Spara: An Energy-Efficient ReRAM-Based Accelerator for Sparse Graph Analytics applications

Spara: An Energy-Efficient ReRAM-Based Accelerator for Spars...

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international symposium on parallel and distributed processing (IPDPS)

作者： Long Zheng Jieshan Zhao Yu Huang Qinggang Wang Zhen Zeng Jingling Xue Xiaofei Liao Hai Jin National Engineering Research Center for Big Data Technology and System/Service Computing Technology and System Lab/Cluster and Grid Computing Lab Huazhong University of Science and Technology China UNSW Sydney Australia

ISBN: (数字)9781728168760

ISBN: (纸本)9781728168777

Resistive random access memory (ReRAM) addresses the high memory bandwidth requirement challenge of graph analytics by integrating the computing logic in the memory. Due to the matrix-structured crossbar architecture, existing ReRAM-based accelerators, when handling real-world graphs that often have the skewed degree distribution, suffer from the severe sparsity problem arising from zero fillings and activation nondeterminism, incurring substantial ineffectual *** this paper, we observe that the sparsity sources lie in the consecutive mapping of source and destination vertex index onto the wordline and bitline of a crossbar. Although exhaustive graph reordering improves the sparsity-induced inefficiency, its totally-random (source and destination) vertex mapping leads to expensive overheads. This work exploits the insight in a mid-point vertex mapping with the random wordlines and consecutive bitlines. A cost-effective preprocessing is proposed to exploit the insight by rapidly exploring the crossbar-fit vertex reorderings but ignores the sparsity arising from activation dynamics. We present a novel ReRAM-based graph analytics accelerator, named Spara, which can maximize the workload density of crossbars dynamically by using a tightly-coupled bank parallel architecture further proposed. Results on real-world and synthesized graphs show that Spara outperforms GraphR and GraphSAR by 8.21 × and 5.01 × in terms of performance, and by 8.97 × and 5.68× in terms of energy savings (on average), while incurring a reasonable (

关键词： Indexes Electrodes Random access memory parallel architectures Resistance Memory management

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An Intelligent parallel Hybrid Algorithm for Multi-Objective Multi-Period Portfolio Selection Models with Fuzzy Random Returns

An Intelligent Parallel Hybrid Algorithm for Multi-Objective...

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IEEE international Conference on Big Data and Cloud Computing (BdCloud)

作者： Chen Li Yulei Wu Zhonghua Lu Yonghong Hu Computer Network Information Center Chinese Academy of Sciences Beijing China University of Chinese Academy of Sciences Beijing China College of Engineering Mathematics and Physical Sciences University of Exeter Exeter UK School of Statistics and Mathematics Central University of Finance and Economics Beijing China

ISBN: (数字)9781728143286

ISBN: (纸本)9781728143293

Describing future security returns as fuzzy random variables, we present a multi-objective multi-period port-folio model by considering multiple decision criteria and real-world constraints. An intelligent hybrid algorithm is then proposed to solve the presented model. In this algorithm, we devise a novel way of searching the Pareto-optimal solutions, train a Simulated Annealing Resilient Back Propagation (SARPROP) neural network for objectives approximation, and use fuzzy random simulation to generate the training dataset. The proposed algorithm is compared with the one generated by integrating NSGA-II, SARPROP neural network and fuzzy random simulation. The results demonstrate that our algorithm significantly outperforms the compared one in terms of the running time and the quality of obtained efficient frontier. To improve computational efficiency, we adopt MPI to parallelize our algorithm. The parallel algorithm is tested on different processors and its scalability is verified.

关键词： Portfolios Investment Security Random variables Computational modeling Mathematical model Biological system modeling

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