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Improved Development Cycle of Complex Real Time Applications

Improved Development Cycle of Complex Real Time Applications

引用

IEEE international symposium on Industrial Electronics (ISIE)

作者： R. Brunelle M. Lambert Ph. Lautier Envitech Automation Inc. Pointe Claire QUE Canada

This paper presents the development cycle of complex real-time applications. The paper demonstrates how the different steps involved in the creation of complex control system are achieved in a cost effective way using state of the art development tools involving an open-source real-time operating system. Starting at model creation, ending at results analysis, the different aspect of development is covered. A concrete application of a power electronics controller are presented to illustrate the paper

关键词： Application software Real time systems Open source software Hardware Costs Operating systems Power engineering and energy Automation Time to market programming

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Adventures of a Logician-Engineer: A Journey through Logic, Engineering, Medicine, Biology, and Statistics

Adventures of a Logician-Engineer: A Journey through Logic, ...

引用

international symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC)

作者： Limsoon Wong School of Computing National University of Singapore Singapore

Summary form only given. Whenever a programmer writes a loop, or a mathematician does a proof by induction, an invariant is involved. The discovery and understanding of invariants often underlies problem solving in many domains. The author discusses his search for powerful invariants over the past decade. This search was/is motivated by a broad spectrum of problems: understanding query languages, engineering data integration systems, optimizing disease treatments, recognizing DNA feature sites, and discovering reliable patterns

关键词： Logic Engineering in medicine and biology Statistics Power engineering and energy programming profession Problem-solving Database languages Data engineering Reliability engineering systems engineering and theory

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TORSCHE Scheduling toolbox for Matlab

TORSCHE Scheduling toolbox for Matlab

引用

IEEE international Conference on Computer-Aided Design

作者： Premysl Sucha Michal Kutil Michal Sojka Zdenek Hanzalek Centre for Applied Cybernetics Department of Control Engineering Czech Technical University Czech Republic

This paper presents a Matlab based scheduling toolbox TORSCHE (time optimization of resources, scheduling). The toolbox offers a collection of data structures that allow the user to formalize various off-line and online scheduling problems. Algorithms are simply implemented as Matlab functions with fixed structure allowing users to implement new algorithms. A more complex problem can be formulated as an integer linear programming problem or satisfiability of Boolean expression problem. The toolbox is intended mainly as a research tool to handle control and scheduling co-design problems. Therefore, we provide an interface to a real-time Matlab/Simulik based simulator TrueTime and a code generator allowing to generate parallel code for FPGA

关键词： Scheduling algorithm Control systems Processor scheduling Field programmable gate arrays Automatic control Design optimization Algorithm design and analysis Integer linear programming Filters Real time systems

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Feature-oriented multiple description image coding

Feature-oriented multiple description image coding

引用

IEEE international symposium on Circuits and systems (ISCAS)

作者： Yilong Liu S. Oraintara Department of Electrical Engineering University of Texas Arlington Arlington TX USA

In this paper, we introduce a novel wavelet-based multiple description image coder, referred to as the feature-oriented MDC (FO-MDC). The proposed multiple description coders exploit the statistics of the wavelet coefficients, and identify the subsets of samples those are sensitive to packet loss. A joint optimization between tree-pruning and quantizer selection in the rate-distortion sense is used in order to allocate more bits to these sensitive coefficients. When compared with the state-of-the-art multiple description scalar quantization coders, the proposed FO-MDC yields a more efficient central-side distortion tradeoff control mechanism. Furthermore, it proves to be more robust for image transmission even with high packet loss ratios

关键词： Image coding Redundancy Wavelet coefficients Quadratic programming Image reconstruction Matching pursuit algorithms Statistics Rate-distortion Quantization Centralized control

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WSN API: Application programming Interface for Wireless Sensor Networks

WSN API: Application Programming Interface for Wireless Sens...

引用

IEEE international symposium on Personal, Indoor and Mobile Radio Communications (PIMRC)

作者： Jari K. Juntunen Mauri Kuorilehto Mikko Kohvakka Ville A. Kaseva Marko Hannikainen Timo D. Hamalainen Institute of Digital and Computer Systems Tampere University of Technology Tampere Finland

In this paper, an application programming interface for wireless sensor networks (WSN API) is presented. The WSN API consists of a client-side API (gateway API) and a sensor-side API (node API). The WSN API conceals the complexities of WSN communication protocols and architectures, and provides a well-defined and easy-to-use way to collect data from sensors. Also, easy expandability for new sensor components and applications is provided. The WSN API is implemented practically in TUTWSN prototype platforms

关键词： Wireless sensor networks Transducers Intelligent sensors Sensor phenomena and characterization Batteries Wireless communication Application software Middleware Distributed databases Java

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A Satisficing MOMIP Framework for Reliable Real-time Application Scheduling

A Satisficing MOMIP Framework for Reliable Real-time Applica...

引用

IEEE international symposium on Dependable, Autonomic and Secure Computing (DASC)

作者： Thanikesavan Sivanthi Ulrich Killat Institute of Communication Networks Hamburg University of Technology Hamburg Germany

In a networked embedded system a real-time application is distributed and scheduled over a set of nodes, which are connected by means of heterogeneous networks. The application designer for such a system is often confronted with the challenge of providing better response time and low failure probability for the distributed application. These objectives are conflicting with each other hence some trade-off between these two design objectives is needed to ensure a satisfactory application schedule. More often the designer's satisfaction can be expressed as a set of aspiration bounds on the design objectives, that if attained will be a good schedule. This paper proposes a satisfying multiobjective mixed integer programming (MOMIP) framework for deriving such a schedule

关键词： Scheduling Real time systems Embedded system Application software Delay Linear programming Equations Upper bound Telecommunication network reliability Communications technology

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Bit level types for high level reasoning

Bit level types for high level reasoning

引用

14th ACM SIGSOFT international symposium on Foundations of Software Engineering

作者： Jhala, Ranjit Majumdar, Rupak UC San Diego UC Los Angeles

ISBN: (纸本)1595934685

Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about such programs must model the semantics of bitwise operations precisely in order to capture program control and data flow through these operations. We present a type system for subword data structures that explitictly tracks the flow of bit values in the program and identifies consecutive sections of bits as logical entities manipulated atomically by the programmer. Our type inference algorithm tags each integer value of the program with a bitvector type that identifies the data layout at the subword level. These types are used in a translation phase to remove bitwise operations from the program, thereby allowing verification engines to avoid the expensive low-level reasoning required for analyzing bitvector operations. We have used a software model checker to check properties of translated versions of a Linux device driver and a memory protection system. The resulting verification runs could prove many more properties than the naive model checker that did not reason about bitvectors, and could prove properties much faster than a model checker that did reason about bitvectors. We have also applied our bitvector type inference algorithm to generate program documentation for a virtual memory subsystem of an OS kernel. While we have applied the type system mainly for program understanding and verification, bitvector types also have applications to better variable ordering heuristics in boolean model checking and memory optimizations in compilers for embedded software. Copyright ACM 2006.

关键词： Computer programming

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A model-based statistical usage testing of communication protocols

A model-based statistical usage testing of communication pro...

引用

international Conference and Workshop on Engineering of Computer-Based systems

作者： M. Popovic I. Basicevic I. Velikic J. Tatic University of Novi Sad Novi Sad Serbia

In this paper, we present our original approach to the model-based statistical usage testing of a class of communication protocol implementations that are based on the state design pattern and Java programming environment augmented with the class FSMSystem. The approach is based on the working environment that has been proven on a number of real-world projects. The working environment is created with the following set of tools: generic modeling environment with the operational profile model paradigm registered to it, operational profile model interpreter, generic test case generator, test case compiler, and the unit testing framework JUnit extended with the class TestBed that acts as both test driver and stub thus providing the complete test harness. In the paper, we present the methodology of the model-based statistical usage testing of a class of communication protocol implementations, the tools that support this methodology, and the case study - the model based statistical usage testing of SIP INVITE client transaction, a part of the SIP protocol stack

关键词： Protocols Software testing Design engineering Unified modeling language Automatic testing Interconnected systems Formal verification System testing Automatic programming Control engineering computing

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The Proxy Chain Method and Its Applicationto Scientific Visualization

The Proxy Chain Method and Its Applicationto Scientific Visu...

引用

international symposium on Haptic Interfaces for Virtual Environment and Teleoperator systems (HAPTICS)

作者： M. Ikits C.D. Hansen Scientific Computing and Imaging Institute University of Utah USA

We present a method for combining multiple point-based constraints in haptic programming environments. Instead of using a single proxy point for haptic feedback, the method maintains a separate proxy for each constraint. The reaction force is computed by linking the proxies in a chain. Constraints are applied in sequential order, such that the proxy found in the current step becomes the probe for the next step in the chain. The advantage of the method over previous approaches is that the constraints are maintained precisely and the output is well-defined. We illustrate the method with examples from the domain of 3D scientific data visualization. Finally, we present the results of an experiment conducted to quantify the contribution of haptic guidance in two representative vector field exploration tasks.

关键词： Haptic interfaces Data visualization Computer graphics Rendering (computer graphics) Force feedback programming environments Friction Tensile stress Displays Torque

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Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving

Thermal-Aware SoC Test Scheduling with Test Set Partitioning...

引用

IEEE international symposium on Defect and Fault Tolerance in VLSI systems

作者： Zhiyuan He Zebo Peng Petru Eles Paul Rosinger Bashir M. Al-hashimi Embedded Systems Laboratory (ESLAB) Linköping University Linkoping Sweden School of Electronics and Computer Science University of Southampton UK

ISBN: (纸本)9780769527062;076952706X

High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range, a thermal-aware test scheduling technique is required. This paper presents an approach to minimize the test time and, at the same time, prevent the temperature of cores under test going over the given upper limit. We employ test set partitioning to divide test sets into shorter test sequences, and add cooling spans between test sequences, so that overheating can be avoided. Moreover, test sequences from different test sets are interleaved, in order to utilize the cooling spans and the test bus bandwidth for test data transportation, hence the total test time is reduced. The test scheduling problem is formulated as a combinatorial optimization problem, and we use constraint logic programming to solve it in order to obtain the optimal solution. Experimental results have shown the efficiency of the proposed approach

关键词： Interleaved codes Cooling System-on-a-chip System testing Temperature distribution Bandwidth Road transportation Logic testing Constraint optimization Logic programming

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