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检索条件"任意字段=International Symposium on Programming and Systems"

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System of Interconnected Reconfigurable Linear Threshold Circuits

System of Interconnected Reconfigurable Linear Threshold Cir...

引用

Midwest symposium on Circuits and systems (MWSCAS)

作者： Scott Ohlmiller Tina Hudson Department of Electrical and Computer Engineering Rose Hulman Institute of Technology Terre Haute IN USA

We have developed and fabricated a reconfigurable system based on Linear Threshold Elements (LTEs) that perform a variety of common logic operations using one basic structure. A single LTE compares a sum of weighted-inputs to a threshold and produces a Boolean output This operation is equivalent to the basic functions defined for artificial neural networks (ANNs). The reconfigurable structure was created by incorporating memory in the LTE and combining multiple LTEs together to produce a wider range of possible functions. The LTE structure presented in this paper is explicitly programmed by a host for logic tasks spanning multiple LTEs. However, the possibility exists to implement supervised learning or other neural network learning algorithms to train the LTE network for the desired operation.

关键词： Integrated circuit interconnections Biological neural networks Artificial neural networks Reconfigurable logic Neurons Equations Supervised learning Logic programming Nervous system Biological system modeling

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Assessing the Relationship between Software Assertions and Faults: An Empirical Investigation

Assessing the Relationship between Software Assertions and F...

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international symposium on Software Reliability Engineering (ISSRE)

作者： Gunnar Kudrjavets Nachiappan Nagappan Thomas Ball Microsoft Corporation Redmond WA USA Microsoft Research Limited Redmond WA USA

The use of assertions in software development is thought to help produce quality software. Unfortunately, there is scant empirical evidence in commercial software systems for this argument to date. This paper presents an empirical case study of two commercial software components at Microsoft Corporation. The developers of these components systematically employed assertions, which allowed us to investigate the relationship between software assertions and code quality. We also compare the efficacy of assertions against that of popular bug finding techniques like source code static analysis tools. We observe from our case study that with an increase in the assertion density in a file there is a statistically significant decrease in fault density. Further, the usage of software assertions in these components found a large percentage of the faults in the bug database

关键词： Software quality Databases programming Software systems Application software Performance evaluation NIST Software standards Software performance Testing

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Multilevel MPSoC Performance Evaluation Using MDE Approach

Multilevel MPSoC Performance Evaluation Using MDE Approach

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IEEE international symposium on System-on-Chip

作者： Rabie Ben Atitallah Lossan Bonde Smail Niar Samy Meftali Jean-luc Dekeyser INRIA-FUTURS DaRT Project Lezennes France

In this paper, we present a multilevel framework for multiprocessor systems-on-chip (MPSoC) that makes fast simulation and performance evaluation possible in the design flow. In this framework, we use the model-driven engineering (MDE) approach within the GASPARD design flow. Two target simulation models at the cycle accurate bit accurate (CABA) and the timed programmers view (PVT) abstraction levels are defined. In addition, in this paper, a set of meta-models corresponding to the simulation models and the deployment phase are also detailed. The latter meta-model allows hardware component refinement with performance parameters specification. Experimental results show the usefulness of our framework to decrease the design complexity of MPSoC architecture and to acheive high speedup simulation with a negligible estimation error margin

关键词： Model driven engineering Hardware Space exploration Performance loss Bonding Multiprocessing systems programming profession Estimation error Next generation networking Clocks

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Concurrent Testing of Java Components Using Java PathFinder

Concurrent Testing of Java Components Using Java PathFinder

引用

international symposium on Leveraging Applications of Formal Methods, Verification and Validation ( ISoLA)

作者： Vadim Mutilin Institute for System Programming Russian Academy of Sciences Moscow Russia

Concurrent systems work nondeterministically. For concurrent systems, UniTESK-based test suite executes methods with different parameters in different states, but it does not guarantee that all possible execution paths of a method will be tested because of its concurrent nature. This paper presents an integration method that combines the testing techniques with model checking techniques of Java PathFinder (JPF). The method guarantees that all possible execution paths needed for checking the correctness of the system are explored. The method is based on localization of the search performed by JPF. It reduces the state space while preserving the advantages of UniTESK like state abstraction and automatic checking of correctness. Moreover, it allows to use the same test suite without modification with JPF.

关键词： Java System testing Interleaved codes Yarn State-space methods Computer languages Software testing Application software Formal specifications Virtual machining

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Fault tolerance with real-time Java 06

Fault tolerance with real-time Java

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international symposium on Parallel and Distributed Processing (IPDPS)

作者： D. Masson S. Midonnet Institut Gaspard-Monge Université de Marne-la-vallée Champs sur Marne France

ISBN: (纸本)9781424400546

After having drawn up a state of the art on the theoretical feasibility of a system of periodic tasks scheduled by a preemptive algorithm at fixed priorities, we show in this article that temporal faults can occur all the same within a theoretically feasible system, that these faults can lead to a failure of the system and that we can use the data calculated during control of admission to install detectors of faults and to define a factor of tolerance. We show then the results obtained on a system of periodic tasks coded with Java real-time and carried out with the virtual machine jRate. These results show that the installation of the detectors and the tolerance to the faults makes an improvement of the behavior of the system in the presence of faults

关键词： Fault tolerance Java Fault detection Scheduling algorithm Real time systems Virtual machining Admission control Control systems Detectors programming profession

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A spreadsheet approach to programming and managing sensor networks

A spreadsheet approach to programming and managing sensor ne...

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international symposium on Information Processing in Sensor Networks (IPSN)

作者： A. Woo Siddharth Seth T. Olson J. Liu F. Zhao Arched Rock Corporation San Francisco CA USA Indian Institute of Technology Kharagpur India Microsoft Research Limited Redmond WA USA

We present a spreadsheet approach to simplifying the process of managing, programming, and interacting with sensor networks and visualizing, archiving and retrieving sensor data. An excel spreadsheet prototype has been built to demonstrate the idea. This environment provides excel users, who are already familiar with spreadsheet applications, a convenient and powerful tool for programming and data analysis. We discuss the architecture of this prototype and our experience in implementing the tool. We show two different classes of sensor-net applications built using this platform. We also present performance data on the scalability of the tool with respect to data rate and number of data streams

关键词： Sensor systems Data visualization Sensor phenomena and characterization Network servers Information retrieval Prototypes Data analysis Permission Logic programming Data acquisition

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Hard Real-Time Hybrid Garbage Collection with Low Memory Requirements

Hard Real-Time Hybrid Garbage Collection with Low Memory Req...

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Real-Time systems symposium (RTSS)

作者： Yang Chang Andy Wellings University of York UK

Real-time garbage collection algorithms are usually criticised for their high memory requirements. Even when consuming nearly 50% of CPU time, some garbage collectors ask for at least twice the memory as really needed. This paper explores the fundamental reason for this problem and proposes a new performance indicator for the evaluation of real-time garbage collection algorithms. Use of this performance indicator motivates an algorithm that combines both reference counting and mark-and-sweep techniques. In the presence of our collector, a garbage collected hard real-time system can achieve the correct balance of time-space tradeoff with less effort. In order to provide both temporal and spatial guarantees needed by a hard real-time application, an offline analysis is developed and integrated into the response time analysis framework. Moreover, the use of dual priority scheduling of the garbage collection tasks allows spare capacity in the system to be reclaimed whilst guaranteeing deadlines

关键词： Real time systems Memory management Delay Embedded system Power system management Resource management Costs Scheduling algorithm programming profession Compaction

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Theory of placement by numDAG related with single-sequence, SP, BSG, and O-tree

Theory of placement by numDAG related with single-sequence, ...

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IEEE international symposium on Circuits and systems (ISCAS)

作者： Y. Kajitani Department of Information and Media Sciences University of Kitakyushu Fukuoka Japan

After BSG and sequence-pair (SP) of the placement codes, a decade has passed with various proposals of new codes and ideas for applications, especially in VLSI physical design. Different in appearance, they are actually proposing generators of ABLR-relations, i.e. above, below, left-of, or right-of relations between two rectangles on a plane to be non-overlapping, together with methodologies how dimensions and peripheral constraints are integrated. This paper proposes another yet simplest generator numDAG which is simply a directed acyclic graph with vertices labelled with distinct numbers. Assuming each vertex representing a rectangle on a plane, an edge (i, j) is featured to imply the property "i is left-of j" or "i is above j" according to the edge being incremental or decremental, respectively, with respect to the numbers of end vertices. To demonstrate that the numDAG is the ABLR-relation generating system hierarchically above existing systems, we relate it with single-sequence, H-and V-constraint graph pair, SP, BSG, and O-tree. It is a future problem to find any practical merit by this idea but the contribution is believed in providing a base to the unified theory of constraint-driven placement. Several new ideas and problems are included

关键词： Compaction Very large scale integration Proposals Dynamic programming Constraint theory

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Dynamic multi phase scheduling for heterogeneous clusters

Dynamic multi phase scheduling for heterogeneous clusters

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international symposium on Parallel and Distributed Processing (IPDPS)

作者： F.M. Ciorba T. Andronikos I. Riakiotakis A.T. Chronopoulos G. Papakonstantinou Computing Systems Laboratory Department of Electrical and Computer Engineering National and Technical University of Athens Athens Greece Department of Computer Science University of Texas San Antonio San Antonio TX USA

Distributed computing systems are a viable and less expensive alternative to parallel computers. However, concurrent programming methods in distributed systems have not been studied as extensively as for parallel computers. Some of the main research issues are how to deal with scheduling and load balancing of such a system, which may consist of heterogeneous computers. In the past, a variety of dynamic scheduling schemes suitable for parallel loops (with independent iterations) on heterogeneous computer clusters have been obtained and studied. However, no study of dynamic schemes for loops with iteration dependencies has been reported so far. In this work we study the problem of scheduling loops with iteration dependencies for heterogeneous (dedicated and non-dedicated) clusters. The presence of iteration dependencies incurs an extra degree of difficulty and makes the development of such schemes quite a challenge. We extend three well known dynamic schemes (CSS, TSS and DTSS) by introducing synchronization points at certain intervals so that processors compute in pipelined fashion. Our scheme is called dynamic multi-phase scheduling (DMPS) and we apply it to loops with iteration dependencies. We implemented our new scheme on a network of heterogeneous computers and studied its performance. Through extensive testing on two real-life applications (the heat equation and the Floyd-Steinberg algorithm), we show that the proposed method is efficient for parallelizing nested loops with dependencies on heterogeneous systems.

关键词： Dynamic scheduling Processor scheduling Distributed computing Concurrent computing Parallel programming Load management Cascading style sheets Computer networks System testing Application software

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Combining Meta-Heuristics to Solve the Rook Problem

Combining Meta-Heuristics to Solve the Rook Problem

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international symposium on Symbolic and Numeric Algorithms for Scientific Computing (SYNASC)

作者： Camelia-m. Pintea Camelia Chira D. Dumitrescu Faculty of Mathematics and Computer-Science Babe&-Bolyai University Cluj-Napoca Romania

The combination of various meta-heuristics to solve NP-hard problems has great potential to produce good results. Ant algorithms and multi-agent system are proposed to solve a chess problem. The problem is about how to place n rooks on a chessboard so that they are all mutually non-attacking. The introduced algorithms produce reasonable results and have several advantages. A combination between the two meta-heuristics is presented and some possible crossover improvements of the proposed algorithms are suggested

关键词： Multiagent systems Ant colony optimization Autonomous agents Artificial intelligence Mathematics Insects Legged locomotion Biochemistry Object oriented modeling Object oriented programming

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