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检索条件"任意字段=International Symposium on Software Engineering for Parallel and Distributed Systems"

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Balancing Computation and Communication in distributed Sparse Matrix-Vector Multiplication 23

Balancing Computation and Communication in Distributed Spars...

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23rd IEEE/ACM international symposium on Cluster, Cloud and Internet Computing (CCGrid)

作者： Mi, Hongli Yu, Xiangrui Yu, Xiaosong Wu, Shuangyuan Liu, Weifeng China Univ Petr Super Sci Software Lab Beijing Peoples R China

ISBN: (纸本)9798350301199

Sparse Matrix-Vector Multiplication (SpMV) is a fundamental operation in a number of scientific and engineering problems. When the sparse matrices processed are large enough, distributed memory systems should be used to accelerate SpMV. At present, the optimization techniques for distributed SpMV mainly focus on reordering through graph or hypergraph partitioning. However, although the reordering could reduce the amount of communications in general, there are still load balancing challenges in computations and communications on distributed platforms that are not well addressed. In this paper, we propose two strategies to optimize SpMV on distributed clusters: (1) resizing the number of row blocks on the nodes for balancing the amount of computations, and (2) adjusting the column number of the diagonal blocks for balancing tasks and reducing communications among compute nodes. The experimental results show that compared with the classic distributed SpMV implementation and its variant reordered with graph partitioning, our algorithm achieves on average 77.20x and 5.18x (up to 460.52x and 27.50x) speedups, respectively. Also, our method bring on average 19.56x (up to 48.49x) speedup over a recently proposed hybrid distributed SpMV algorithm. In addition, our algorithm achieves obviously better scalability over these existing distributed SpMV methods.

关键词： distributed memory system sparse matrixvector multiplication load balancing

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Fairness with adaptive weight in network attack detection 29

Fairness with adaptive weight in network attack detection

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29th IEEE international Conference on parallel and distributed systems, ICPADS 2023

作者： Wen, Xuezhi Wang, Nan Sun, Yuanlin Xu, Fan Zhang, Dalin Zhao, Xibin Beijing Jiaotong University School of Software Engineering Beijing China University of Science and Technology of China School of Computer Science and Technology Anhui China Tsinghua University School of Software Engineering Beijing China

ISBN: (纸本)9798350330717

Network attacks aim to exploit vulnerabilities inherent in network protocols, which is widely used in many real-world applications. In the process of network anomaly detection, most methods train the model by minimizing the average empirical risk of all samples. However, due to the uneven distribution of samples from different protocols, detection models tend to be biased against minority protocols groups. To address this issue, we propose an adaptive weight assignment method for network attack detection, which emphasizes more on error-prone samples in prediction and enhances adequate representation of minority groups for fairness. We conduct experiments on two widely used datasets, KDD and NSLKDD. According to the results, our method achieves better performance than state-of-the-art methods for classification and regression tasks, and is robust to label noise in the test dataset. © 2023 IEEE.

关键词： Adaptive weight Attack detection Fairness

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HPPython: Extending Python with HPspmd for Data parallel Programming 2

HPPython: Extending Python with HPspmd for Data Parallel Pro...

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2nd international symposium on Computing and Artificial Intelligence, ISCAI 2023

作者： Nava, Judah Josiah Lee, Jaden Jinu Lee, Hanku Computer Science and Information Systems Department University Moorhead MN United States

ISBN: (纸本)9798400708954

In light of previous endeavors and trends in the realm of parallel programming, HPPython emerges as an essential superset that enhances the accessibility of parallel programming for developers, facilitating scalability across multiple nodes. Despite Python's popularity as a programming language in scientific and engineering applications and its native support for executing various processes, HPPython brings substantial simplification to the development of parallel programs and empowers program distribution across heterogeneous clusters consisting of multiple physical computers. HPPython leverages the MPI standard for its underlying communication, thereby harnessing the benefits of the SPMD model. Additionally, HPPython introduces novel syntax and constructs, such as parallel loops and distributed lists, while endeavoring to retain the natural essence of the original language. This paper delves into the distinct components of HPPython and elucidates their integration, establishing HPPython as a viable solution for parallel programming in today's data-driven world. © 2023 ACM.

关键词： parallel programming

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Speedcode: software Performance engineering Education via the Coding of Didactic Exercises

Speedcode: Software Performance Engineering Education via th...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Tim Kaler Xuhao Chen Brian Wheatman Dorothy Curtis Bruce Hoppe Tao B. Schardl Charles E. Leiserson MIT CSAIL Johns Hopkins University Connective Associates

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

This paper introduces Speedcode, an online programming platform that aims to improve the accessibility of software performance-engineering education. At its core, Speedcode provides a platform that lets users gain hands-on experience in software performance engineering and parallel programming by completing short programming exercises. Speedcode challenges users to develop fast multicore solutions for short programming problems and evaluates their code's performance and scalability in a quiesced cloud environment. Speedcode supports parallel programming using OpenCilk, a task-parallel computing platform that is open-source and easy to program, teach and use for research. Speedcode aims to reduce barriers to learning and teaching software performance engineering. It allows users to run and evaluate their code on modern multicore machines from their own computer without installing any software. This provides users an easy introduction to the topic, and enables teachers to more easily incorporate lessons on software performance engineering into their courses without incurring the onerous overhead of needing to setup computing environments for their students.

关键词： distributed processing Multicore processing parallel programming Scalability Prototypes software performance Encoding

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Improved distributed Algorithms for Random Colorings 27

Improved Distributed Algorithms for Random Colorings

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27th international Conference on Principles of distributed systems, OPODIS 2023

作者： Carlson, Charlie Frishberg, Daniel Vigoda, Eric Department of Computer Science University of California Santa BarbaraCA United States Department of Computer Science and Software Engineering California Polytechnic State University San Luis ObispoCA United States

ISBN: (纸本)9783959773089

Markov Chain Monte Carlo (MCMC) algorithms are a widely-used algorithmic tool for sampling from high-dimensional distributions, a notable example is the equilibirum distribution of graphical models. The Glauber dynamics, also known as the Gibbs sampler, is the simplest example of an MCMC algorithm;the transitions of the chain update the configuration at a randomly chosen coordinate at each step. Several works have studied distributed versions of the Glauber dynamics and we extend these efforts to a more general family of Markov chains. An important combinatorial problem in the study of MCMC algorithms is random colorings. Given a graph G of maximum degree ∆ and an integer k ≥ ∆ + 1, the goal is to generate a random proper vertex k-coloring of G. Jerrum (1995) proved that the Glauber dynamics has O(n log n) mixing time when k > 2∆. Fischer and Ghaffari (2018), and independently Feng, Hayes, and Yin (2018), presented a parallel and distributed version of the Glauber dynamics which converges in O(log n) rounds for k > (2 + Ε)∆ for any Ε > 0. We improve this result to k > (11/6 − δ)∆ for a fixed δ > 0. This matches the state of the art for randomly sampling colorings of general graphs in the sequential setting. Whereas previous works focused on distributed variants of the Glauber dynamics, our work presents a parallel and distributed version of the more general flip dynamics presented by Vigoda (2000) (and refined by Chen, Delcourt, Moitra, Perarnau, and Postle (2019)), which recolors local maximal two-colored components in each step. © Charlie Carlson, Daniel Frishberg, and Eric Vigoda

关键词： Coloring

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ISA-Grid: Architecture of Fine-grained Privilege Control for Instructions and Registers 23

ISA-Grid: Architecture of Fine-grained Privilege Control for...

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50th Annual international symposium on Computer Architecture (ISCA)

作者： Fan, Shulin Hua, Zhichao Xia, Yubin Chen, Haibo Zang, Binyu Shanghai Jiao Tong Univ Inst Parallel & Distributed Syst SEIEE Shanghai Peoples R China Minist Educ Engn Res Ctr Domain Specif Operating Syst Shanghai Peoples R China Minist Educ Engn Res Ctr Domain Specif Operating Syst Shanghai AI Lab Shanghai Peoples R China

ISBN: (纸本)9798400700958

Isolation is a critical mechanism for enhancing the security of computer systems. By controlling the access privileges of software and hardware resources, isolation mechanisms can decouple software into multiple isolated components and enforce the principle of least privilege. While existing isolation systems primarily focus on memory isolation, they overlook the isolation of instruction and register resources, which we refer to as ISA (Instruction Set Architecture) resources. However, previous works have shown that exploiting ISA resources can lead to serious security problems, such as breaking the system's memory isolation property by abusing x86's CR3 register. Furthermore, existing hardware only provides privilege-level-based access control for ISA resources, which is too coarse-grained for software decoupling. For example, ARM Cortex A53 has several hundred system instructions/registers, but only four exception levels (EL0 to EL3) are provided. Additionally, more than 100 instructions/registers for system control are available in only EL1 (the kernel mode). To address this problem, this paper proposes ISA-Grid, an architecture of fine-grained privilege control for instructions and registers. ISA-Grid is a hardware extension that enables the creation of multiple ISA domains, with each domain having different privileges to access instructions and registers. The ISA domain can provide bit-level fine-grained privilege control for registers. We implemented prototypes of ISA-Grid based on two different CPU cores: 1) a RISC-V CPU core on an FPGA board and 2) an x86 CPU core on a simulator. We applied ISA-Grid to different cases, including Linux kernel decomposition and enhancing existing security systems, to demonstrate how ISA-Grid can isolate ISA resources and mitigate attacks based on abusing them. The performance evaluation results on both x86 and RISC-V platforms with real-world applications showed that ISA-Grid has negligible runtime overhead (less than 1%).

关键词： Privilege Control Instruction Set Architecture software Isolation

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FlexiShard: a Flexible Sharding Scheme for Blockchain based on a Hybrid Fault Model 21

FlexiShard: a Flexible Sharding Scheme for Blockchain based ...

引用

21st IEEE international symposium on parallel and distributed Computing (ISPDC)

作者： Ramburn, Tirathraj Goswami, Dhrubajyoti Concordia Univ Dept Comp Sci & Software Engn Montreal PQ Canada

ISBN: (数字)9781665488020

ISBN: (纸本)9781665488020

One of the major bottlenecks of traditional Blockchain is its low throughput resulting in poor scalability. One way to increase throughput is to shard the network nodes to form smaller groups (shards). There are a number of sharding schemes in the literature with a common goal: nodes are split into groups to concurrently process different sets of transactions. parallelism is used to enhance scalability, however with a trade-off in fault-tolerance;i.e., the smaller the shard size is, the better is the performance but higher is the fault probability. Contemporary sharding schemes use variants of Byzantine Fault Tolerance (BFT) protocol as their intra-shard consensus algorithms. BFT gives good performance when shard sizes are kept relatively small and maximum allowable faults is below some threshold. However, all these systems make rigid assumptions about their shard sizes and maximum allowable faults which may not be practical at times. In recent years, there have been more practical hybrid fault models in the literature which are better applicable to Blockchain (e.g., hybrid of Byzantine and alive-but-corrupt (abc) faults where the latter only compromises on safety) and corresponding consensus protocols that offer flexibility in choice of fault types and quorum sizes, e.g., Flexible Byzantine Fault Tolerance (Flexible BFT). In this paper, we present a new sharding scheme, FlexiShard, that uses Flexible BFT as its intra-shard consensus algorithm. FlexiShard leverages the notion of flexible Byzantine quorums and the hybrid fault model introduced in Flexible BFT that comprises of Byzantine and abc faults. Use of Flexible BFT allows flexibility in the choice of fault types and choosing shard sizes based on a range of allowable fault thresholds. Additionally, it allows to form shards that can tolerate more total faults than traditional BFT shards of similar size, and hence can deliver similar performance but with more fault-tolerance. To the best of our knowledge, FlexiSh

关键词： sharding Blockchain scalability consensus Byzantine Fault Tolerance hybrid faults quorums

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Pipelined Training and Transmission for Federated Learning 29

Pipelined Training and Transmission for Federated Learning

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29th IEEE international Conference on parallel and distributed systems, ICPADS 2023

作者： Shen, Yihui Zhang, Hong Jia, Juncheng Deng, Tao Wang, Zhenhua Teng, Zhiwei Dong, Mianxiong Soochow University School of Computer Science and Technology Suzhou215006 China Collaborative Innovation Center of Novel Software Technology and Industrialization Nanjing China China Merchants New Intelligence Technology Co. Ltd. Beijing China Muroran Institute of Technology Muroran050-8585 Japan

ISBN: (纸本)9798350330717

Federated learning is a distributed machine learning framework that enables distributed edge devices to jointly train machine learning models without exchanging private data. Because federated learning can leverage edge devices' data and computing resources, the research on federated learning has set off an upsurge. However, one of major challenges faced by federated learning is the limited computation and communication resources of edge devices, which leads to low efficiency of federated learning. In this paper, we propose a federated learning framework FedPipeline, which focuses on the local training and uploading process to improve the convergence efficiency. Different from the existing federated learning algorithms with disjoint sequential steps of training and uploading for devices, FedPipeline exploits the parallelism of training and uploading that devices upload part of the model updates in advance while they are conducting local training simultaneously. In this way, the computation and communication resources of devices can be better utilized. We further design strategies for the scheduling of early uploading and the selection of uploaded updates to maximize the benefit of FedPipeline. Experimental results show that FedPipeline can effectively accelerate the convergence speed of federated learning and preserve the accuracy of the final model. © 2023 IEEE.

关键词： Federated Learning Machine Learning Pipeline Training Transmission

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A Simulation Method for Industrial Control Honeynet Based on Time Series Prediction 5

A Simulation Method for Industrial Control Honeynet Based on...

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5th international Conference on Information Science, parallel and distributed systems, ISPDS 2024

作者： Jiang, Tianqi Yao, Yu Xu, Chao Yang, Wei Zhou, Xiaoming He, Miao Zhang, Wenjie Wang, Qianyi Meng, Meng Wang, Rui Northeastern University School of Computer Science and Engineering Shenyang China State Grid Liaoning Xintong Company Shenyang China Software College Shenyang China State Grid Liaoning Electric Power Co. Ltd. Shenyang China

ISBN: (纸本)9798350352719

This paper proposes a time series prediction based industrial control honey network simulation method to address the issue that many current industrial control honey network solutions only consider the response interaction simulation of attackers within a certain period of time and cannot effectively achieve communication simulation and collaborative work between honeypots. Firstly, the deployment and basic interaction simulation of the industrial control honeynet have been achieved;Then, a communication simulation method between devices within the industrial control honey network was studied and implemented to simulate collaborative work scenarios between devices;Secondly, using time series prediction algorithms to generate simulation data for various devices within the industrial control honey network, improving the sustained response capability of the industrial control honey network;Finally, comparative experiments have shown that the method proposed in this article can improve the ability to trap attackers, provide more data for security analysis, and help users establish a comprehensive industrial control network security protection system. © 2024 IEEE.

关键词： Prediction models

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A Hybrid Memory Data Placement Strategy for Edge Computing 22

A Hybrid Memory Data Placement Strategy for Edge Computing

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22nd IEEE international symposium on parallel and distributed Processing with Applications, ISPA 2024

作者： Lin, Binghui Zhang, Jianxun Qiao, Xinyu Tianjin University of Technology and Education College of Information Technology Engineering Tianjin China

ISBN: (纸本)9798331509712

With the booming development of fields such as cloud computing, big data, and artificial intelligence, the productivity of data have experienced explosive growth, prompting the expansion of edge computing. However, as data-intensive applications continue to increase, memory systems based solely on Dynamic Random Access Memory (DRAM) are no longer able to meet the demands of edge computing for high memory footprints, low access latency, and low energy consumption. In this paper, we organize DRAM as a cache for Non-Volatile Memory (NVM) and propose a utility-based hybrid memory data placement (UDP-HM) strategy, to address energy efficiency issues. UDP-HM places data in a hybrid memory system by calculating page utility. A series of simulation experiments are conducted to verify and evaluate the proposed hybrid memory data placement strategy. Under different workload intensities, compared to UH-MEM and RBLA, UDP-HM shows an average increase of 8.71% and 9.21% respectively in DRAM cache read/write operations, an average increase of 10.18% and 13.94% respectively in latency, an average decrease of 35.24% and 37.18% respectively in energy consumption, and an average decrease of 26.48% and 31.68% respectively in energy-delay product. © 2024 IEEE.

关键词： data migration data placement edge computing hybrid memory non-volatile memory

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