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7th IEEE international symposium on systems engineering (IEEE ISSE)

作者： Naik, Nitin Aston Univ Sch Informat & Digital Engn Birmingham W Midlands England

ISBN: (纸本)9781665431682

Concurrency and consistency are the two inherent and complex characteristics of distributed systems. Their types, levels and implementation procedures determine the nature and efficiency of a distributed system. Concurrency and consistency are difficult concepts to understand, moreover, without a comprehensive understanding a complete system cannot be designed and built. Applying a comprehensive understanding of concurrency and consistency to the design of a distributed system will generate a system that is more closely aligned with the desired outcomes. This paper analyses both concurrency and consistency in distributed systems to present a comprehensive understanding of their requirements, types, levels, benefits and limitations. Initially, it analyses concurrency and compares it with parallelism to distinguish the two related but distinct terms. Subsequently, it analyses consistency and different consistency models including a comparative analysis of strong consistency and weak consistency models, and data-centric consistency and client-centric consistency models.

关键词： distributed systems parallel systems Concurrency parallelism Consistency Consistency Models Strong Consistency Weak Consistency Data-Centric Consistency Client-Centric Consistency

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Design of array processors for 2-D Discrete Fourier Transform

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IEICE TRANSACTIONS ON INFORMATION AND systems 1997年第4期E80D卷 455-465页

作者： Peng, ST Sedukhin, I Sedukhin, S Department of Computer Software Distributed Parallel Processing Laboratory University of Aizu Aizu-Wakamatsu-shi. 965 -80 Japan RandD Group Hiwada Electronic Corporation (Pioneer Group) Fukushima-ken 969-13 Japan

In this paper the design of systolic array processors for computing 2-dimensional Discrete Fourier Transform (2-D DFT) is considered. We investigated three different computational schemes for designing systolic array processors using systematic approach. The systematic approach guarantees to find optimal systolic array processors from a large solution space in terms of the number of processing elements and I/O channels, the processing time, topology, pipeline period, etc. The optimal systolic array processors are scalable, modular and suitable for VLSI implementation. An application of the designed systolic array processors to the prime-factor DFT is also presented.

关键词： algorithm mapping 2-dimensional discrete Fourier transform parallelprocessing systolic array processors VLSI architectures

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Communication concept for adaptive intelligent run-time systems supporting distributed reconfigurable embedded systems 20

Communication concept for adaptive intelligent run-time syst...

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20th IEEE international parallel and distributed Processing symposium, IPDPS 2006

作者： Ullmann, Michael Becker, Jürgen Germany

ISBN: (纸本)1424400546

Reconfigurable computing systems have already shown their abilities to accelerate embedded hardware/ software systems. Since standard processor-based embedded applications have come to their limits we need new concepts for controlling and managing embedded, possibly distributed, reconfigurable hardware/ software computing systems. Succeeding to previous papers which dealt with management aspects of run-time reconfigurable systems and related AI-approaches this contribution describes an approach and proof of concept of a transparent communication mechanism between the application layer and its possibly distributed and reconfigurable hardware/software sub-function modules. © 2006 IEEE.

关键词： Intelligent control

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The AMPERE Project: A Model-driven development framework for highly parallel and EneRgy-Efficient computation supporting multi-criteria optimization 23

The AMPERE Project: A Model-driven development framework for...

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IEEE 23rd international symposium on Real-Time distributed Computing (ISORC)

作者： Quinones, Eduardo Royuela, Sara Scordino, Claudio Gai, Paolo Pinho, Luis Miguel Nogueira, Luis Rollo, Jan Cucinotta, Tommaso Biondi, Alessandro Hamann, Arne Ziegenbein, Dirk Saoud, Hadi Soulat, Romain Forsberg, Bjoern Benini, Luca Mando, Gianluca Rucher, Luigi Barcelona Supercomp Ctr Barcelona Spain Evidence Srl Pisa Italy Inst Super Engn Porto Porto Portugal Sysgo Prague Czech Republic Scuola Super Sant Anna Pisa Italy Bosch Stuttgart Germany Thales Res & Technol Palaiseau France Swiss Fed Inst Technol Zurich Switzerland Thales Italy Florence Italy

ISBN: (纸本)9781728169583

The high-performance requirements needed to implement the most advanced functionalities of current and future Cyber-Physical systems (CPSs) are challenging the development processes of CPSs. On one side, CPSs rely on model-driven engineering (MDE) to satisfy the non-functional constraints and to ensure a smooth and safe integration of new features. On the other side, the use of complex parallel and heterogeneous embedded processor architectures becomes mandatory to cope with the performance requirements. In this regard, parallel programming models, such as OpenMP or CUDA, are a fundamental brick to fully exploit the performance capabilities of these architectures. However, parallel programming models are not compatible with current MDE approaches, creating a gap between the MDE used to develop CPSs and the parallel programming models supported by novel and future embedded platforms. The AMPERE project will bridge this gap by implementing a novel software architecture for the development of advanced CPSs. To do so, the proposed software architecture will be capable of capturing the definition of the components and communications described in the MDE framework, together with the non-functional properties, and transform it into key parallel constructs present in current parallel models, which may require extensions. These features will allow for making an efficient use of underlying parallel and heterogeneous architectures, while ensuring compliance with non-functional requirements, including those on real-time performance of the system.

关键词： parallel programming models parallel and heterogeneous embedded processor architectures model-driven approaches safety-critical embedded systems

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Proceedings of the 2007 ACM Workshop on parallel and distributed systems: Testing and Debugging, PADTAD'07

Proceedings of the 2007 ACM Workshop on Parallel and Distrib...

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2007 ACM international symposium on software Testing and Analysis, ISSTA'07 and PADTAD-V Workshop

ISBN: (纸本)159593748X

The proceedings contain 8 papers. The topics discussed include: a debugger for flow graph based parallel applications;organizing processes and threads for debugging;techniques for specifying bug patterns;testing patterns for software transactional memory engines;semantics driven dynamic partial-order reduction of MPI-based parallel programs;and healing data races on-the-fly.

关键词： distributed computer systems

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Towards automated kernel selection in machine learning systems: A SYCL case study 34

Towards automated kernel selection in machine learning syste...

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34th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Lawson, John Codeplay Software Ltd Edinburgh Midlothian Scotland

ISBN: (纸本)9781728174457

Automated tuning of compute kernels is a popular area of research, mainly focused on finding optimal kernel parameters for a problem with fixed input sizes. This approach is good for deploying machine learning models, where the network topology is constant, but machine learning research often involves changing network topologies and hyperparameters. Traditional kernel auto-tuning has limited impact in this case;a more general selection of kernels is required for libraries to accelerate machine learning research. In this paper we present initial results using machine learning to select kernels in a case study deploying high performance SYCL kernels in libraries that target a range of heterogeneous devices from desktop GPUs to embedded accelerators. The techniques investigated apply more generally and could similarly be integrated with other heterogeneous programming systems. By combining auto-tuning and machine learning these kernel selection processes can be deployed with little developer effort to achieve high performance on new hardware.

关键词： Auto-tuning SYCL GPGPU Machine learning

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ArchC#: A new architecture description language for distributed systems

ArchC#: A new architecture description language for distribu...

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international symposium on Fundamentals of software engineering

作者： Parsa, Saeed Safi, Gholamreza Iran Univ Sci & Technol Dept Comp Engn Tehran 16765163 Iran

ISBN: (纸本)9783540756972

In this paper a new architecture description language called ArchC#, is introduced. ArchC# is an extension of ArchJava for C#. It is mainly focused on describing architecture of distributed systems. ArchC# provides built-in constructs for describing distributed components and their interconnections. Specific features of distributed code such as remote asynchronous calls and activation of remote objects can be described in ArchC#. ArchC# unifies software architecture with an object-oriented implementation.

关键词： software architecture

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Dancing in the Dark: Profiling for Tiered Memory 35

Dancing in the Dark: Profiling for Tiered Memory

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35th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Choi, Jinyoung Blagodurov, Sergey Tseng, Hung-Wei Univ Calif Riverside Riverside CA 92521 USA Adv Micro Devices Inc Sunnyvale CA 94088 USA

ISBN: (纸本)9781665440660

With the DDR standard facing density challenges and the emergence of the non-volatile memory technologies such as Cross-Point, phase change, and fast FLASH media, compute and memory vendors are contending with a paradigm shift in the datacenter space. The decades-long status quo of designing servers with DRAM technology as an exclusive memory solution is likely coming to an end. Future systems will increasingly employ tiered memory architectures (TMAs) in which multiple memor) , technologies work together to satisfy applications' ever-growing demands for more memory, less latency, and greater bandwidth. Exactly how to expose each memory type to software is an open question. Recent systems have focused on hardware caching to leverage faster DRAM memory while exposing slower non-volatile memory to OS-addressable space. The hardware approach that deals with the non-uniformity of TMA, however, requires complex changes to the processor and cannot use fast memory to increase the system's overall memory capacity. Mapping an entire TMA as OS-visible memory alleviates the challenges of the hardware approach but pushes the burden of managing data placement in the TMA to the software layers. The software, however, does not see the memory accesses by default;in order to make informed memory-scheduling decisions, software must rely on hardware methods to gain visibility into the load/store address stream. The OS then uses this information to place data in the most suitable memory location. In this paper, we evaluate different methods of memory-access collection and propose a hybrid tiered-memory approach that offers comprehensive visibility into TMA.

关键词： Nonvolatile memory Memory management Memory architecture Random access memory Trademarks Media software

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Specifying and verifying reconfigurable software architectures

Specifying and verifying reconfigurable software architectur...

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PDSE 2000: international symposium on software engineering for parallel and distributed systems

作者： de Paula, Virginia C. Justo, G.R.Ribeiro Cunha, P.R.F. Federal Univ of Rio Grande do Norte Natal Brazil

The concept of software architecture, also said system structure or system configuration, is especially important to design complex software systems, providing a model of the large scale structural properties of systems. Module interconnection languages (MILs) introduced the idea of creating program modules and connecting them to form larger structures. However, MILs do not support the description of important architectural elements. A new class of description languages, referred to as architectural description languages (ADLs), have recently emerged. Most ADLs, however, support only the description of static software architectures and not dynamic or reconfigurable software architectures. A further limitation of current ADLs is that they focus mainly on the formal notation and usually do not offer proof systems and tools to enable designers to formally verify the properties of their designs. We have developed the ZCL framework, which is a formal framework, specified in Z, to describe and reason about dynamic distributed software architectures. In this paper, we use a simple case study - the client-server system - to demonstrate how our formal framework ZCL can be used to specify and verify reconfigurable software architectures.

关键词： Client server computer systems

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Preparing an Online Java parallel Computing Course 31

Preparing an Online Java Parallel Computing Course

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31st IEEE international parallel and distributed Processing symposium Workshops (IPDPS)

作者： Sarkar, Vivek Grossman, Max Budimlic, Zoran Imam, Shams Rice Univ Houston TX 77005 USA Two Sigma Houston TX USA

ISBN: (纸本)9780769561493

While multi-core platforms are now ubiquitous in all areas of information technology, from enterprise software engineering to mobile app development, parallel computing education is still lagging behind the demand for skilled parallel programmers. At many universities today, parallel and concurrent computing is still not part of the core curriculum because of resistance to major curriculum changes. Many other universities lack the necessary educators or infrastructure to teach a comprehensive parallel computing course. Furthermore, even addressing these issues would do nothing towards supporting software professionals who have already entered the work force and have no plans to return to school. To address this broad need for a standalone, publically available, comprehensive, and easily accessible course on parallel computing, we have developed an online offering packaged as a Coursera Specialization on parallel, Concurrent, and Distributing Computing in Java. In this paper, we describe the preparations for this online course and the unique challenges we encountered in terms of both curriculum development and technical infrastructure. We describe how lessons learned from an on-campus parallelism course at Rice University helped to shape the Coursera specialization, and summarize our experience with implementing this specialization on the Coursera platform at scale.

关键词： component formatting style styling

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