Service discovery is one of the integral tasks of the system running in distributed computing environment. Even though numerous researches on service discovery have been conducted, the security and privacy issue have ...
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Service discovery is one of the integral tasks of the system running in distributed computing environment. Even though numerous researches on service discovery have been conducted, the security and privacy issue have not yet been addressed adequately. Here letting only legitimate user and service provider for service discovery is a challenging problem. In this paper we present a scheme for secure service discovery by employing an incremental progressive exposure approach, where the user and service provider exchange only partial encrypted information at each step. They compare the information sent from the other party with their own information. The exchange operation continues until a mismatch occurs or the required service is found finally. Computer simulation reveals that the proposed approach significantly reduces the number of message exchanges compared to the existing progressive exposure scheme.
Integration efforts in today's manufacturing environments tend to enable service-based communication interfaces between enterprise and manufacturing systems. Constantly changing business conditions demand a high l...
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Taking inspiration from biological organism's cell based structure, the paper is focused on modeling and implementation of bio-inspired artificial hardware structures for high reliability industrial control applic...
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Taking inspiration from biological organism's cell based structure, the paper is focused on modeling and implementation of bio-inspired artificial hardware structures for high reliability industrial control applications. As it known, living organisms offers the ability to grow with fault-tolerance and self-repair. These remarkable capabilities can be associated with principles to engine complex novel VLSI systems (embryonic machines) which would be more advantageous in many control applications where robustness and high reliability requirements are imposed. The theoretical approaches and developed artificial models were acquired in hardware redundant embryonic structure, built on a FPGA-based artificial cell network topology. In order to improve the developed embryonic system real-time control capabilities, also parallel computing techniques were implemented. The computer simulations and laboratory experimental results prove the validity of the previous theoretical assumptions and considerations.
Due to its ability to provide requested resources on demand, the use of cloud computing for data-intensive computing is expected to skyrocket in the coming years. The present IaaS cloud infrastructure is designed such...
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Due to its ability to provide requested resources on demand, the use of cloud computing for data-intensive computing is expected to skyrocket in the coming years. The present IaaS cloud infrastructure is designed such that the compute cloud and the storage cloud are separate components. However, the design has one major problem, namely a trade-off has to be made between the network cost and storage performance. To cope with these problems, we are proposing high performance file system service in compute cloud that transparently utilizes file access locality on dynamic configuration of cloud computing infrastructure. We evaluated the system using micro benchmarks, MapReduce applications, and MPI-IO applications. Our system shows the scalable file I/O performance.
We describe computational experiments exploring the performance improvements from overlapping computation and communication on hybrid parallel computers. Our test case is explicit time integration of linear advection ...
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We describe computational experiments exploring the performance improvements from overlapping computation and communication on hybrid parallel computers. Our test case is explicit time integration of linear advection with constant uniform velocity in a three-dimensional periodic domain. The test systems include a Cray XT5, a Cray XE6, and two multicore Infiniband clusters with different generations of NVIDIA graphics processing units (GPUs). We describe results for Fortran implementations using various combinations of MPI, OpenMP, and CUDA, with and without overlap of computation and communication. We find that overlapping CPU computation, GPU computation, parallel communication, and CPU-GPU communication can provide performance improvements of more than a factor of two.
Developing softwaresystems that are complicated and critical gives challenges to software engineers and the software industry. Intelligent software agent design is one such application domain that imposes challenges....
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Developing softwaresystems that are complicated and critical gives challenges to software engineers and the software industry. Intelligent software agent design is one such application domain that imposes challenges. The application of formal methods in softwareengineering, specifically with executable software specification languages, can involve much learning among the users of the system. Although executable software specifications tend to be advantageous over the traditional software specification process, the passive growth inside industry remains open for research efforts to come up with the hidden myths. The application of formal methods during system development of intelligent software agents makes the design of the product reliable. This paper describes an approach that combines an extension to the widely used Unified Modeling Language (UML) for design with an executable specification language. Also, the paper describes an approach that transforms agent oriented specifications written using the extended Descartes specification language into a high level design representation using Agent UML (AUML).
Many researchers monitor malicious software (malware) behavior using Virtual Machines (VM) to protect the underlying operating system. For virtual machines, the malware monitor process exists at the same layer as the ...
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Many researchers monitor malicious software (malware) behavior using Virtual Machines (VM) to protect the underlying operating system. For virtual machines, the malware monitor process exists at the same layer as the real system so the monitor can get detailed behavior information without being discovered. There are some Anti-VM techniques employed by malware authors to ward off collection, analysis and reverse engineering of their malicious programs. Therefore, malware researchers may obtain inaccurate analysis from VM aware programs. This paper presents a solution to detect Anti-VM techniques. We collect behavioral information from malware and use an enhanced behavior distance algorithm to calculate the difference between real and virtual environments to distinguish if the malware has Anti-VM capability. Our experiments show this algorithm works well. This idea can improve malware analysis results and reduce malware misdetection.
With the increasing growth of technology and the entrance into the digital age, a huge amount of image data needs to have handled every time which often presents difficulties. So, these data must be stored and retriev...
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With the increasing growth of technology and the entrance into the digital age, a huge amount of image data needs to have handled every time which often presents difficulties. So, these data must be stored and retrieved in an efficient and effective manner, in order for it to be put to practical use. In this connection, wavelet transform is used for decades as it emerged as a cutting edge technology within the field of image analysis and in computer graphics. Due to the intensive computation of wavelet transform of the image data, the multi-threaded concurrent computing is considered to be a solution. The Message Sequence Charts (MSCs) are used effectively to specify the communicating threads in the way where high-level transition systems are used to capture the control flow of the system components and MSCs to describe the non-atomic component interactions. This specification is efficiently amenable to formal verification. We present the way how to specify the communicating threads using MSCs. The compression method and the use of wavelet transform for compression are presented. Moreover, the MSC based specification along with the modified concurrency in the threads for concurrent wavelet transform are also presented.
Recent embedded middleware initiatives enable the structuring of an application as a set of collaborating agents deployed in the various sensing/actuating entities of the system. Of particular importance is the incurr...
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Recent embedded middleware initiatives enable the structuring of an application as a set of collaborating agents deployed in the various sensing/actuating entities of the system. Of particular importance is the incurred cost due to agent communication which in terms depends on agent positions in the system. In this paper we present GRAL a grouping algorithm that migrates groups of agents with the aim of minimizing communication. The algorithm works in a distributed fashion based on knowledge available locally at each node and can be used both for one-shot initial application deployment and for the continuous updating of agent placement. Through simulation experiments under various scenarios we evaluate the algorithm, comparing the solution quality reached against the optimal obtained from exhaustive search.
This paper describes PACT XPP Technologies' Function-PAE (FNC-PAE) Processor Core which was designed for executing irregular, control-flow dominated code efficiently in embedded systems. It combines aspects of dyn...
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This paper describes PACT XPP Technologies' Function-PAE (FNC-PAE) Processor Core which was designed for executing irregular, control-flow dominated code efficiently in embedded systems. It combines aspects of dynamically reconfigurable coarse-grain arrays and VLIW processors. The silicon-proven FNC-PAE Cores are tightly integrated with the XPP reconfigurable dataflow array. We present the FNC-PAE architecture, its development environment (assembler, C compiler, and simulator), application examples, and performance data collected from the fully working prototype chip.
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