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Dynamic core partitioning for energy efficiency

Dynamic core partitioning for energy efficiency

引用

IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Yang Ding Mahmut Kandemir Mary Jane Irwin Padma Raghavan CSE Department Pennsylvania State University USA

ISBN: (纸本)9781424465330

Chip multiprocessors (CMPs) are expected to dominate the landscape of computer architecture in the near future. The potential performance gains that can be achieved by the use of CMPs depend, to a large extent, on how much parallelism can be extracted from applications. One effective way of utilizing CMP architectures is to execute multiple (potentially multi-threaded) applications at the same time. In this work, we propose and evaluate a dynamic (runtime) core partitioning scheme for CMPs that exploits application level information. Focusing on an optimization metric called the weighted energy-delay product gain (W-EDPG), we dynamically partition available cores across competing applications during the course of execution. This dynamic partitioning uses input from a curve fitting model to predict the best operating points for an application at runtime. It can generate nonuniform core allocations across applications (i.e., some applications may have more or fewer cores than others) if doing so increases the value of the W-EDPG metric. We compare this approach against several alternative schemes (including equal partitioning of cores and standard operating system based scheduling). Our experiments indicate that the proposed core partitioning scheme improves the W-EDPG metric significantly (e.g., 14.0% on average over the equal partitioning scheme on a 16-core CMP when four multi-threaded applications are executing concurrently).

关键词： Energy efficiency Computer architecture Application software Runtime Performance gain parallel processing Data mining Curve fitting Predictive models Operating systems

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A System-on-a-Chip Platform for Mixed-Criticality Applications

A System-on-a-Chip Platform for Mixed-Criticality Applicatio...

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international symposium on Object-Oriented Real-Time distributed Computing

作者： Armin Wasicek Christian El-Salloum Hermann Kopetz Institute for Computer Engineering Vienna University of Technology Vienna Austria

High-integrity systems are deployed in order to realize safety-critical applications. To meet the rigorous requirements in this domain, these systems require a sophisticated approach to design, verification, and certification. Not only safety consideration shave an impact on a product's overall dependability, but also security has to be taken into account. In this paper we analyze the Time-Triggered System-on-Chip (TTSoC) architecture, which is a novel architecture for Multi-Processor System-on-Chip (MPSoC) devices, regarding its security properties. We discuss essential compliance criteria to the Multiple Independent Layers of Security (MILS) architecture, which is a industry-ready architecture for embedded high-integrity systems. We found that both architectures share intrinsic properties and we are able to show that the TTSoC architecture implements the core requirements of a MILS Separation Kernel and thus realizes its elementary security policies by design.

关键词： System-on-a-chip Application software Operating systems Power system security Virtual machine monitors distributed computing Kernel Heart Hardware Protection

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An architectural space exploration tool for domain specific reconfigurable computing

An architectural space exploration tool for domain specific ...

引用

IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Gayatri Mehta Alex K. Jones Department of Electrical Engineering University of North Texas Denton TX USA Department of Electrical and Computer Engineering University of Pittsburgh Pittsburgh PA USA

ISBN: (纸本)9781424465330

In this paper, we describe a design space exploration (DSE) tool for domain specific reconfigurable computing where the needs of the applications drive the construction of the device architecture. The tool has been developed to automate the design space case studies which allows application developers to explore architectural tradeoffs efficiently and reach solutions quickly. We selected some of the core signal processing benchmarks from the MediaBench benchmark suite and some of the edge-detection benchmarks from the image processing domain for our case studies. We compare the energy consumption of the architecture selected from manual design space case studies with the architectural solution selected by the design space exploration tool. The architecture selected by the DSE tool consumes approximately 9% less energy on an average as compared to the best candidate from the manual design space case studies. The fabric architecture selected from the manual design case studies and the one selected by the tool were synthesized on 130 nm cell-based ASIC fabrication process from IBM. We compare the energy of the benchmarks implemented onto the fabric with other hardware and software implementations. Both fabric architectures (manual and tool) yield energy within 3 X of a direct ASIC implementation, 330 X better than a Virtex-II Pro FPGA and 2016 X better than an Intel XScale processor.

关键词： Space exploration Computer architecture Fabrics Application specific integrated circuits Signal processing Image processing Energy consumption Fabrication Hardware Field programmable gate arrays

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Integrating High-Level Synthesis into MPI

Integrating High-Level Synthesis into MPI

引用

Annual IEEE symposium on Field-Programmable Custom Computing Machines (FCCM)

作者： Andrew W. H. House Manuel Saldaña Paul Chow Edward S. Rogers Sr. Department of Electrical and Computer Engineering University of Toronto Toronto ONT Canada ArchES Computing Systems Toronto Canada

In this paper, we investigate how easily we can port existing HPC applications that use MPI to run on HPRC systems, using three commercial high-level synthesis tools in conjunction with the ArchES-MPI software/hardware communication layer. Specifically, we examine how each tool interfaces with our existing message-passing hardware, and we present a sample application that illustrates how the interface can be used.

关键词： High level synthesis Application software Hardware software tools Context modeling Field programmable gate arrays parallel programming Strontium Communication system software Acceleration

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Technology Support for Collaborative Inconsistency Management in Model Driven engineering

Technology Support for Collaborative Inconsistency Managemen...

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Hawaii international Conference on System Sciences

作者： Christian Bartelt Bjorn Schindler University of Clausthal

ISBN: (纸本)9781424455096;9780769538693

Model driven engineering is one answer to increasing demands on software development and maintenance. Today's software systems are often large, complex but also safety-critical and should be highly adaptable in life cycle. The efficient development of large and complex software systems needs a high degree of collaboration in the design and specification phases. Well-defined, (graphical) modeling languages provide therefore a matter of communication for software engineers. Further the distribution of development locations and the concurrency of work are typical in global software engineering projects. This kind of collaborative modeling needs reliable integration mechanisms for co-evolved models. However the syntactic and semantic correct (consistent) integration of concurrent evolved models is not satisfactorily supported by current tools. Especially the inconsistency resolution for merged architecture and design models is a communication-intensive, collaborative task. This paper proposes a technology support of automatic inconsistency analysis and visualization for distributed modelers whose synchronize their parallel work.

关键词： software engineering software systems Model driven engineering Inconsistency software design computer software

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Multi-objective Exploration of Compiler Optimizations for Real-Time systems

Multi-objective Exploration of Compiler Optimizations for Re...

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international symposium on Object-Oriented Real-Time distributed Computing

作者： Paul Lokuciejewski Sascha Plazar Heiko Falk Peter Marwedel Lothar Thiele Computer Science 12 Technical University Dortmund Dortmund Germany Computer Engineering and Networks Laboratory ETH Zurich Zurich Switzerland

With the growing complexity of embedded systems software, high code quality can only be achieved using a compiler. Sophisticated compilers provide a vast spectrum of various optimizations to improve code aggressively w. r. t. different objective functions, e. g., average-case execution time (ACET) or code size. Due to the complex interactions between the optimizations, the choice for a promising sequence of code transformations is not trivial. Compiler developers address this problem by proposing standard optimization levels, e. g., O3 or Os. However, previous studies have shown that these standard levels often miss optimization potential or might even result in performance degradation. In this paper, we propose the first adaptive WCET-aware compiler framework for an automatic search of compiler optimization sequences which yield highly optimized code. Besides the objective functions ACET and code size, we consider the worst-case execution time (WCET) which is a crucial parameter for real-time systems. To find suitable trade-offs between these objectives, stochastic evolutionary multi-objective algorithms identifying Pareto optimal solutions are exploited. A comparison based on statistical performance assessments is performed which helps to determine the most suitable multi-objective optimizer. The effectiveness of our approach is demonstrated on real-life benchmarks showing that standard optimization levels can be significantly outperformed.

关键词： Optimizing compilers Real time systems Embedded system Embedded software distributed computing software systems Standards development Timing Aerospace electronics Computer science

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Using special-purpose hardware to achieve a hundred-fold speedup in molecular dynamics simulations of proteins

Using special-purpose hardware to achieve a hundred-fold spe...

引用

IEEE international symposium on Performance Analysis of systems and software

作者： David Shaw D. E. Shaw Research and Center of Computational Biology and Bioinformatics Columbia University USA

Summary form only given. Molecular dynamics (MD) simulation has long been recognized as a potentially transformative tool for understanding the behavior of proteins and other biological macromolecules, and for developing a new generation of precisely targeted drugs. Many biologically important phenomena, however, occur over timescales that have previously fallen far outside the reach of MD technology. We have constructed a specialized, massively parallel machine, called Anton, that is capable of performing atomic-level simulations of proteins at a speed roughly two orders of magnitude beyond that of the previous state of the art. The machine has now simulated the behavior of a number of proteins for periods as long as a millisecond -- approximately 100 times the length of the longest such simulation previously published -- revealing aspects of protein dynamics that were previously inaccessible to both computational and experimental study. The speed at which Anton performs these simulations is the result of a tightly coupled codesign process in which novel algorithms and architectural features were developed in concert, guided in large part by an iterative process of performance analysis and optimization.

关键词： Hardware Biological system modeling Computational modeling Target recognition Protein engineering Molecular biophysics Drugs Biological information theory Pharmaceutical technology parallel machines

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Energy management of hybrid DC and AC bus linked microgrid

Energy management of hybrid DC and AC bus linked microgrid

引用

IEEE international symposium on Power Electronics for distributed Generation systems (PEDG)

作者： Dong Bo Yongdong Li Zedong Zheng Department of Electrical Engineering Tsinghua University Beijing China

This paper focuses on the energy management system in distributed generation of microgrid, and describes the power management strategies of the different converters in grid-connected, islanded and transition operations. The microgrid consists of wind turbines, photovoltaic panels, batteries and super-capacitors, also includes both AC and DC zones. One of the most important things is keeping the voltage of DC and AC bus steady. When microgrid is connected to the utility grid, DC-bus voltage is regulated by the inverter. And the magnitude and frequency of AC bus are the same with the grid. However when the microgrid works in island operation, DC-bus voltage must be regulated by microsouces and storages. The magnitude and frequency of AC bus are controlled by droop character of parallel inverters. Because of the fluctuation of renewable energy such as wind turbine and photovoltaic, a fast-dynamic storage system is needed. In order to keep supplying power to the local loads in island operation, a long-term storage system is needed. All of microsouces and storages are connected to DC bus by different converters. The converters must be controlled well to keep power balance, especially during the island operation.

关键词： Inverters Voltage control Wind turbines Converters Renewable energy resources distributed power generation

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A parallel Algorithm for Solving a Kind of Special Structured Linear systems

A Parallel Algorithm for Solving a Kind of Special Structure...

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The Ninth international symposium on distributed Computing and Applications to Business,engineering and Science

作者： Yan ZHONG, Zhi-Gang LUO School of Computer, National University of Defense Technology Changsha, China Feng WU Beijing Special engineering Design and Research Institute Beijing, China

For special structured linear systems, WZ factorizations of matrices are basic mathematical theories to design a class of parallel solving algorithms. So, firstly, new WZ factorizations for the p-tridiagonal matrix are proposed and proved. Next, an effective parallel algorithm is designed. Solving both the subsystem in each processor and the reduced subsystem makes use of the WZ factorization so that a twolevel method is formed. The experiment results confirm the validity of our method.

关键词： WZ factorization p-tridiagonal linear system symmetric positive definite matrix parallel algorithm two-level method

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Cross layer design of heterogeneous virtual MIMO radio networks with multi-optimization

Cross layer design of heterogeneous virtual MIMO radio netwo...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Wei Chen Heh Miao Liang Hong Jim Savage Husam Adas College of Engineering Technology & Computer Science Tennessee State University Nashville TN USA

ISBN: (纸本)9781424465330

In virtual MIMO technology, distributed single-antenna radio systems cooperate on information transmission and reception as a multiple- antenna MIMO radio system. In this paper, a new virtual MIMO communication scheme and routing protocol are cross layered designed for a wireless sensor network (WSN) to jointly achieve reliability, energy efficiency and delay reduction. The proposed communication scheme minimizes the intra communication in virtual MIMO nodes. It saves energy and reduces latency simultaneously at transmission links even when the diameters of virtual nodes are large. Given a required reliability, the proposed routing protocol simultaneously optimizes energy and latency along the route. Virtual MIMO nodes/links are allowed to be heterogeneous in order to apply the visual MIMO technology to a general WSN. A virtual MIMO radio network can be formed for any underlying WSN. The network is reconfigurable with low cost. The performance evaluation shows that the proposed design can fully realize the potential of the virtual MIMO technology and largely improve network throughput, network lifetime, and reliability in a WSN.

关键词： Cross layer design MIMO Radio network Wireless sensor networks Routing protocols Telecommunication network reliability Delay Transmitting antennas Energy efficiency Costs

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