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A fast Electromagnetic Scattering Computation Method for Multiple Hybrid Targets

A fast Electromagnetic Scattering Computation Method for Mul...

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Information Science, parallel and distributed systems (ISPDS), international Conference on

作者： Tao Song Qing-Kuan Wang Li-Li Cong Zhao-Long Wang Air Force Engineering University Xi’an China

ISBN: (数字)9798350352719

ISBN: (纸本)9798350352726

In modern local warfare, targets are often hybrid and grouped, so it is of great significance to investigate the electromagnetic scattering characteristics of multiple hybrid targets. In this paper, the hybrid dielectric and conductor target is analysed using both induced electric and magnetic currents in iterative calculations, with the introduction of the energy change rate. This enables the iterative calculations to be stopped when the change rate is lower than a set threshold value. In the case of multiple targets that do not satisfy the far-field conditions, the physical optics (PO) method is enhanced to render it suitable for near-area coupled scattering solving calculations. This is achieved by establishing a local coordinate system around the source point on the target surface and expanding the origin of the local coordinate system as the expansion point of the source point for the level expansion. The Green's function is then corrected, and the solution calculations for the integral equation of the scattering field are ultimately realised. Furthermore, in order to accelerate the computation, FaFFA is introduced in this paper, which reduces the computational complexity and memory consumption. The numerical results demonstrate a high degree of concordance between the results obtained through the near-field iterative PO method and those produced by the MLFMM solver in the commercial software FEKO.

关键词： Electromagnetic scattering Memory management Integral equations Physical optics Conductors software Dielectrics

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OneShot: View-Adapting Streamlined BFT Protocols with Trusted Execution Environments

OneShot: View-Adapting Streamlined BFT Protocols with Truste...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Jérémie Decouchant David Kozhaya Vincent Rahli Jiangshan Yu TU Delft Delft The Netherlands ABB Research Zurich Switzerland University of Birmingham Birmingham UK University of Sydney Sydney Australia

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Byzantine fault-tolerance is arguably an expensive characteristic for protocols to support, especially when considering its overhead on message complexity, number of communication phases, and number of nodes for resilience. Various works in the literature have addressed optimizing one or more of these dimensions through the use of algorithmic optimizations, trusted execution environments, and streamlined view *** best achievable message complexity, resilience, and latency to date are respectively linear complexity, by ⌊(N − 1)/2⌋, and two communication phases attained Damysus (EuroSys’22), a streamlined hybrid protocol. This paper strictly advances the aforementioned state of the art results by introducing OneShot, a streamlined hybrid protocol that uses one communication phase in the normal case, and one or two phases otherwise. OneShot exploits the information nodes receive about the system to dynamically modify and adapt views. We prove that OneShot is safe and live, and moreover demonstrate through experimental evaluation that it improves throughput and latency by respectively up to 150% and 59% compared to the state of the art.

关键词： Fault tolerance distributed processing Protocols Fault tolerant systems Throughput Complexity theory Proposals

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Tackling consistency-related design challenges of distributed data-intensive systems an action research study 21

Tackling consistency-related design challenges of distribute...

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15th ACM/IEEE international symposium on Empirical software engineering and Measurement, ESEM 2021

作者： Braun, Susanne Debloch, Stefan Wolff, Eberhard Elberzhager, Frank Jedlitschka, Andreas Fraunhofer IESE Kaiserslautern Germany TU Kaiserslautern Kaiserslautern Germany INNOQ Germany

ISBN: (纸本)9781450386654

Background: distributed data-intensive systems are increasingly designed to be only eventually consistent. Persistent data is no longer processed with serialized and transactional access, exposing applications to a range of potential concurrency anomalies that need to be handled by the application itself. Controlling concurrent data access in monolithic systems is already challenging, but the problem is exacerbated in distributed systems. To make it worse, only little systematic engineering guidance is provided by the software architecture community regarding this issue. Aims: In this paper, we report on our study of the effectiveness and applicability of the novel design guidelines we are proposing in this regard. Method: We used action research and conducted it in the context of the software architecture design process of a multi-site platform development project. Results: Our hypotheses regarding effectiveness and applicability have been accepted in the context of the study. The initial design guidelines were refined throughout the study. Thus, we also contribute concrete guidelines for architecting distributed data-intensive systems with eventually consistent data. The guidelines are an advancement of Domain-Driven Design and provide additional patterns for the tactical design part. Conclusions: Based on our results, we recommend using the guidelines to architect safe eventually consistent systems. Because of the relevance of distributed data-intensive systems, we will drive this research forward and evaluate it in further domains. © 2021 IEEE Computer Society. All rights reserved.

关键词： software architecture

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Wheat straw target detection algorithm based on improved YOLOv5 3

Wheat straw target detection algorithm based on improved YOL...

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3rd international Conference on Information Science, parallel and distributed systems, ISPDS 2022

作者： Li, Pengfei Wang, Heng Huang, Xueyu School of Information Engineering Jiangxi University of Science and Technology Ganzhou China School of Software Engineering Jiangxi University of Science and Technology Nanchang China

ISBN: (数字)9781665487474

ISBN: (纸本)9781665487474

In agricultural production, the growth and yield of crops have always attracted people's attention. For the detection of wheat planting density, a wheat straw detection model based on improved YOLOv5 is proposed in this paper. Firstly, at the end of the backbone network, the C3 module (C3TR) integrated with Transformer is used to replace the traditional C3 module, so that the model can extract more feature information about wheat straw in the feature extraction stage;Secondly, after the improved C3 module is embedded the location attention module (Coordinate Attention, CA), by capturing the long-distance dependence on the space and the channel, makes the model more focused on the feature extraction of the target area, and further strengthens the feature extraction ability of the backbone network;Finally, for the traditional frame regression loss the function cannot solve the problem of returning gradients when the predicted frame and the real frame intersect. It is proposed to use CIoU instead of the traditional GIoU, and continue to guide the predicted frame while considering the Euclidean distance and aspect ratio of the center point of the predicted frame and the real frame. Moving closer to the ground-truth box, the loss function is further reduced. On the homemade wheat straw dataset, under the same training strategy, the experimental results show that! Compared with the traditional YOLOv5 model, the improved model has a 1.71% increase in mAP, which proves that the improved model is superior to the traditional YOLOv5 model in terms of accuracy, and has a better detection effect on small targets such as wheat straw some practicality. © 2022 IEEE.

关键词： Feature extraction

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Middleware 2021 Doctoral symposium - Proceedings of the 22nd international Middleware Conference: Doctoral symposium

Middleware 2021 Doctoral Symposium - Proceedings of the 22nd...

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22nd international Middleware Conference, Middleware 2021

ISBN: (纸本)9781450391559

The proceedings contain 11 papers. The topics discussed include: Config 2.0: towards reinforcement learning based configuration of stream processing systems;AutoML: towards automation of machine learning systems maintainability;multi-objective evolutionary based feature selection supported by distributed multi-label classification and deep learning on image/video data;efficient parallel execution of block transactions in blockchain;OneOS: a distributed operating system for the internet of things;non-relational multi-level caching for mitigation of staleness & stragglers in distributed deep learning;using blockchain to provide trusted interoperability to system-of-systems in smart cities context;autonomous resource management in distributed stream processing systems;and using blockchain technology for software identity maintenance.

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Turbo Table: A Semantic-Aware Cache Acceleration System

Turbo Table: A Semantic-Aware Cache Acceleration System

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Hao Yuan Chentao Wu Jie Li Minyi Guo Department of Computer Science and Engineering Shanghai Jiao Tong University Shanghai China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

In the current storage disaggregation architecture, the challenge of quickly retrieving data from storage clusters is typically addressed using caching or data pushdown strategies to accelerate data access and reduce data movement. However, most caching systems still manage data at the page granularity level. For compute-intensive applications, such as analytical applications, this coarse data management approach leads to underutilized computational resources and read-write amplification issues. Additionally, insufficient cache utilization results in inefficient data flow. By managing data at the schema granularity level and modifying the data flow path, we alleviate the read-write amplification problem and improve data transfer speeds. Managing data at the schema level also enables semantic awareness, allowing us to proactively analyze semantics for more precise cache management strategies and accurate prefetching, rather than passively waiting for cache request sequences. We also observed that native compute caches waste valuable cache space and complicate the association between original and result data. To address this, we propose a multi-grained caching model to avoid these limitations. Compared to the baseline, Turbo Table reduces computation time by 2.4% to 36.8%.

关键词： distributed processing Accuracy Prefetching Computational modeling Semantics Computer architecture Data transfer

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CALLIPEPLA: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver 23

CALLIPEPLA: Stream Centric Instruction Set and Mixed Precisi...

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31st ACM/SIGDA international symposium on Field Programmable Gate Arrays (FPGA)

作者： Song, Linghao Guo, Licheng Basalama, Suhail Chi, Yuze Lucas, Robert F. Cong, Jason Univ Calif Los Angeles Los Angeles CA 90095 USA ANSYS Co Livermore Software Technol San Jose CA USA

ISBN: (纸本)9781450394178

The continued growth in the processing power of FPGAs coupled with high bandwidth memories (HBM), makes systems like the Xilinx U280 credible platforms for linear solvers which often dominate the run time of scientific and engineering applications. In this paper, we present Callipepla, an accelerator for a preconditioned conjugate gradient linear solver (CG). FPGA acceleration of CG faces three challenges: (1) how to support an arbitrary problem and terminate acceleration processing on the fly, (2) how to coordinate long-vector data flow among processing modules, and (3) how to save off-chip memory bandwidth and maintain double (FP64) precision accuracy. To tackle the three challenges, we present (1) a stream-centric instruction set for efficient streaming processing and control, (2) vector streaming reuse (VSR) and decentralized vector flow scheduling to coordinate vector data flow among modules and further reduce off-chip memory access latency with a double memory channel design, and (3) a mixed precision scheme to save bandwidth yet still achieve effective double precision quality solutions. To the best of our knowledge, this is the first work to introduce the concept of VSR for data reusing between on-chip modules to reduce unnecessary off-chip accesses and enable modules working in parallel for FPGA accelerators. We prototype the accelerator on a Xilinx U280 HBM FPGA. Our evaluation shows that compared to the Xilinx HPC product, the XcgSolver, Callipepla achieves a speedup of 3.94x, 3.36x higher throughput, and 2.94x better energy efficiency. Compared to an NVIDIA A100 GPU which has 4x the memory bandwidth of Callipepla, we still achieve 77% of its throughput with 3.34x higher energy efficiency. The code is available at https://***/UCLA-VAST/Callipepla.

关键词： High Bandwidth Memory Conjugate Gradient Accelerator

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DFBuffer: High-performance data forwarding software optimized for single-process I/O scenarios

DFBuffer: High-performance data forwarding software optimize...

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international Conference on parallel and distributed systems (ICPADS)

作者： Xiaobin He Wei Xiao Xun Deng Qi Chen Bin Yang Zuoning Chen National Research Center of Parallel Computer Engineering & Technology Beijing China Wuhan National Laboratory for Optoelectronics Huazhong University of Science and Technology Wuhan China Department of Computer Science and Technology Tsinghua University Beijing China Chinese Academy of Engineering Beijing China

Most supercomputers adopt a data forwarding architecture to achieve storage scalability. However, it results in a significant reduction in single-process bandwidth compared to direct file system access. Moreover, considering that a majority of applications uses only a single process for writing and reading data, the low single-process performance also leads to a time overhead for these applications. This paper proposes an userspace forwarding mechanism DFBUFFER with two performance optimization methods: user-space multi-thread request processing and data write buffer in a unit of file. The client of DFBUFFER is embedded in the application as a library reducing the software overhead, and the server implements multi-thread I/O request processing to improve bandwidth efficiency. The data write buffer can asynchronously handle write requests, which accelerates the write bandwidth of compute nodes. We evaluate DFBUFFER on the Sunway exascale prototype system. The results indicate that in the regular mode of DFBUFFER, both the write and read latency are reduced, and the write bandwidth and large-block read bandwidth of single-process are increased by 1.8 times and 2.8 times respectively. The DFBUFFER buffer mode increases the write bandwidth of a single process by 0.8 times over the regular mode. Although the performance advantage of the regular mode of DFBUFFER gradually weakens with the increase of concurrent processes, the DFBUFFER buffer mode has the effect of improving the write bandwidth, the 64-IO-processes application is increased by 0.2 times.

关键词： Spectral efficiency Scalability Prototypes Bandwidth Computer architecture Writing software

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OpenFFT-SME: An Efficient Outer Product Pattern FFT Library on ARM SME CPUs

OpenFFT-SME: An Efficient Outer Product Pattern FFT Library ...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Ruge Zhang Haipeng Jia Yunquan Zhang Baicheng Yan Penghao Ma Long Wang Wenxuan Zhao Institute of Computing Technology Chinese Academy of Sciences Beijing China School of Computer Science and Technology University of Chinese Academy of Sciences Beijing China Huawei Technologies Co. Ltd Beijing China

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Fast Fourier transform (FFT) is widely used in scientific and engineering computation. Recently developed matrix computation units for AI and high-performance computing provide new optimization opportunities for the FFT algorithm. Compared to dedicated matrix multiplication architectures like Intel AMXs, ARM’s Scalable Matrix Extension (SME) provides more flexible outer product instructions to construct matrix multiplications in software. To leverage ARM SME’s matrix multiplication capabilities, this paper proposes a novel optimized outer product pattern for the Cooley-Tukey FFT algorithm and presents OpenFFT-SME, the first FFT library for ARM SME based on this pattern. This pattern can reduce the number of outer product operations and memory accesses to the DFT matrix by exploiting the symmetric and periodic properties of twiddle factors in the DFT matrix. To further boost performance, OpenFFT-SME incorporates software pipelining to enhance execution pipelines in the assembly code kernels. Meanwhile, a butterfly network more suitable for this pattern is designed and integrated. Experiments demonstrate that OpenFFT-SME outperforms vectorization methods on ARM SME CPUs, achieving 3.60x (power of two) and 4.14x speedups (non-power of two) in double-precision compared to FFTW, 2.47x (power of two) and 3.21x (non-power of two) speedups in double-precision compared to FFTE, and speedups of 4.38x (power of two) and 7.02x (non-power of two) in single-precision compared to FFTW. Furthermore, we compare the advantages and disadvantages of our implementation against vectorization methods and analyze its performance characteristics through additional experiments.

关键词： Symmetric matrices Program processors Fast Fourier transforms software algorithms Discrete Fourier transforms software Libraries

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Ensemble Distillation for Out-of-distribution Detection

Ensemble Distillation for Out-of-distribution Detection

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international Conference on parallel and distributed systems (ICPADS)

作者： Dongdong Wang Jingyao Xu Siyang Lu Xiang Wei Liqiang Wang Department of Civil Environmental and Construction Engineering University of Central Florida Orlando FL US School of Computer and Information Technolog Beijing Jiaotong University Beijing China School of Software Engineering Beijing Jiaotong University Beijing China Department of Computer Science University of Central Florida Orlando FL US

Out-of-distribution detection is critical to a reliable application of deep neural networks. To reduce model uncertainty, we propose a simple yet effective approach of ensemble knowledge distillation. We blend ensemble model and knowledge distillation to improve model generalization on indomain recognition, thereby yielding accurate and robust out-of-distribution detection. The former effectively expands data recognition feature space, while the latter further regularizes the model through knowledge distillation, enhancing in-domain feature recognition. This effective integration successfully yields lower model uncertainty on in-domain feature recognition and improves anomaly detection in a more scalable manner. We justify our approach through extensive experiments on various benchmarks, demonstrating its significant improvement in out- of-distribution detection. We validate our approach with a variety of up-to-date DNNs, like Vision Transformer.

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