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检索条件"任意字段=International Symposium on Software Engineering for Parallel and Distributed Systems"

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An Extended Rough Set Model of Graph Structure for Incomplete Information System Using Spark

An Extended Rough Set Model of Graph Structure for Incomplet...

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international Conference on Intelligent System and Knowledge engineering, ISKE

作者： Zhengjiang Wu Tao Lian Ruimin Li Xuyang Wu School of Software Henan Polytechnic University Jiaozuo China School of Computer Science and Technology Henan Polytechnic University Jiaozuo China

In the process of data cleaning, there are problems of high difficulty and low efficiency for processing IIS (incomplete information system) that has large size data. As this problem, distributed IMR (DIMR) is a method with data preprocessing capability for distributed IIS. We propose a distributed extended rough set of graph structure (DRSG) based on DIMR using Spark to accelerate parallel processing of IIS under big data. Specifically, we introduce the concepts of reliable element and controversial element, and establish a connection through non-symmetric similarity relation. Then, a graph structure with hierarchical relationship is proposed. And the path from the reliable element to the controversial element replaces the block in DIMR to calculate the approximation set. Finally, a parallel algorithm is proposed and the experiments show that DRSG reduces the resources required for computing and improves the speed in Spark. A comparative analysis has been conducted comprehensively to assess the performance of the proposed algorithm with DIMR on 8 datasets. And the results show that DRSG has faster speed. And the dependency is similar to or higher than DIMR.

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A Runtime Manager Integrated Emulation Environment for Heterogeneous SoC Design with RISC-V Cores

A Runtime Manager Integrated Emulation Environment for Heter...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： H. Umut Suluhan Serhan Gener Alexander Fusco Joshua Mack Ismet Dagli Mehmet Belviranli Cagatay Edemen Ali Akoglu Electrical and Computer Engineering Department The University of Arizona Tucson AZ USA Computer Science Department Colorado School of Mines Golden CO USA Electrical and Electronics Engineering Department Ozyegin University Istanbul Turkey

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

RISC-V based architectures have gained attention for deployment on platforms from SoC to HPC scale to meet the demands of a wide range of computational workloads that may require specialized hardware tailored to their specific performance goals. In previous works, we introduced CEDR, an open-source, unified compilation and runtime framework designed to facilitate productive hardware-agnostic application deployment on heterogeneous architectures, and lift the barriers to research on the design and evaluation of scheduling heuristics and accelerators for heterogeneous systems. In this study, we demonstrate the capability of CEDR in supporting heterogeneous systems composed of RISC-V cores and a pool of accelerators. We investigate the impact of employing customized lightweight RISC-V cores for managing accelerators individually. Such management approach, compared to centralized accelerator management model, scales down the stress on the runtime environment where compute resources are shared among multiple applications each with varying degrees of task-level parallelism. We perform evaluations on a heterogeneous SoC emulated on the Xilinx Virtex-7 FPGA based on execution of applications from radar, signal processing, and autonomous vehicles domains. We observe that releasing CPU-based compute cores from accelerator management through lightweight RISC-V cores results with up to 47% reduction in time spent on accelerator management. Since CPU-based compute cores exclusively become available for application task execution and contention on resource management is reduced, we observe speedup of up to 2.2x in application execution time based on experiments conducted with workloads consisting of dynamically arriving real-life application scenarios.

关键词： Runtime environment Processor scheduling Computer architecture parallel processing Radar signal processing Hardware Resource management

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A Hybrid Memory Data Placement Strategy for Edge Computing

A Hybrid Memory Data Placement Strategy for Edge Computing

引用

international symposium on parallel and distributed Processing with Applications, ISPA

作者： Binghui Lin Jianxun Zhang Xinyu Qiao College of Information Technology Engineering Tianjin University of Technology and Education Tianjin China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

With the booming development of fields such as cloud computing, big data, and artificial intelligence, the productivity of data have experienced explosive growth, prompting the expansion of edge computing. However, as data-intensive applications continue to increase, memory systems based solely on Dynamic Random Access Memory (DRAM) are no longer able to meet the demands of edge computing for high memory footprints, low access latency, and low energy consumption. In this paper, we organize DRAM as a cache for Non-Volatile Memory (NVM) and propose a utility-based hybrid memory data placement (UDP-HM) strategy, to address energy efficiency issues. UDP-HM places data in a hybrid memory system by calculating page utility. A series of simulation experiments are conducted to verify and evaluate the proposed hybrid memory data placement strategy. Under different workload intensities, compared to UH-MEM and RBLA, UDP-HM shows an average increase of 8.71% and 9.21% respectively in DRAM cache read/write operations, an average increase of 10.18% and 13.94% respectively in latency, an average decrease of 35.24% and 37.18% respectively in energy consumption, and an average decrease of 26.48% and 31.68% respectively in energy-delay product.

关键词： Productivity Energy consumption Nonvolatile memory Computational modeling Memory management Memory architecture Random access memory Energy efficiency Explosives Edge computing

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SPIDER: An Effective, Efficient and Robust Load Scheduler for Real-time Split Frame Rendering

SPIDER: An Effective, Efficient and Robust Load Scheduler fo...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Bingzheng Ma Ziqiang Zhang Yusen Li Wentong Cai Gang Wang Xiaoguang Liu School of Computer Science Nankai University Tianjin China School of Computer Science and Engineering Nanyang Technological University Singapore

Interactive graphics applications are generally latency-critical, while using multiple GPUs to accelerate such applications becomes possible recently with support from both hardware and software. Split frame rendering (SFR) is a popular approach for multi-GPU rendering, which splits a frame into disjoint regions and assigns the regions to different GPUs. Load scheduling of SFR is a crucial but challenging issue for achieving maximum rendering performance in real-time rendering, which is not well addressed by the existing solutions. In this paper, we propose SPIDER, a load scheduler which leverages fuzzy PID (proportional integral derivative) controller to schedule the rendering workload among GPUs. SPIDER has several distinguished properties: it is a feedback based mechanism which does not need a full knowledge of the dynamic system; it is very computationally efficient and easy to implement; it is highly robust to dynamic workload changes. Extensive experiments are conducted to evaluate SPIDER and the results show that SPIDER always achieves near-optimal performance for various workload patterns, which outperforms the state-of-the-art baselines signif-icantly.

关键词： Graphics Schedules distributed processing Rendering (computer graphics) Real-time systems software Hardware

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Efficient distributed Secure Memory with Migratable Merkle Tree

Efficient Distributed Secure Memory with Migratable Merkle T...

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IEEE symposium on High-Performance Computer Architecture

作者： Erhu Feng Dong Du Yubin Xia Haibo Chen Institute of Parallel and Distributed Systems Shanghai Jiao Tong University Shanghai Artificial Intelligence Laboratory

Hardware-assisted enclaves with memory encryption have been widely adopted in the prevailing architectures, e.g., Intel SGX/TDX, AMD SEV, ARM CCA, etc. However, existing enclave designs fall short in supporting efficient cooperation among cross-node enclaves (i.e., multi-machines) because the range of hardware memory protection is within a single node. A naive approach is to leverage cryptography at the application level and transfer data between nodes through secure channels (e.g., SSL). However, it incurs orders of magnitude costs due to expensive encryption/decryption, especially for distributed applications with large data transfer, e.g., MapReduce and graph computing. A secure and efficient mechanism of distributed secure memory is necessary but still *** paper proposes Migratable Merkle Tree (MMT), a design enabling efficient distributed secure memory to support distributed confidential computing. MMT sets up an integrity forest for distributed memory on multiple nodes. It allows an enclave to securely delegate an MMT closure, which contains both data and metadata of a subtree, to a remote enclave. By reusing the memory encryption mechanisms of existing enclaves, our design achieves secure data transfer without software re-encryption. We have implemented a prototype of MMT and a trusted firmware for management, and further applied MMT to real-world distributed applications. The evaluation results show that compared with existing systems using the AES-NI instruction, MMT can achieve up to 13x speedup on data transferring, and gain 12%~58% improvement on the end-to-end performance of MapReduce and PageRank.

关键词： Protocols Program processors Memory management Prototypes Metadata Data transfer software

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Adaptive Task Offloading in High-Speed Vehicular Networks Using Enhanced D3QN Algorithm

Adaptive Task Offloading in High-Speed Vehicular Networks Us...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Panyang Zhou Xiaofei Xing Xiao Wang Tian Wang Guojun Wang School of Computer Science and Cyber Engineering Guangzhou University Guangzhou China Institute of Artificial Intelligence and Future Networks Beijing Normal University Zhuhai China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

With the development of Vehicle Edge Computing (VEC), vehicles can offload tasks to Road Side Units (RSU) for processing. However, optimizing latency is a challenging problem in high-speed environments. This paper investigates the latency optimization problem for task offloading in high-speed environments, where multiple vehicles on the user end can choose to offload their tasks to either RSUs or Base Station (BS) for computation. Meanwhile, based on the vehicle’s location and speed, we predict the time a vehicle spends within the communication range of an RSU to select a more suitable edge node. Then, an improved Group Priority Sampling-Double Dueling Deep Q Network (GPS-D3QN) algorithm is used to optimize the proposed task offloading, resulting in an optimal offloading strategy that reduces latency. Through simulation, by varying the number of vehicles and RSUs, the proposed optimization scheme is verified to have an advantage in terms of delay compared to other schemes.

关键词： Base stations Adaptive systems Road side unit Computational modeling Collaboration Prediction algorithms Delays Optimization Edge computing Convergence

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TransFlowLog: Log Anomaly Detection Based on Transformer Encoder and Interflow Decoder

TransFlowLog: Log Anomaly Detection Based on Transformer Enc...

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international Conference on parallel and distributed systems (ICPADS)

作者： Zaichao Lin Siyang Lu Ningning Han Dongdong Wang Xiang Wei Mingquan Wang School of Computer and Information Technology Beijing Jiaotong University Beijing China Department of Civil Environmental and Construction Engineering University of Central Florida Orlando FL US School of Software Engineering Beijing Jiaotong University Beijing China China Academy of Launch Vehicle Technology Beijing China

Logs are valuable resources that record the health status of systems. Analyzing logs to uncover and investigate abnormal behaviors has become an essential approach of ensuring system security. However, some potential anomalies may be missed when performing log anomaly detection, and even a seemingly insignificant abnormal behavior can lead to a series of severe anomalies or continuous negative impact on the performance of systems. Therefore, the reliability and security of systems are facing significant challenges. To address this issue, in this study, we propose TransFlowLog, an Encoder-Decoder architecture-based approach for log anomaly detection. It utilizes the Transformer Encoder, a state-of-the-art sequence modeling technique, to comprehensively understand contextual relationships using self-attention mechanism. Moreover, we introduce the Interflow Decoder, which considers information exchange between channels in embedded log sequences. The Interflow Decoder enhances the features encoded by the Transformer Encoder in both sequence and channel dimensions, thereby capturing interdependence between different channels. Comparative experiments conducted on three real-world datasets demonstrate the effectiveness of the proposed method, as it achieves higher F1-score and reduces the number of false negatives.

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WAN-INT: Cost-Effective In-Band Network Telemetry in WAN With A Performance-aware Path Planner

WAN-INT: Cost-Effective In-Band Network Telemetry in WAN Wit...

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international Conference on parallel and distributed systems (ICPADS)

作者： Simian Chen Dongbiao He Xiaopeng Ma Zhongxing Ming Laizhong Cui College of Computer Science and Software Engineering Shenzhen University Sangfor Technologies Inc China National Tobacco Corporation Anhui Province Guangdong Laboratory of Artificial Intelligence and Digital Economy (SZ)

With the development of cross-datacenter services, accurate and low-cost network performance measurement enables better traffic scheduling. However, the existing network measurement suffers from a lack of telemetry granularities and excessive costs. Besides, the implementation of INT in the WAN remains undefined. In this work, We propose WAN-INT, a two-phase path orchestration algorithm designed to address the challenges posed by limited communication resources and varying link states in WAN scenarios. By generating a telemetry policy based on this algorithm, it can effectively adapt to the requirements of various applications and network states, achieving a balance between telemetry quality and cost limitations. We conduct experiments in a commercial WAN environment. Results show that WAN-INT outperforms existing schemes and reaches a good compromise between the telemetry quality and cost constraints. Compared with the state-of-the-art telemetry system, WAN-INT effectively reduces by at least 43% of telemetry cost while ensuring telemetry quality.

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A Bilateral Stable Matching Dispatching Method in Crowdsource Food Delivery Service

A Bilateral Stable Matching Dispatching Method in Crowdsourc...

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international Conference on parallel and distributed systems (ICPADS)

作者： Feihong Huang Wei Jiang School of Information and Software Engineering University of Electronic Science and Technology of China Chengdu China

On-demand food delivery is currently the fastest- growing and most time-sensitive form of logistics in all logistics industry. As the demographic dividend gradually diminishes, an increasing number of platforms are adopting crowdsourced delivery. However, individual crowdsourced riders consider opportunity costs when accepting orders, which determines their decision to make deliveries. Frequent order rejections lead to orders not being finished within the appointed time, and the imbalance in workload among riders also contributes to a high rider attrition rate. In this paper, we propose a stable dispatching algorithm based on bilateral stable matching between orders and riders. This algorithm considers multiple objectives such as system efficiency, service quality, rider experience, and workload balance to address the instability in the dispatching process. Additionally, we design a method to calculate the target dispatching order quantity by fitting the order density function using dispatching order quantity from different time periods. Finally, we demonstrate the effectiveness of the proposed dispatching method through a comparative analysis of experimental results.

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Lock-free Computation of PageRank in Dynamic Graphs

Lock-free Computation of PageRank in Dynamic Graphs

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Subhajit Sahu Kishore Kothapalli Hemalatha Eedi Sathya Peri International Institute of Information Technology Hyderabad India JNTUH College of Engineering Hyderabad India Indian Institute of Technology Hyderabad India

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

PageRank is a metric that assigns importance to the vertices of a graph based on its neighbors and their scores. Recently, there has been increasing interest in computing PageRank on dynamic graphs, where the graph structure evolves due to edge insertions and deletions. However, traditional barrier-based approaches for updating PageRanks encounter significant wait times on certain graph structures, leading to high overall runtimes. Additionally, the growing trend of multicore architectures with increased core counts has raised concerns about random thread delays and failures. In this study, we propose a lock-free algorithm for updating PageRank scores on dynamic graphs. First, we introduce our Dynamic Frontier (DF) approach, which identifies and processes vertices likely to change PageRanks with minimal overhead. Subsequently, we integrate DF with our lock-free and fault-tolerant PageRank (Alg. DF LF ), incorporating a helping mechanism among threads between its two phases. Experimental results demonstrate that Alg. DF LF not only eliminates waiting times at iteration barriers but also withstands random thread delays and crashes. On average, it is 4.6× faster than lock-free Naive-dynamic PageRank (Alg. ND LF ).

关键词： Measurement Runtime Multicore processing Instruction sets Heuristic algorithms Redundancy Fault tolerant systems

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