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Improved Motor Imagery Classification Using Elastic Net-based Feature Optimization and a Heterogeneous Ensemble Classifier

Improved Motor Imagery Classification Using Elastic Net-base...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Shimiao Chen Xiangzeng Kong Junfeng Han Cailin Wu Tingting Zhang School of Future Technology Fujian Agriculture and Forestry University Fuzhou China College of Mechanical and Electrical Engineering Fujian Agriculture and Forestry University Fuzhou China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Brain-computer interface (BCI) enables direct communication between the brain and external devices, with applications in areas like patient assistance, entertainment, military, and smart homes. Motor imagery EEG signals, generated by imagining specific movements, are critical for BCI systems as they can control external devices. To enhance the decoding accuracy of motor imagery EEG signals, this paper proposes a novel machine learning framework composed of three main modules. Firstly, a multi-band spatial feature learning technique is devised to identify discriminative spatial features from different frequency ranges and aggregate them to exploit the crucial complementary information among them. Subsequently, to further optimize the extracted features, a regularized feature selection method based on Elastic Net is introduced. This method automates the selection of the most significant features by considering both the relationship between features and the objective task, as well as the inter-feature relationships, leading to a more comprehensive feature selection. Finally, the optimized features are input into a heterogeneous ensemble classifier, which integrates the strengths of various base classifiers to enhance classification accuracy and robustness. Experiments on several publicly available datasets demonstrate that our proposed method achieves superior performance in contrast to existing alternatives.

关键词： Representation learning Visualization Technological innovation Accuracy Motors Feature extraction Electroencephalography Decoding Steady-state Ensemble learning

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3D Electrical Impedance Tomography System for Real-Time Annular Multiphase Flow Metering 3

3D Electrical Impedance Tomography System for Real-Time Annu...

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3rd international Conference on distributed Sensing and Intelligent systems, ICDSIS 2022

作者： Tarek, Mohamed Meribout, Mahmoud Tiwari, Varun Kumar Department of Electrical and Computer Engineering Khalifa University Abu Dhabi United Arab Emirates

ISBN: (纸本)9781839538186

With the rapid progress of tomography systems, a need has emerged for innovation that can provide high accuracy measurements, fast acquisition rate, and low-cost robust systems for multi-phase flow and medical instruments. The main objective of this work is to design and implement a 3D Electrical Impedance Tomography (EIT) system to effectively monitor a multi-phase flow which consists of an annular flow comprising of an air-core of unknown diameter, surrounded by a liquid phase, such as oil and water mixture of high water-cut value. The system consists of an array of electrode sensors evenly distributed around the pipe confining the three-phase flow. Subsequently, a dedicated hardware module (GPU) is used to reconstruct these signals, captured from the sensors, into a 3D image of the flow by solving the forward-inverse problem. The annular flow is generated using a flow conditioner consisting of a swirl cage followed by a bluff body that generates vortices that push the high dense liquid phase to the outer side of the pipeline. The 3D EIT system is designed to accurately measure the gas liquid fraction and the liquid-liquid fraction and provide the 3D volume image of the flow. Hence, it can be utilized for pipeline and reservoirs characterization to achieve high efficiency, cost reduction, and safer production. The approach is to design a dedicated, highly parallel hardware architecture that can sustain the high computation complexity of the 3D EIT algorithm. Coincidentally, advanced software development tools are available to help effectively develop these parallel hardware algorithms. The main novelty is utilizing GPUs to outperform the existing real-time tomography hardware platforms, mainly based on Field Programmable Gate Array (FPGAs), which have the disadvantage of being less dense and feature lower precise arithmetic operations. Matrix multiplication and matrix inversion are considered the most intensive computation in Electric Impedance Tomography (EIT). T

关键词： Graphics processing unit

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DNZ-LSM-Tree for Hybrid Storage systems

DNZ-LSM-Tree for Hybrid Storage Systems

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Tao Cai Zeyu Huang Dejiao Niu Qiangqiang Ni Zihao Yinyi Danping Zou School of Computer Science and Communcation Engineering JiangSu University Zhenjiang China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

The Log-Structured Merge tree (LSM-tree) can transform random writes into sequential writes, adapting to the high sequential write performance of external storage devices. This has led to its widespread application in various Key-Value (KV) storage systems. However, the LSM-tree has issues such as write amplification and periodic sharp declines in performance. Non-Volatile Memory (NVM) and Zoned Namespace (ZNS) Solid State Drive (SSD) are emerging storage devices that differ significantly from traditional SSDs. Directly applying LSM-tree to NVM and ZNS SSD is challenging due to their unique advantages and characteristics. This paper proposes the DNZ-LSM-Tree, tailored for hybrid external storage constructed using NVM and ZNS SSD. Initially, we present the structure of the DNZ-LSM-Tree, which reconstructs the LSM-tree by utilizing the distinct features of memory, NVM, and ZNS SSD. Subsequently, to address the cascading compaction issue that significantly affects the performance of LSM-tree, we construct a Compaction Cache in NVM and design a layered distribution strategy for Sorted String Tables (SSTables) with cascading compactions. In addition, the zone allocation strategy based on key overlap ratio estimation and the wear leveling strategy for DNZ-LSM-Tree are designed to manage the zones of ZNS SSD. Finally, a prototype of KV storage system based on hybrid storage devices called HNZMS is implemented by employing DNZ-LSM-Tree and tested by YCSB. The results indicate that compared to the storage system called ListDB based on LSM-tree, HNZMS can increase the write throughput by 36.2% and reduce the write amplification by 51.9%.

关键词： Performance evaluation Nonvolatile memory Distribution strategy Solid state drives Prototypes Estimation Transforms Throughput Compaction Resource management

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Fast Policy Convergence for Traffic engineering with Proactive distributed Message-Passing

Fast Policy Convergence for Traffic Engineering with Proacti...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Zicheng Wang Zirui Zhuang Jingyu Wang Qi Qi Haifeng Sun Jianxin Liao Beijing University of Posts and Telecommunications Beijing China

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Nowadays, the rise of various network applications makes network traffic become increasingly complex, which brings more stringent requirements to traffic engineering (TE). Although the state-of-the-art TE approaches based on deep reinforcement learning (DRL) or traditional methods can generate optimal solutions for fixed traffic matrices, they cannot converge fast enough to provide real-time optimization in real networks either because of excessive computation times or high communication overheads. Moreover, due to the dynamically changing traffic load on the network, it is also challenging to achieve optimization of maximum link utilization (MLU) and end-to-end delay at the same time since these two optimization objectives may be conflicting, especially when the network is under a low traffic load, which makes the modeling very difficult. To meet these challenges, we present RT-TE, a TE system based on DRL and distributed message-passing between intelligent agents that can achieve real-time optimization for both MLU and end-to-end delay. To reduce the communication time due to link propagation delay during the optimization process, we design a proactive message-passing mechanism that allows agents to use partial messages to compute the routing policy while maintaining the optimization performance. Additionally, to achieve the tradeoff between the two optimization objectives, we model the propagation delay into the DRL model and design a multi-objective training framework with parameter transfer for training. Based on theoretical modeling, we can find the best tradeoff between the two objectives. Moreover, to improve the model's generalization for various traffic flows, we use a GNN model to generate the rewards of the DRL model, which greatly speeds up the training phase and allows us to feed massive amounts of data into the model. Through evaluations of real-world network topologies, our approach shows a 10%-20% improvement in optimizing MLU under short traffic-ch

关键词： Training Computational modeling Telecommunication traffic Quality of service Routing Data models Real-time systems

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A K-Band Alternating Coupled Filter Based on Multi-Layer Electroforming Technology

A K-Band Alternating Coupled Filter Based on Multi-Layer Ele...

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Academic international symposium on Optoelectronics and Microelectronics Technology (AISOMT)

作者： Xuyao Zhang Yuedong Xu Jincheng Ma Shengying Zou Jie Lin Peng Jin School of Instrumentation Science and Engineering Harbin Institute of Technology Harbin China School of Physics Harbin Institute of Technology Harbin China Southwest Institute of Technical Physics Chengdu China Key Laboratory of Micro-systems and Micro-structures Manufacturing Ministry of Education School of Physics Harbin Institute of Technology Harbin China Key Laboratory of Micro-systems and Micro-structures Manufacturing Ministry of Education Harbin Institute of Technology Harbin China

ISBN: (数字)9798331542283

ISBN: (纸本)9798331542290

To meet the requirement of communication industry for high-performance narrowband filters, we design a copper-based micro-coaxial structure for a K-band capacitive gap and parallel inductance alternating coupled narrowband filter. The filter has a passband center frequency of 22.50 GHz and a relative bandwidth of 4.4% The return loss is greater than 15 dB in the 22.0-23.0 GHz range, with an optimal insertion loss of 3.39 dB. Comparing with other filters with the same frequency, the designed filter achieves a narrower bandwidth and maintains lower insertion loss within the passband simultaneously, while ensuring miniaturization of the overall structure, offering an effective micro-coaxial solution for integrated communication systems.

关键词： Radio frequency Performance evaluation Filters K-band Insertion loss Transceivers software Radar applications Passband Narrowband

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Artificial Intelligence of Things Enabled Fungiculture in Shipping Container

Artificial Intelligence of Things Enabled Fungiculture in Sh...

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ACIS international Conference on software engineering, Artificial Intelligence, Networking, and parallel/distributed Computing (SNPD)

作者： Boon Siong Wee Cheng Siong Chin Anurag Sharma Faculty of Science Agriculture and Engineering Newcastle University in Singapore Singapore

This paper presents an automated environmental monitoring and control system for mushroom vertical farming in a refurbished shipping container. We describe the architecture of our NVIDIA Jetson Nano based system and presents the outcome of our successful attempts at cultivating Oyster mushrooms. The most important environmental parameters for healthy Oyster mushroom growth is temperature and humidity. We discuss the issues and challenges faced in this work, and suggest ways to improve on the current system in order to cultivate high-value mushrooms.

关键词： Humidity Computer architecture Containers Control systems Internet of Things Environmental monitoring Artificial intelligence

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HINT: Designing Cache-Efficient MPI_Alltoall using Hybrid Memory Copy Ordering and Non-Temporal Instructions

HINT: Designing Cache-Efficient MPI_Alltoall using Hybrid Me...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Bharath Ramesh Nick Contini Nawras Alnaasan Kaushik Kandadi Suresh Mustafa Abduljabbar Aamir Shafi Hari Subramoni Dhabaleswar K. D K Panda Department of Computer Science and Engineering The Ohio State University Columbus USA

ISBN: (数字)9798350387117

ISBN: (纸本)9798350387124

Modern multi/many-core processors in HPC systems have hundreds of cores with deep memory hierarchies. HPC applications run at high core counts often experience contention between processes/threads on shared resources such as caches, leading to degraded performance. This is especially true for dense collective patterns, such as MPI_Alltoall, that have many concurrent memory transactions. The ordering of memory copies during the MPI_Alltoall operation can significantly affect performance as cache-efficient access patterns could potentially reduce cache misses. However, the correct access pattern depends on various factors, including cache associativity, cache sizes, coherence protocols, and memory layouts. This paper first identifies sources of bottlenecks in performing memory operations in an Alltoall. We propose different orderings for the memory copies in Alltoall operations and study their effectiveness for various message sizes. We overcome bandwidth bottlenecks related to repeated bus requests in the cache by proposing a hybrid memory copy scheme that combines regular temporal and non-temporal stores. Then, we implement an Alltoall algorithm that dynamically picks between memory orders based on their performance for different message sizes/number of processes. To the best of our knowledge, this is the first work that explores a combination of dynamic memory copy orders and non-temporal instructions for optimizing MPI_Alltoall operations. Our proposed solutions reduce the latency versus state-of-the-art solutions by up to 10x at the micro-benchmark level and 22.2% for the CPU time per loop in distributed Fast Fourier Transforms (FFTs) using P3DFFT.

关键词： distributed processing Protocols Program processors Fast Fourier transforms Heuristic algorithms Layout Coherence

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PhantomPatch: Easy-ignoring Attacks on Object Detectors Using Ghosting Artifacts

PhantomPatch: Easy-ignoring Attacks on Object Detectors Usin...

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international symposium on parallel and distributed Processing with Applications, ISPA

作者： Xiaolong Guo Qingsong Yao Jingwei Li Xuewen Dong Jianfeng Ma School of Cyber Engineering Xidian University Xi’an China State Key Lab of ISN School of Telecommunications Engineering Xidian University Xi’an China School of Computer Science and Technology Xidian University Xi’an China

ISBN: (数字)9798331509712

ISBN: (纸本)9798331509729

Current patches used to attack object detectors are easily noticeable as abnormal. To mitigate this shortcoming, we devise an innovative technique named PhantomPatch, which leverages lens flare phenomena to attack object detectors, particularly in autonomous driving systems. Leveraging transfer-based adversarial examples, this method fools object detectors by projecting deceptive lens flares or ghost images, which are meaningless to people, while the light source looks like nearby light for people. Thus, it is easy to *** this way, we enable a cost-effective approach to manipulate the perception of the vehicle remotely. This strategy harmonizes adversarial patches with projecting image integrity correcting. Firstly, we propose to train a black-box transfer-based adversarial patch to fool the object-detecting system behind the camera. Then, the patch is printed and attached in front of a flashlight, which casts the patch onto the camera, resulting in a ghost image. We maintain the integrity of the image captured by the camera while casting the patch with image loss correction and optical distortion *** experimental results validate the effectiveness of PhantomPatch in evading existing object detectors such as YOLO V3/V5 and Faster R-CNN. Notably, during nocturnal scenarios, the technique achieves a success rate of 98.2%. Furthermore, our approach addresses limitations of existing methods, like conspicuousness and positional constraints, offering a low-cost and effective technique for adversarial attacks, especially for autonomous vehicles. Code and demo are available at https://***/rufus0803/PhantomPatch.

关键词： YOLO Optical losses Target recognition Closed box Detectors Optical distortion Cameras Robustness Autonomous vehicles Lenses

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Hardware Assisted Full Time Synchronization of EtherCAT Network with Cable Redundancy

Hardware Assisted Full Time Synchronization of EtherCAT Netw...

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international symposium on Industrial Embedded systems

作者： Ben Zhang Tao Tao Xuesong Mei School of Mechanical Engineering Xi'an Jiaotong University Xi'an China

ISBN: (数字)9798350388633

ISBN: (纸本)9798350388640

The nodes in a distributed control system require precise time synchronization to accomplish cooperation tasks. EtherCAT, as a commonly used serial bus in the industry, can only achieve time synchronization between slaves. The time differences between the master and the slaves are relatively large. In this work, we develop a hardware assisted solution to achieve full time synchronization in the EtherCAT network. The proposed solution synchronizes all slaves with distributed clock to the master. The master time is maintained by programmable hardware and serves as the system time. Using the timestamps generated by hardware, the wire delays between the master and the slaves are calculated. During drift compensation step, the hardware embeds the master time into the drift compensation frame generated by the software. The proposed solution also compensates for changes in propagation delay caused by a cable disconnection, thereby quickly restoring synchronization performance. By performing extensive experiments, the proposed solution achieves synchronization accuracy of 0.1us in both single-port and cable redundancy mode. The means of system time differences are less than 30.54ns with standard deviations less than 36.23ns. The maximum change in system time differences when a cable is disconnected does not exceed 1us, and synchronization is restored within 50 drift compensations.

关键词： Accuracy Redundancy Main-secondary Hardware Delays Synchronization IP networks Wire Field programmable gate arrays Propagation delay

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Keynote Talk 1: Efficient DNN Training at Scale: from Algorithms to Hardware

Keynote Talk 1: Efficient DNN Training at Scale: from Algori...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Gennady Pekhimenko University of Toronto

ISBN: (数字)9781665497473

ISBN: (纸本)9781665497480

The recent popularity of deep neural networks (DNNs) has generated a lot of research interest in performing DNN-related computation efficiently. However, the primary focus of systems research is usually quite narrow and limited to inference (i.e., how to efficiently execute already trained models) and image classification networks as the primary benchmark for evaluation. In this talk, we will demonstrate a holistic approach to DNN training acceleration and scalability starting from the algorithm, to software and hardware optimizations, to special development and optimization tools.

关键词： distributed processing Conferences Training Hardware

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