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30th international Conference on parallel and distributed Computing, Euro-Par 2024

30th International Conference on Parallel and Distributed Co...

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30th international Conference on parallel and distributed Computing, Euro-Par 2024

ISBN: (纸本)9783031697654

The proceedings contain 88 papers. The special focus in this conference is on parallel and distributed Computing. The topics include: ESIMD GPU Implementations of Deep Learning Sparse Matrix Kernels;Deconstructing HPL-MxP Benchmark: A Numerical Perspective;ImageMap: Enabling Efficient Mapping from Image Processing DSL to CGRA;Predicting GPU Kernel’s Performance on Upcoming Architectures;Bringing Auto-Tuning to HIP: Analysis of Tuning Impact and Difficulty on AMD and Nvidia GPUs;A Mechanism to Generate Interception Based Tools for HPC Libraries;OMPGPT: A Generative Pre-trained Transformer Model for OpenMP;scheduling distributed I/O resources in HPC systems;Light-Weight Prediction for Improving Energy Consumption in HPC Platforms;EKRM: Efficient Key-Value Retrieval Method to Reduce Data Lookup Overhead for Redis;Automated Data management and Learning-Based scheduling for Ray-Based Hybrid HPC-Cloud systems;solving the Restricted Assignment Problem to Schedule Multi-get Requests in Key-Value Stores;PriCE: Privacy-Preserving and Cost-Effective scheduling for parallelizing the Large Medical Image Processing Workflow over Hybrid Clouds;a 1.25(1+ϵ)-Approximation Algorithm for scheduling with Rejection Costs Proportional to Processing Times;DProbe: Profiling and Predicting Multi-tenant Deep Learning Workloads for GPU resource Scaling;sAirflow: Adopting Serverless in a Legacy Workflow Scheduler;hurry: Dynamic Collaborative Framework For Low-Orbit Mega-Constellation Data Downloading;optimizing Service Replication and Placement for IoT Applications in Fog Computing systems;Deadline-Driven Enhancements and Response Time Analysis of ROS2 Multi-threaded Executors;Efficient Coupling Streaming AI and Ensemble Simulations on HPC Clusters;context-Aware Runtime Type Prediction for Heterogeneous Microservices;makespan Minimization for scheduling on Heterogeneous Platforms with Precedence Constraints;Node Bundle scheduling: An Ultra-low Latency Traffic scheduling Algorithm for TAS-Based

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30th international Conference on parallel and distributed Computing, Euro-Par 2024

30th International Conference on Parallel and Distributed Co...

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30th international Conference on parallel and distributed Computing, Euro-Par 2024

ISBN: (纸本)9783031695766

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30th international Conference on parallel and distributed Computing, Euro-Par 2024

30th International Conference on Parallel and Distributed Co...

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30th international Conference on parallel and distributed Computing, Euro-Par 2024

ISBN: (纸本)9783031695827

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Dynamic Priority Job scheduling on a Hadoop YARN Platform 29

Dynamic Priority Job Scheduling on a Hadoop YARN Platform

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29th IEEE international Conference on parallel and distributed systems, ICPADS 2023

作者： Du, Nana Ji, Yudong Hou, Aiqin Wu, Chase Nie, Weike Northwest University School of Information Science and Technology Xi'an710000 China New Jersey Institute of Technology Department of Data Science NewarkNJ07102 United States

ISBN: (纸本)9798350330717

In Hadoop's big data processing systems, YARN is responsible for resource management and job scheduling. The built-in job scheduling algorithms in YARN are simple to execute, but have some limitations such as job starvation, excessive server load, and load imbalance. In this paper, we propose a new Hybrid Dynamic Priority job scheduling algorithm (HDPS) to address these limitations. HDPS dynamically adjusts the priority of a job as its waiting time increases to prevent job starvation. It also features a task assignment strategy designed specifically to address data locality by considering the available resources of servers and the distribution of data blocks stored on servers to reduce data transfer time and improve job execution efficiency. We implement and integrate HDPS into YARN and conduct experiments in a real Hadoop system using built-in benchmark test cases of Hadoop. Experimental results show that HDPS exhibits comprehensive superior performance over existing algorithms in terms of execution efficiency and load balance. © 2023 IEEE.

关键词： Data Locality Hadoop Job scheduling MapReduce YARN

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RARE: Renewable Energy Aware resource management in Datacenters 25th

RARE: Renewable Energy Aware Resource Management in Datacent...

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25th international workshop on Job scheduling Strategies for parallel Processing (JSSPP)

作者： Venkataswamy, Vanamala Grigsby, Jake Grimshaw, Andrew Qi, Yanjun Univ Virginia Charlottesville VA 22903 USA Lancium Compute 6006 Thomas Rd Houston The Woodlands TX 77401 USA

ISBN: (纸本)9783031226977;9783031226984

The exponential growth in demand for digital services drives massive datacenter energy consumption and negative environmental impacts. Promoting sustainable solutions to pressing energy and digital infrastructure challenges is crucial. Several hyperscale cloud providers have announced plans to power their datacenters using renewable energy. However, integrating renewables to power the datacenters is challenging because the power generation is intermittent, necessitating approaches to tackle power supply variability. Hand engineering domain-specific heuristics-based schedulers to meet specific objective functions in such complex dynamic green datacenter environments is time-consuming, expensive, and requires extensive tuning by domain experts. The green datacenters need smart systems and system software to employ multiple renewable energy sources (wind and solar) by intelligently adapting computing to renewable energy generation. We present RARE (Renewable energy Aware resource management), a Deep Reinforcement Learning (DRL) job scheduler that automatically learns effective job scheduling policies while continually adapting to datacenters' complex dynamic environment. The resulting DRL scheduler performs better than heuristic scheduling policies with different workloads and adapts to the intermittent power supply from renewables. We demonstrate DRL scheduler system design parameters that, when tuned correctly, produce better performance. Finally, we demonstrate that the DRL scheduler can learn from and improve upon existing heuristic policies using Offline Learning.

关键词： Renewable energy Datacenters Job scheduling Deep reinforcement learning

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Randomized Testing Framework for Dissecting NVIDIA GPGPU Thread Block-To-SM scheduling Mechanisms 29

Randomized Testing Framework for Dissecting NVIDIA GPGPU Thr...

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29th IEEE international Conference on parallel and distributed systems, ICPADS 2023

作者： Wang, Chongxi Song, Penghao Zhao, Haoyu Zhang, Fuxin Wang, Jian Zhang, Longbing Chinese Academy of Sciences State Key Lab of Processors Institute of Computing Technology Beijing China University of Chinese Academy of Sciences Beijing China

ISBN: (纸本)9798350330717

NVIDIA General Purpose Graphics Processing Units (GPGPUs) have been extensively utilized in scientific computing, artificial intelligence acceleration, and numerous other fields. The compute unified device architecture (CUDA) programming interface facilitates access to the enormous computing power of NVIDIA GPGPUs. However, the thread block-to-stream multiprocessor (SM) scheduler of NVIDIA GPGPUs has remained a black box, presenting challenges for performance modeling of CUDA programs, especially those featuring concurrent kernel execution, as well as hindering further exploration of the full potential of NVIDIA GPGPUs. To address these issues, we have devised a randomized testing framework targeting thread block-to-SM scheduling. In this framework, concurrent kernel sequences are randomly generated and assessed by a self-implemented scheduling predictor along with an actual NVIDIA GPGPU. Through iteratively scrutinizing the discrepancies between predictions and actual results, we dissect the key thread block-to-SM scheduling mechanisms intrinsic to NVIDIA GPGPUs, revealing their underlying logic and considerations. This process continuously refines the scheduling predictor until it accurately aligns with real-world NVIDIA GPGPU scheduling. Furthermore, we investigate the monitoring and allocation mechanisms for distinct resources in NVIDIA GPGPUs and SMs, elucidating the essential connection between resource management and thread block scheduling. Our comprehensive and precise analysis of Nvidia GPGPU thread block-to-SM scheduling contributes significantly to constructing more accurate simulators for GPGPU performance modeling. Moreover, it facilitates optimizing CUDA programs based on the scheduling mechanisms to exploit more parallelism among thread blocks of concurrent kernels. © 2023 IEEE.

关键词： NVIDIA GPGPUs randomized testing framework resource management Thread block-to-SM scheduling

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Digital Twin Empowered Task Offloading for Vehicular Edge Computing 29

Digital Twin Empowered Task Offloading for Vehicular Edge Co...

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29th IEEE international Conference on parallel and distributed systems, ICPADS 2023

作者： Tang, Chaogang Wu, Huaming Zhu, Chunsheng Xiao, Shuo China University of Mining and Technology School of Computer Science and Technology Xuzhou221116 China Tianjin University Center for Applied Mathematics Tianjin300072 China Shenzhen Technology University College of Big Data and Internet Shenzhen518118 China

ISBN: (纸本)9798350330717

Vehicular edge computing (VEC) as a promising computing paradigm has accelerated the reformation of existing dominating computing infrastructures, enabling resource provisioning in close proximity to resource requestors. However, several challenges still exist, including efficient resource scheduling and management, dynamic wireless channel state, and limited bandwidth usage. To address these issues, we introduce the digital twin (DT) technology into VEC, enabling DTs of physical entities in VEC to achieve real-time offloading decision-making in the DT simulation cycle. In particular, we propose a DT-empowered VEC (DT-VEC) architecture, aiming to achieve efficient task offloading while considering extra latency incurred by task migration. We further put forward an efficient algorithm to minimize the response latency for all the tasks in the optimization period. The simulation results have proven that our approach outperforms the other two greedy approaches. © 2023 IEEE.

关键词： digital twin resource scheduling response latency task offloading Vehicular edge computing

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CEDR-API: Productive, Performant Programming of Domain-Specific Embedded systems

CEDR-API: Productive, Performant Programming of Domain-Speci...

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37th IEEE international parallel and distributed Processing Symposium (IPDPS)

作者： Mack, Joshua Gener, Serhan Hassan, Sahil Suluhan, H. Umut Akoglu, Ali Univ Arizona ECE Tucson AZ 85721 USA

ISBN: (纸本)9798350311990

As the computing landscape evolves, system designers continue to explore design methodologies that leverage increased levels of heterogeneity to push performance within limited size, weight, power, and cost budgets. One such methodology is to build Domain-Specific System on Chips (DSSoCs) that promise increased productivity through narrowed scope of their target application domain. In previous works, we have proposed CEDR, an open source, unified compilation and runtime framework for DSSoC architectures that allows applications, scheduling heuristics, and accelerators to be co-designed in a cohesive manner that maximizes system performance. In this work, we present changes to the application development workflow that enable a more productive and expressive API-based programming methodology. These changes allow for more rapid integration of new applications without sacrificing application performance. Towards the design of heterogeneous SoCs with rich set of accelerators, in this study we experimentally study the impact of increase in workload complexity and growth in the pool of compute resources on execution time of dynamically arriving workloads composed of real-life applications executed over architectures emulated on Xilinx ZCU102 MPSoC and Nvidia Jetson AGX Xavier. We expand CEDR into the application domain of autonomous vehicles, and we find that API-based CEDR achieves a runtime overhead reduction of 19.5% with respect to the original CEDR.

关键词： heterogeneous programming models runtime systems resource management

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Quantum/AI Topology-Aware Latency-Adaptive HPC Workflow scheduling Optimization 5

Quantum/AI Topology-Aware Latency-Adaptive HPC Workflow Sche...

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2024 international Conference on Quantum Computing and Engineering

作者： Caraveo, Braulio Shih, Liwen Suh, In-Saeng Humble, Travis Univ Houston Clear Lake Houston TX 77058 USA Oak Ridge Natl Lab NCCS Oak Ridge TN USA Oak Ridge Natl Lab DoE QSC & QCI Oak Ridge TN USA

ISBN: (纸本)9798331541378

The growing demand for more powerful high-performance computing (HPC) systems has led to a steady rise in energy consumption by supercomputing worldwide. This study is focused on comparing our Application-Topology Mapper (ATMapper) to the popular Simple Linux Utility for resource management (SLURM) for the purpose of exploring methods that can further optimize job-scheduling within HPC systems. ATMapper is an Artificial-Intelligence based approach to job-scheduling that is currently being enhanced with quantum annealing (QA) to generate optimal schedules faster. We are applying QA to speedup our AT Mapper process to achieve higher computing efficiency, thereby reducing HPC energy consumption. Here, we examine how four job-scheduling approaches perform in processor node assignment when using an example network architecture of 4 interconnected nodes. Using a specialized script, we are assessing the schedule of a computation flow with 11 interdependent tasks. The data movements among nodes were tracked to count for the number of interactions (network hops) between nodes needed to complete the tasks. The total number of hops and the job completion time were then used to quantify the efficiency of the different mapping approaches. In addition to SLURM, we also compare our ATMapper to the QA-enabled LBNL TIGER and the D-Wave distributed Computing processor assignment approaches. The preliminary results showed that our topology-aware, latency-adaptive ATMapper is significantly more efficient when compared to the other scheduling approaches due to its load-imbalance network allocation. The scheduler displayed a computing efficiency of 53% by performing significantly fewer network hops than its alternatives. By reducing the number of hops, ATMapper was able to perform all 11 tasks by using only 3 nodes out of given 4. This research indicates the potential to use QA/AI for HPC job-scheduling. Later, we will test a SLURM simulator program to draw further comparisons on the eff

关键词： quantum annealing (QA) latency-adaptive parallel SW/HW mapping application-specific topology-aware HPC scheduling HPC resource allocation optimization load imbalance

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A Runtime Manager Integrated Emulation Environment for Heterogeneous SoC Design with RISC-V Cores

A Runtime Manager Integrated Emulation Environment for Heter...

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1st international Conference on Smart Energy systems and Artificial Intelligence (SESAI)

作者： Suluhan, H. Umut Gener, Serhan Fusco, Alexander Mack, Joshua Dagli, Ismet Belviranli, Mehmet Edemen, Cagatay Akoglu, Ali Univ Arizona Elect & Comp Engn Dept Tucson AZ 85721 USA Colorado Sch Mines Comp Sci Dept Golden CO 80401 USA Ozyegin Univ Elect & Elect Engn Dept Istanbul Turkiye

ISBN: (纸本)9798350364613;9798350364606

RISC-NI based architectures have gained attention for deployment on platforms from SoC to HPC scale to meet the demands of a wide range of computational workloads that may require specialized hardware tailored to their specific performance goals. In previous works, we introduced CEDR, an opensource, unified compilation and runtime framework designed to facilitate productive hardware-agnostic application deployment on heterogeneous architectures, and lift the barriers to research on the design and evaluation of scheduling heuristics and accelerators for heterogeneous systems. In this study, we demonstrate the capability of CEDR in supporting heterogeneous systems composed of RISC-V cores and a pool of accelerators. We investigate the impact of employing customized lightweight RISC-V cores for managing accelerators individually. Such management approach, compared to centralized accelerator management model, scales down the stress on the runtime environment where compute resources are shared among multiple applications each with varying degrees of task-level parallelism. We perform evaluations on a heterogeneous SoC emulated on the Xilinx Virtex-7 FPGA based on execution of applications from radar, signal processing, and autonomous vehicles domains. We observe that releasing CPU-based compute cores from accelerator management through lightweight RISC-V cores results with up to 47% reduction in time spent on accelerator management. Since CPU-based compute cores exclusively become available for application task execution and contention on resource management is reduced, we observe speedup of up to 2.2x in application execution time based on experiments conducted with workloads consisting of dynamically arriving real-life application scenarios.

关键词： Terms Heterogeneous computing resource management runtime systems accelerators RISC -V

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