The proceedings contain 14 papers. The special focus in this conference is on Practical Aspects of Declarative Languages. The topics include: Distributed protocol combinators;creating domain-specific languages by comp...
ISBN:
(纸本)9783030059972
The proceedings contain 14 papers. The special focus in this conference is on Practical Aspects of Declarative Languages. The topics include: Distributed protocol combinators;creating domain-specific languages by composing syntactical constructs;proof-carrying plans;static partitioning of spreadsheets for parallel execution;automatic program rewriting in non-ground answer set programs;personalized course schedule planning using answer set programming;An ASP based approach to answering questions for natural language text;natural language generation from ontologies;improving residuation in declarative programs;Incremental evaluation of lattice-based aggregates in logicprogramming using modular TCLP;a combinatorial testing framework for intuitionistic propositional theorem provers;faster coroutine pipelines: A reconstruction.
The use of parallelism has increased drastically in recent years. Parallel platforms come in many forms: multi-core processors, embedded hybrid solutions such as multi-processor system-on-chip with reconfigurable logi...
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ISBN:
(纸本)9781450370998
The use of parallelism has increased drastically in recent years. Parallel platforms come in many forms: multi-core processors, embedded hybrid solutions such as multi-processor system-on-chip with reconfigurable logic, and cloud datacenters with multi-core and reconfigurable logic. These heterogeneous platforms can offer massive parallelism, but it can be difficult to exploit, particularly when combining solutions constructed with multiple architectures. To program a heterogeneous platform, a developer must master different programming languages, tools, and APIs to program each aspect of platform separately and then must find a means to connect them with communication interfaces. The motivation of this work is to provide a single programming model and framework for hardware-software stream programs on heterogeneous platforms. Our framework, StreamBlocks, starts with a dataflow programming model for both embedded and datacenter platforms. Dataflow programming is an alternative model of computation that captures both data and task parallelism. We describe a compiler infrastructure for CAL dataflow programs for hardware code generation. CAL is a dataflow programming language that can express multiple dataflow models of computation. StreamBlocks is based on the Tycho compiler infrastructure, which transforms each actor in a dataflow program to an abstract machine model, called Actor Machine. Actor Machines provides a unified model for executing actors in both hardware and software and permit our compiler extension and backend to generate efficient FPGA code. Unlike other systems, the programming model and compiler directly support hardware-software systems in which an FPGA functions as a coprocessor to a CPU. This permits easy integration with existing workflows.
We present Effpi: an experimental toolkit for strongly-typed concurrent and distributed programming in Dotty, with verification capabilities based on type-level model checking. Effpi addresses a main challenge in crea...
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ISBN:
(纸本)9781450368247
We present Effpi: an experimental toolkit for strongly-typed concurrent and distributed programming in Dotty, with verification capabilities based on type-level model checking. Effpi addresses a main challenge in creating and maintaining concurrent programs: errors like protocol violations, deadlocks, and livelocks are often spotted late, at run-time, when applications are tested or (worse) deployed. Effpi aims at finding them early, when code is written and compiled. Effpi provides: (1) a set of Dotty classes for describing communication protocols as types;(2) an embedded DSL for concurrent programming, with process-based and actor-based abstractions;(3) a Dotty compiler plugin to verify whether protocols and programs enjoy desirable properties, such as deadlock-freedom;and (4) an efficient run-time system for executing Effpi's DSL-based programs. The combination of (1) and (2) allows the Dotty compiler to check whether an Effpi program implements a desired protocol/-type;and this, together with (3), means that many typical concurrent programming errors are found and ruled out at compile-time. Further, (4) allows to run highly concurrent Effpi programs with millions of interacting processes/actors, by scheduling them on a limited number of CPU cores. In this paper, we give an overview of Effpi, illustrate its design and main features, and discuss its future.
The proceedings contain 26 papers. The special focus in this conference is on NASA Formal Methods. The topics include: Model checking of verilog RTL using IC3 with syntax-guided abstraction;towards a two-layer framewo...
ISBN:
(纸本)9783030206512
The proceedings contain 26 papers. The special focus in this conference is on NASA Formal Methods. The topics include: Model checking of verilog RTL using IC3 with syntax-guided abstraction;towards a two-layer framework for verifying autonomous vehicles;clausal proofs of mutilated chessboards;practical causal models for cyber-physical systems;extracting and optimizing formally verified code for systems programming;structured synthesis for probabilistic systems;design and runtime verification side-by-side in eTrice;data independence for software transactional memory;transaction protocol verification with labeled synchronization logic;MLv : A distributed real-time modal logic;Symbolic model checking of weighted PCTL using dependency graphs;Composing symmetry propagation and effective symmetry breaking for SAT solving;formal methods assisted training of safe reinforcement learning agents;Formalizing CNF SAT symmetry breaking in PVS;fly-by-logic: A tool for unmanned aircraft system fleet planning using temporal logic;a mixed real and floating-point solver;online parametric timed pattern matching with automata-based skipping;local reasoning for parameterized first order protocols;Generation of signals under temporal constraints for CPS testing;traffic management for urban air mobility;towards full proof automation in Frama-C using auto-active verification;using standard typing algorithms incrementally;using binary analysis frameworks: The case for bap and angr;automated backend selection for prob using deep learning.
We present a novel, unified approach to the development of compositional symbolic execution tools, which bridges the gap between traditional symbolic execution and compositional program reasoning based on separation l...
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ISBN:
(纸本)9781450364416
We present a novel, unified approach to the development of compositional symbolic execution tools, which bridges the gap between traditional symbolic execution and compositional program reasoning based on separation logic. We apply our approach to JavaScript, providing support for full verification, whole-program symbolic testing, and automatic compositional testing based on bi-abduction.
Implicit parameters allow programmers to omit certain arguments from function calls and have them automatically inferred by the compiler based on their types. At every call site, the compiler determines the values of ...
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ISBN:
(纸本)9781450364416
Implicit parameters allow programmers to omit certain arguments from function calls and have them automatically inferred by the compiler based on their types. At every call site, the compiler determines the values of the implicit parameters based on their declared types and the bindings currently in implicit scope. The programmer controls this mechanism in two ways: by adding bindings to the implicit scope, or by explicitly providing the implicit parameters for the function call. Implicit parameters are known from functional and object-oriented languages such as Haskell and Scala. In recent years, more languages have added support for implicit parameters, including Agda, Coq, and Idris. Implicit parameters have played an impressive role as the foundation for a broad range of language features such as type classes, capability and effect systems, software transactional memory, macros, and more. In this paper, we propose a design of implicit parameters for typed Horn clause based logicprogramming languages, such as Datalog and Prolog. We illustrate the usefulness of implicit parameters and show how they support logicprogramming in the large. We explore some of the differences that arise between implicit parameters in functional languages and in logic languages.
Failed computations are a frequent problem in software system development. Some failures have external reasons (e.g., missing files) that can be caught by exception handlers. Many other failures have internal reasons,...
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ISBN:
(纸本)9781450364416
Failed computations are a frequent problem in software system development. Some failures have external reasons (e.g., missing files) that can be caught by exception handlers. Many other failures have internal reasons, such as calling a partially defined operation with unintended arguments. In order to avoid the latter kind of failures, one can try to analyze the program at compile time for potential occurrences of these failures at run time. In this paper we present an approach to verify the absence of such failures in functional logic programs. Since programming with failures is a typical technique in logicprogramming, we are not interested to abandon partially defined operations at all. Instead, we want to verify conditions which ensure that operations can be executed without running into a failure. For this purpose, we propose to annotate operations with non-fail conditions that are verified at compile time with an SMT solver. For successfully verified programs, it is ensured that computations never fail provided that the non-fail condition of the main operation is satisfied.
Variable-to-fixed (VF) codes are often based on dictionaries that obey the prefix-free property;e.g., the Tunstall codes. However, correct VF codes need not be prefix free. Removing that constraint may offer the oppor...
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ISBN:
(纸本)9781538647813
Variable-to-fixed (VF) codes are often based on dictionaries that obey the prefix-free property;e.g., the Tunstall codes. However, correct VF codes need not be prefix free. Removing that constraint may offer the opportunity to build more efficient codes. Here, we come back to the almost instantaneous VF codes introduced by Yamamoto and Yokoo. They considered both single trees and multiple trees to perform the parsing of the source string. We show that, in some cases, their technique builds suboptimal codes. We propose correctives accordingly. We also propose a new, completely different technique based on dynamic programming that builds individually optimal dictionary trees.
The self-heating effect (SHE) is a growing problem for decananometer CMOS and beyond with substantial efforts dedicated to mitigation. Here, we present a new memory concept which instead requires SHE exacerbation. As ...
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ISBN:
(纸本)9781538648254
The self-heating effect (SHE) is a growing problem for decananometer CMOS and beyond with substantial efforts dedicated to mitigation. Here, we present a new memory concept which instead requires SHE exacerbation. As such, this memory concept is naturally suitable for extreme scaling. Preliminary result of this memory concept is demonstrated with an external heater as the SHE surrogates.
A novel concept of OTP has been demonstrated to create another feasibility to allow re-writable capability before storing the data. This OTP is named ReWritable One-time programming (RW-OTP) memory. With RW-OTP, users...
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ISBN:
(纸本)9781538648254
A novel concept of OTP has been demonstrated to create another feasibility to allow re-writable capability before storing the data. This OTP is named ReWritable One-time programming (RW-OTP) memory. With RW-OTP, users can do the test by modifying the contexts repeatedly before finalizing the stored data. To implement the memory cell, it consists of a gate-floated FinFET and an RRAM where a bilayer has been designed as a thicker dielectric layer with resistive-switching property on a thinner dielectric-fuse layer. Moreover, the process of RW-OTP is fully compatible with the state-of-the-art CMOS logic technology. The result shows that the memory cell exhibits high retention and good endurance. With proper use of RW-OTP, the users can not only reduce error jobs cost-efficiently but also can develop various applications for their needs. This memory cell is very promising for embedded applications.
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