Recent impressive growth of AI applications in the most diversified heterogeneous domains is largely motivated by the availability of hardware accelerators used from the backstage of data centers (such as TPU, Tensor ...
详细信息
ISBN:
(纸本)9781538674628
Recent impressive growth of AI applications in the most diversified heterogeneous domains is largely motivated by the availability of hardware accelerators used from the backstage of data centers (such as TPU, Tensor processing Units, or VPUs, Visual processing Units) to the far edge of embedded devices equipped with DPUs and Deep Learning processing Units. High level toolchains for a more friendly usability of these platform had similar relevance in the process. In this paper we considered edge devices that provide an essential contribution for the deployment of "distributed intelligence" and are used typically at the gateway, CPE or Edge computing level. One of the typical assumptions is that Field Programmable Gate Array (FPGA) are far more expensive - with respect to power consumption - than legacy SBCs (single board computers). The main contribution of the paper is a fair comparison (at the same clock frequency and with the same main CPU) of processing time and power consumption of two different boards used for deep neuralnetwork classification. We will highlight the relevance of classification speed with respect to common KPIs adopted to compare the performances of automatic classification such as Loss, Precision, Recall, etc. This will be particularly relevant in the challenging domains of hardware accelerated real time control loops to provide distributed intelligence at the application level but also at the inner functions of emerging networking architectures.
Graph neuralnetworks (GNNs) train neuralnetworks that combine the topological properties of a graph with the vertex and edge features to perform tasks such as node classification and link prediction. We propose a no...
详细信息
ISBN:
(纸本)9798350302080
Graph neuralnetworks (GNNs) train neuralnetworks that combine the topological properties of a graph with the vertex and edge features to perform tasks such as node classification and link prediction. We propose a novel middleware that approaches GNN training from the perspective of a vertex-centric model (VCM) of distributed graph processing and overlays neuralnetwork training over it. Giraph Graph neuralnetwork (G2N2) uses a three-phase execution pattern by construction a distributed computation graph per mini-batch, and maps the forward and backward passes of the GNN training to VCM. We implement a prototype of G2N2 in Apache Giraph and report results from a preliminary evaluation using two real-world graphs on a commodity cluster.
Development of power electronic devices and their implementation in power distribution networks significantly improves not only the easier integration of distributed generation into distribution networks but also the ...
详细信息
Development of power electronic devices and their implementation in power distribution networks significantly improves not only the easier integration of distributed generation into distribution networks but also the further refinement of control algorithms specialized in the application of power management procedures in distribution *** of DC Soft Open Points(DCSOP)for closing loops in distribution networks could serve as one of the most representative examples of the use of power electronic devices as management resources in modern distribution *** paper describes the possibilities of the application of DCSOP used for loops closure and power flow control in medium voltage distribution networks with integrated distributed *** all the benefits of loops closure and the controllability of the DCSOP,it is considered as a management resource capable of achieving the desired/optimal state in the distribution *** management strategy proposed in this paper covers two cases:the first case is where an adequate communication infrastructure is available when all DCSOP operations are based on Optimal Power Flow(OPF)calculations,and the second case is when OPF results are unavailable for some reason(most often due to communication interruptions)and DCSOP operations are based on processing available data using a neuralnetwork-based *** proposed management strategy has been implemented and tested on an IEEE 33 distribution test network with integrated distributed *** simulation results,described in this paper,can serve not only as a basis for further scientific research but also as a basis for the practical implementation of real controllers based on the proposed algorithm and its application in practice,and in real distribution networks.
Manufacturing-viable neuromorphic chips require novel compute architectures to achieve the massively parallel and efficient information processing the brain supports so effortlessly. The most promising architectures f...
详细信息
Manufacturing-viable neuromorphic chips require novel compute architectures to achieve the massively parallel and efficient information processing the brain supports so effortlessly. The most promising architectures for that are spiking/event-based, which enables massive parallelism at low complexity. However, the large memory requirements for synaptic connectivity are a showstopper for the execution of modern convolutional neuralnetworks (CNNs) on massively parallel, event-based architectures. The present work overcomes this roadblock by contributing a lightweight hardware scheme to compress the synaptic memory requirements by several thousand times-enabling the execution of complex CNNs on a single chip of small form factor. A silicon implementation in a 12-nm technology shows that the technique achieves a total memory-footprint reduction of up to 374x compared to the best previously published technique at a negligible area overhead.
This study is focused on addressing the dynamic event-triggered distributed state and unknown parameter estimation problem for discrete-time nonlinear systems that have known linear dynamics and unknown nonlinearities...
详细信息
This study is focused on addressing the dynamic event-triggered distributed state and unknown parameter estimation problem for discrete-time nonlinear systems that have known linear dynamics and unknown nonlinearities and are subject to deception attacks. A neural-network-based unified estimation framework is introduced to estimate the unknown nonlinear function in conjunction with the system state and unknown parameters. Each sensor uses its own measurements and data from the neighboring sensors to calculate the overall estimates. The information-sharing network is assumed to be vulnerable to deception attacks, which are modeled using a Bernoulli distributed random variable. Additionally, a dynamic event-triggered strategy is adopted to alleviate resource consumption. Based on Lyapunov theory, the stability of the unified estimation framework is proven in terms of the uniformly ultimately bounded error. Moreover, the design conditions for the estimator are presented in the form of matrix inequalities. Finally, a simulation example is presented to demonstrate the effectiveness of the proposed framework.
distributed inference enables multiple distributed computing devices to cooperatively perform statistical inference or data analysis tasks in order to reduce the inference delay. Due to the device heterogeneity in ter...
详细信息
ISBN:
(纸本)9798350354720;9798350354713
distributed inference enables multiple distributed computing devices to cooperatively perform statistical inference or data analysis tasks in order to reduce the inference delay. Due to the device heterogeneity in terms of processing capacities, some devices may experience slower processing speeds or even fail to compute the inference task. This leads to a larger inference delay or sometimes inference task failure. In this work, we propose a novel learning-based coded inference framework for convolutional neuralnetworks (CNNs) by introducing redundant computing devices. By using an encoder to determine the inference inputs of redundant devices and an decoder to reconstruct the convolutional segment result of the CNNs, we show that our framework can significantly enhance the resilience and efficiency of distributed inference systems. By deploying a robust encoding-decoding scheme, our framework dynamically compensates for devices with sub-optimal performance or computational failures. This ensures the overall system to maintain high levels of accuracy and reduce inference latency, even in heterogeneous device environments. Our evaluation results reveal the profound impact of our proposed framework on enhancing distributed inference tasks for CNNs. Based on the experiments conducted on image classification across various realistic datasets, we have demonstrated that our framework maintains high accuracy levels, even in scenarios where some distributed devices encounter failures, validating the robustness of our proposed approach.
Industrial Internet of Things (IIoT) presents a range of benefits but also introduces security vulnerabilities. This paper systematically compares different deep learning model structures for IIoT intrusion detection....
详细信息
Industrial Internet of Things (IIoT) presents a range of benefits but also introduces security vulnerabilities. This paper systematically compares different deep learning model structures for IIoT intrusion detection. Four Convolutional neuralnetwork (CNN) classifiers are implemented, including hybrid CNN-GRU, 1D Xception, and 1D Resnet models. The evaluation focuses on robustness and generalizability across two datasets to assess overall performance and detection rates. To handle imbalanced data, preprocessing involves PCA feature selection and hybrid resampling techniques. Furthermore, we design a distributed training process for massive datasets and continuous learning, enabling efficient large-scale processing. For the experimental evaluation, we make use of two datasets with multi-label classification tasks and analyze performance metrics of different models in terms of their detection abilities and efficiency. The proposed methods demonstrate strong performance, successfully identifying even rare attacks. In addition, we conduct a performance comparison with existing publications that utilize the same datasets, confirming that our models are on par with state-of-the-art IIoT models.
Hydrostatic pressure measurement is essential in many industries, such as oil and gas production, chemical processing, and environmental monitoring. Due to the minimal impact of small hydrostatic pressure on ordinary ...
详细信息
The electrical system's dependability, security, and efficiency are all improved through smart grid technologies. Its dependence on digital communication technology, on the other hand, introduces new risks and vul...
详细信息
Deep Learning (DL) has proved effective in a variety of application domains. However, the computational and memory demand posed by deep neural models limits the spread of DL on resource-constrained devices such as mic...
详细信息
Deep Learning (DL) has proved effective in a variety of application domains. However, the computational and memory demand posed by deep neural models limits the spread of DL on resource-constrained devices such as microcontrollers. An opportunity to tailor DL models to specific hardware constraints is given by neural Architecture Search (NAS), which automatically traverses a large search space, seeking for optimal architectures both in terms of hardware and performance, based on user specifications. State of the art open-source NAS tools for microcontrollers only support 2D Convolutional neuralnetwork (CNN) and Multi Layer Perceptron (MLP), but do not consider 1D convolution, which is key for time series analysis and signal processing. This study focuses on enhancing the state-of-the-art mu NAS framework, by adding support for 1D CNN. Preliminary tests on a dummy dataset consisting of simple gaussian-distributed waveforms, demonstrate the system ability to find appropriate architectures to satisfy the specified constraints.
暂无评论