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检索条件"任意字段=PDSE 2000: International Symposium on Software Engineering for Parallel and Distributed Systems"

共 944 条记录，以下是51-60 订阅

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SPIDER: An Effective, Efficient and Robust Load Scheduler for Real-time Split Frame Rendering

SPIDER: An Effective, Efficient and Robust Load Scheduler fo...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Bingzheng Ma Ziqiang Zhang Yusen Li Wentong Cai Gang Wang Xiaoguang Liu School of Computer Science Nankai University Tianjin China School of Computer Science and Engineering Nanyang Technological University Singapore

Interactive graphics applications are generally latency-critical, while using multiple GPUs to accelerate such applications becomes possible recently with support from both hardware and software. Split frame rendering (SFR) is a popular approach for multi-GPU rendering, which splits a frame into disjoint regions and assigns the regions to different GPUs. Load scheduling of SFR is a crucial but challenging issue for achieving maximum rendering performance in real-time rendering, which is not well addressed by the existing solutions. In this paper, we propose SPIDER, a load scheduler which leverages fuzzy PID (proportional integral derivative) controller to schedule the rendering workload among GPUs. SPIDER has several distinguished properties: it is a feedback based mechanism which does not need a full knowledge of the dynamic system; it is very computationally efficient and easy to implement; it is highly robust to dynamic workload changes. Extensive experiments are conducted to evaluate SPIDER and the results show that SPIDER always achieves near-optimal performance for various workload patterns, which outperforms the state-of-the-art baselines signif-icantly.

关键词： Graphics Schedules distributed processing Rendering (computer graphics) Real-time systems software Hardware

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Feedback from a data center for education at CentraleSupélec engineering school

Feedback from a data center for education at CentraleSupéle...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Jé ré my Fix Stephane Vialle Ré mi Hellequin Claudine Mercier Patrick Mercier Jean-Baptiste Tavernier LORIA CNRS Universit&#x00E9 de Lorraine CentraleSup&#x00E9 lec Gif-sur-Yvette France LISN CNRS Universit&#x00E9 Paris-Saclay CentraleSup&#x00E9 Information systems department CentraleSup&#x00E9

ISBN: (数字)9781665497473

ISBN: (纸本)9781665497480

This paper describes the hardware and software architecture of the Data Center for Education (DCE) built up at CentraleSupélec as well as our educational objectives. Students experiment in the context of their studies with clusters of CPU and servers of GPU. They have different technical backgrounds from beginners to experts in computer science. The lectures have also different experimental requirements: from single host long running jobs for machine learning to multiple hosts short running HPC algorithms benchmarks, with lab works and projects that need to share the same pool of machines.

关键词： Data centers distributed processing Machine learning algorithms software architecture Education Graphics processing units Machine learning

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Development of parallel CFD Applications on distributed Memory with Chapel 34

Development of Parallel CFD Applications on Distributed Memo...

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34th IEEE international parallel and distributed Processing symposium (IPDPS)

作者： Parenteau, Matthieu Bourgault-Cote, Simon Plante, Frederic Laurendeau, Eric Polytech Montreal Dept Mech Engn Montreal PQ Canada

ISBN: (纸本)9781728174457

Traditionally, Computational Fluid Dynamics (CFD) software uses Message Passing Interface (MPI) to handle the parallelism over distributed memory systems. For a new developer, such as a student or a new employee, the barrier of entry can be high and more training is required for each particular software package, which slows down the research process on actual science. The Chapel programming language offers an interesting alternative for research and development of CFD applications. In this paper, the developments of two CFD applications are presented: the first one as an experiment by re-writing a 2D structured flow solver and the second one as writing from scratch a research 3D unstructured multi-physics simulation software. Details are given on both applications with emphasis on the Chapel features which were used positively in the code design, in particular to improve flexibility and extend to distributed memory. Some performance pitfalls are discussed with solutions to avoid them. The performance of the unstructured software is then studied and compared to a traditional open-source CFD software package programmed in C++ with MPI for communication (SU2). The results show that our Chapel implementation achieves performances similar to other CFD software written in C and C++, thus confirming that Chapel is a viable language for high-performance CFD applications.

关键词： CFD RANS Chapel distributed memory HPC

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IGOR: Accelerating Byzantine Fault Tolerance for Real-Time systems with Eager Execution 27

IGOR: Accelerating Byzantine Fault Tolerance for Real-Time S...

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30th IEEE international symposium on software Reliability engineering (ISSRE)

作者： Loveless, Andrew Dreslinski, Ronald Kasikci, Baris Linh Thi Xuan Phan Univ Michigan Ann Arbor MI 48109 USA Univ Penn Philadelphia PA 19104 USA NASA Johnson Space Ctr Houston TX 77058 USA

ISBN: (纸本)9781665403863

Critical real-time systems like spacecraft and aircraft commonly use Byzantine fault-tolerant (BFT) state machine replication (SMR) to mask faulty processors and sensors. Unfortunately, existing BFT SMR techniques require replicas to reach agreement on redundant sensor data and perform source selection before executing, which adds unavoidable latency to every execution and inevitably decreases control performance. The standard way to reduce the latency of BFT SMR in non-real-time systems is to use speculation, forgoing agreement on inputs altogether, and repeating executions when faults occur. However, this approach is not suitable for real-time systems, since its worst-case latency when faults occur can be even higher than that of non-speculative systems. This paper presents IGOR, a new speculative BFT SMR approach that leverages multi-core processors to avoid the added latency inherent to traditional BFT SMR techniques in both the absence and presence of faults. The key idea of IGOR is to eagerly execute on data from redundant sensors in parallel. While these executions are underway, the replicas reach agreement on which execution will determine the system's final state. As a result, IGOR's latency is reduced to the time taken by the executions or by the agreement process, whichever is longer. Our evaluation shows that IGOR reduces latency by up to 1.75x and improves schedulability by 1.88-3.22x compared to the state of the art. We also show that when used to execute spacecraft guidance, navigation, and control software during a dynamic mission phase, IGOR noticeably increases vehicle stability.

关键词： Byzantine fault tolerance state machine replication speculative execution multi-core real-time systems distributed systems

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EDAML 2022 Invited Speaker 8: Machine Learning for Cross-Layer Reliability and Security

EDAML 2022 Invited Speaker 8: Machine Learning for Cross-Lay...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Muhammad Shafique New York University (NYU) Abu Dhabi UAE

ISBN: (数字)9781665497473

ISBN: (纸本)9781665497480

In the deep nano-scale regime, reliability has emerged as one of the major design issues for high-density integrated systems. Among others, key reliability-related issues are soft errors, high temperature, and aging effects (e.g., NBTI-Negative Bias Temperature Instability), which jeopardize the correct applications' execution. Tremendous amount of research effort has been invested at individual system layers. Moreover, in the era of growing cyber-security threats, modern computing systems experience a wide range of security threats at different layers of the software and hardware stacks. However, considering the escalating reliability and security costs, designing a highly reliable and secure system would require engaging multiple system layers (i.e. both hardware and software) to achieve cost-effective robustness. This talk provides an overview of important reliability issues, prominent state-of-the-art techniques, and various hardwaresoftware collaborative reliability modeling and optimization techniques developed at our lab, with a focus on the recent works on ML-based reliability techniques. Afterwards, this talk will also discuss how advanced ML techniques can be leveraged to devise new types of hardware security attacks, for instance on logic locked circuits. Towards the end of the talk, I will also give a quick pitch on the reliability and security challenges for the embedded machine learning (ML) on resource/energy-constrained devices subjected to unpredictable and harsh scenarios.

关键词： Reliability software reliability Security Research and development Reliability engineering software Integrated circuit reliability

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Operating System Convergence: An Example via the Maru OS Project

Operating System Convergence: An Example via the Maru OS Pro...

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IEEE international symposium on parallel and distributed Processing Workshops and Phd Forum (IPDPSW)

作者： William White Xiao Qin Core Kernel / RTS Team Red Hat US Auburn University AL Department of Computer Science and Software Engineering Auburn University AL

ISBN: (数字)9781665497473

ISBN: (纸本)9781665497480

Converging multiple form-factors and devices into one cohesive system is not necessarily a new idea; however, there has been a growing interest in achieving the design goal of convergence in recent years. This growing interest is due partly to a desire to maintain only one operating system. Some implementations also include the ability to run both in desktop mode and mobile mode simultaneously. These mobile systems attach to a lapdock or monitor via one or more cables to activate the desktop mode. These converged systems have mobile hardware constraints; however, current system on chip (SOC) improvements may make running these systems much more realistic. Several techniques are available to achieve convergence. This paper attempts to outline these design principles while also presenting an example architecture for using virtualization techniques to achieve operating system convergence. Additionally, this paper proposes a solution to attach the mobile device to the lapdock wirelessly using Bluetooth and Miracast, The virtualization techniques used to achieve this convergence can apply to various form-factors, application ecosystems, and computational platforms.

关键词： Computers Operating systems Ecosystems systems architecture Mobile handsets System-on-chip Virtualization

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HRaft: Adaptive Erasure Coded Data Maintenance for Consensus in distributed Networks

HRaft: Adaptive Erasure Coded Data Maintenance for Consensus...

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international symposium on parallel and distributed Processing (IPDPS)

作者： Yulei Jia Guangping Xu Chi Wan Sung Salwa Mostafa Yulei Wu School of Computer Science and Engineering Tianjin University of Technology Tianjin China Tianjin Key Laboratory of Intelligence Computing and Novel Software Technology Tianjin China Department of Electrical Engineering City University of Hong Kong Hong Kong SAR China College of Engineering Mathematics and Physical Sciences University of Exeter Exeter UK

distributed data services usually rely on consensus protocols like Paxos and Raft to provide fault-tolerance and data consistency across global and local-distributed data centers. Erasure coding replication has appealing storage and network cost saving compared with full copy replication, which helps consensus protocols achieve low latency, high fault tolerance, and high throughput for data access. Applying erasure coding in consensus protocols directly will degrade the liveness level when the number of failure servers reaches a certain level. To address the challenge, CRaft just stores full copy replication instead of erasure coding replication when the number of failed servers reaches a certain threshold. In such situation, CRaft will be downgraded sharply to the same storage and network costs as Raft. To overcome the shortcoming of CRaft, we propose a protocol, called HRaft, which can adapt the placement of data blocks in order to always have enough blocks to recover the stored value when servers fail. By replenishing some coded blocks in healthy servers instead of full copy replication, it can avoid switching to the full replication when a certain threshold on the number of failures is reached. We designed and implemented a key-value (KV) storage prototype to validate the proposed protocol and evaluate its performance. The experimental results show HRaft can significantly reduce storage and network costs and improve write performance while keeping the liveness level compared to CRaft.

关键词： Fault tolerance Costs System performance Fault tolerant systems distributed databases Switches Throughput

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The AMPERE Project: A Model-driven development framework for highly parallel and EneRgy-Efficient computation supporting multi-criteria optimization 23

The AMPERE Project: A Model-driven development framework for...

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IEEE 23rd international symposium on Real-Time distributed Computing (ISORC)

作者： Quinones, Eduardo Royuela, Sara Scordino, Claudio Gai, Paolo Pinho, Luis Miguel Nogueira, Luis Rollo, Jan Cucinotta, Tommaso Biondi, Alessandro Hamann, Arne Ziegenbein, Dirk Saoud, Hadi Soulat, Romain Forsberg, Bjoern Benini, Luca Mando, Gianluca Rucher, Luigi Barcelona Supercomp Ctr Barcelona Spain Evidence Srl Pisa Italy Inst Super Engn Porto Porto Portugal Sysgo Prague Czech Republic Scuola Super Sant Anna Pisa Italy Bosch Stuttgart Germany Thales Res & Technol Palaiseau France Swiss Fed Inst Technol Zurich Switzerland Thales Italy Florence Italy

ISBN: (纸本)9781728169583

The high-performance requirements needed to implement the most advanced functionalities of current and future Cyber-Physical systems (CPSs) are challenging the development processes of CPSs. On one side, CPSs rely on model-driven engineering (MDE) to satisfy the non-functional constraints and to ensure a smooth and safe integration of new features. On the other side, the use of complex parallel and heterogeneous embedded processor architectures becomes mandatory to cope with the performance requirements. In this regard, parallel programming models, such as OpenMP or CUDA, are a fundamental brick to fully exploit the performance capabilities of these architectures. However, parallel programming models are not compatible with current MDE approaches, creating a gap between the MDE used to develop CPSs and the parallel programming models supported by novel and future embedded platforms. The AMPERE project will bridge this gap by implementing a novel software architecture for the development of advanced CPSs. To do so, the proposed software architecture will be capable of capturing the definition of the components and communications described in the MDE framework, together with the non-functional properties, and transform it into key parallel constructs present in current parallel models, which may require extensions. These features will allow for making an efficient use of underlying parallel and heterogeneous architectures, while ensuring compliance with non-functional requirements, including those on real-time performance of the system.

关键词： parallel programming models parallel and heterogeneous embedded processor architectures model-driven approaches safety-critical embedded systems

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A Role-Based Architecture for Self-Adaptive Cyber-Physical systems 15

A Role-Based Architecture for Self-Adaptive Cyber-Physical S...

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IEEE/ACM 15th international symposium on software engineering for Adaptive and Self-Managing systems (SEAMS)

作者： Kluge, Tim Tech Univ Dresden Software Technol Grp Dresden Germany

ISBN: (纸本)9781450379625

Today's computing world features a growing number of cyber-physical systems that require the cooperation of many physical devices. Examples include autonomous cars and co-working robots, which are expected to appropriately adapt to any possible context they find themselves in (e.g. the presence of a nearby human). However, the controlling software continues to be developed using established object-oriented modelling techniques like UML, which do not natively possess a notion of context and thus may introduce accidental complexity. With increasing complexity, the probability of the introduction of software errors rises, which can have fatal consequences in cyber-physical systems. To address this, we envision a model-driven architecture for self-adaptive cyberphysical systems that explicitly models structured context. Entities are modelled as message-passing parallel processes and can play roles in specific contexts, which dynamically alter their behaviour and relationships with other parts of the system. Since the planning of complex adaptations can be cumbersome in real-world scenarios, we envision an intuitive formulation of adaptations as graph rewriting rules on the context model. This paper discusses the current state of research and identifies open research challenges. Based on this, the envisioned architecture as well as an evaluation strategy are presented.

关键词： self-adaptive systems context-sensitivity roles distributed systems decentralized systems graph rewriting

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Towards HPC I/O Performance Prediction Through Large-scale Log Analysis 20

Towards HPC I/O Performance Prediction Through Large-scale L...

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29th international Conference on High-Performance parallel and distributed Computing (HPDC)

作者： Kim, Sunggon Sim, Alex Wu, Kesheng Byna, Suren Son, Yongseok Eom, Hyeonsang Seoul Natl Univ Seoul South Korea Lawrence Berkeley Natl Lab Berkeley CA USA Chung Ang Univ Seoul South Korea

ISBN: (纸本)9781450370523

Large-scale high performance computing (HPC) systems typically consist of many thousands of CPUs and storage units, while used by hundreds to thousands of users at the same time. Applications from these large numbers of users have diverse characteristics, such as varying compute, communication, memory, and I/O intensiveness. A good understanding of the performance characteristics of each user application is important for job scheduling and resource provisioning. Among these performance characteristics, the I/O performance is difficult to predict because the I/O system software is complex, the I/O system is shared among all users, and the I/O operations also heavily rely on networking systems. To improve the prediction of the I/O performance on HPC systems, we propose to integrate information from a number of different system logs and develop a regression-based approach that dynamically selects the most relevant features from the most recent log entries, and automatically select the best regression algorithm for the prediction task. Evaluation results show that our proposed scheme can predict the I/O performance with up to 84% prediction accuracy in the case of the I/O-intensive applications using the logs from CORI supercomputer at NERSC.

关键词： High Performance Computing distributed File System I/O Performance Prediction Log Analysis

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