Software Architecture (SA) is emerging as an important research area in software engineering and forms the backbone for building successful software-intensive systems. Based on practical requirements, especially the r...
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The two most recent PVSS (publicly verifiable secret sharing) schemes are illustrated to be vulnerable to a simple attack. Moreover, one of them has to deteriorate its efficiency greatly to meet practical security req...
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A reconfigurable mesh consists of a mesh-connected topology augmented by a dynamically reconfigurable bus system. Efficient utilization of processing resources in a large, multi-user parallel system depends on the rel...
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A reconfigurable mesh consists of a mesh-connected topology augmented by a dynamically reconfigurable bus system. Efficient utilization of processing resources in a large, multi-user parallel system depends on the reliable processor management scheme. This paper presents a dynamic and reliable processor allocation strategy to increase the performance of mesh-connected parallel systems with faulty processors. The idea is to reconfigure a faulty mesh system into a maximum convex system using the fault-free boundary nodes to compensate for the non-boundary faulty nodes. To utilize the non-rectangular shaped system parts, our strategy tries to allocate L-shaped submeshes instead of signaling the allocation failure. Extensive simulations show that the strategy performs more efficiently than other strategies in terms of the completion time, the job response time and the system utilization.
The oil and gas industries have been great consumers of parallel and distributed computing systems, by frequently running technical applications with intensive processing of terabytes of data. By the emergence of clou...
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High-speed, large-scale networks present new challenges to an intrusion detection system. These challenges include: the volume of data that must be analyzed, the high-speed data stream that IDS must deal with. To adap...
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ISBN:
(纸本)0769524052
High-speed, large-scale networks present new challenges to an intrusion detection system. These challenges include: the volume of data that must be analyzed, the high-speed data stream that IDS must deal with. To adapt these new demands, this paper propose a novel architecture for Large-scale distributed Intrusion Detection Systems(LDIDS) that can be applied to large-scale networks. This architecture is based on hierarchy, which consists of a root node, several branch nodes and leaf nodes. In this architecture, each node is an independent IDS, all IDSs constituting the whole LDIDS. The main advantage of this architecture is scalability and collaboration. We describe the framework of the nodes in detail. We also present an implementation of LDIDS which is designed according to the architecture.
Designing a Java processor supporting horizontal multithreading has been becoming more attractive as network computing gains importance. Different from the traditional superscalar processors that issue multiple instru...
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ISBN:
(纸本)0780378407
Designing a Java processor supporting horizontal multithreading has been becoming more attractive as network computing gains importance. Different from the traditional superscalar processors that issue multiple instructions from a single instruction stream to exploit the instruction level parallelism (ILP), the horizontal multithreading Java processors issue multiple instructions (bytecodes) from multiple threads in parallel to exploit not only the ILP but the thread level parallelism (TLP). Such processors have multiple dispatch slots and require the instruction fetch unit to supply instructions with much higher bandwidth than superscalar processors. Using a traditional superscalar cache architecture in a horizontal multithreading Java processor results in high cache miss ratio caused by the interference among the threads. This paper investigates multibank instruction cache architecture for horizontal multithreading Java processor to meet the requirements of the high instruction fetch bandwidth. In order to evaluate the cache performance as well as the horizontal multithreading Java processor performance, we developed a trace driven simulator. The simulator consists of a trace generator that generates the Java bytecode execution traces and an architectural simulator that reads the traces and evaluates,the performance of the instruction cache and the overall performance of the Java processor. Our simulation results show that the performance improvements are obtained by the low cache miss ratio and the high instruction fetch bandwidth of the proposed cache architecture. The IPC performance is about 19 when both the number of slots and the number of banks are 8, about 5 times better than one bank cache.
How to share the data in databases of autonomous organizations quickly and flexibly is an important problem. Traditional data integration systems are supposed to be a solution to the problem. Unfortunately, they requi...
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ISBN:
(纸本)9780769534435
How to share the data in databases of autonomous organizations quickly and flexibly is an important problem. Traditional data integration systems are supposed to be a solution to the problem. Unfortunately, they require a global schema before they can be used to share data and they are centralized system. They can not support data sharing without a common schema and on-demand data sharing in applications. In addition, security is also the important requirements. This paper presents a community-based system for distributed data integration and sharing, Honeycomb. Honeycomb supports many virtual data integration and sharing systems on a single machine, and the system utilizes Web Services to access data on other nodes to avoid changing security configuration of autonomous organizations. In addition, the system adopts new cache techniques to improve performance greatly.
This paper analyze the parallelcomputing environment overhead of OpenMP for loop with multi-core processors including the case of data-race. The different solutions of data-race are discussed in present paper, such a...
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Advancement in parallel computers technology has greatly influenced the numerical methods used for solving partial differential equations (pdes). A lot of attention has been devoted to the development of numerical sch...
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ISBN:
(纸本)9780769534435
Advancement in parallel computers technology has greatly influenced the numerical methods used for solving partial differential equations (pdes). A lot of attention has been devoted to the development of numerical schemes which are suitable for the parallel environment. In this work, we investigate the parallel implementation of the four-point Modified Explicit Decoupled Group (MEDG) method which was introduced by Ali and Ng (2007) as a fast solver for the two dimensional Poisson pde. The method was shown to be more superior than all the methods belonging to the four-points explicit group family namely the Explicit Group (EG) [8], Explicit Decoupled Group (EDG) [1] and Modified Explicit Group (MEG) [7]. This paper presents the preliminary results of the parallel algorithms implemented on a distributed memory PC cluster. Two parallelizing strategies comprising of the two-color zebra and the four-color chessboard orderings in solving a two dimensional Poisson model problem will be discussed.
Grid and service computingtechnologies have been explored by enterprises to promote integration, sharing, and collaboration. However, quick response to busincss environment changes is still a challenging issue. For e...
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ISBN:
(纸本)0769524052
Grid and service computingtechnologies have been explored by enterprises to promote integration, sharing, and collaboration. However, quick response to busincss environment changes is still a challenging issue. For end users, developing, customizing, and re-engineenng applications remain a difficult and time-consuming g task. Users still need to deal with excessive low-level details of platform-specific APIs. We present a high-level programming model together with a descriptive glueing language called GSML, to facilitate end-user programming. In this approach, applications could be visually composed from well-defined software components called 'funnels" in an event-driven fashion. Application examples have shown that, by raising the level of abstraction as well as simplifying the programming model, GSML could empower end users to build grid applications on demand with improved productivity.
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