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Conference on image and Signal processing for Remote Sensing X

作者： Lu, LJ Liao, MS Zhang, L Wang, Y Lin, H Wuhan Univ State Key Lab Informat Engn Surveying Mapping & R Wuhan 430079 Hubei Peoples R China

ISBN: (纸本)0819455202

Registration of two or more images of the same scene is an important procedure in InSAR image processing that seeks to extract differential phase information exactly between two images. Meanwhile, the efficiency for large volume data processing is also a key point in the operational InSAR data processing chain. In this paper, some conventional registration methods are analyzed in detail and the parallel algorithm for registration is investigated. Combining parallel computing model with the intrinsic properties of InSAR data, the authors puts forward an image parallel registration scheme over distributed cluster of PCs. The preliminary experiment will be implemented and the result demonstrates feasibility and effectiveness of the proposed scheme.

关键词： parallel processing parallel computing InSAR image registration image matching

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Flexible architecture for the implementation of the two-dimensional discrete wavelet transform (2D-DWT) oriented to FPGA devices

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MICROPROCESSORS AND MICROSYSTEMS 2004年第9期28卷 509-518页

作者： Colom-Palero, RJ Gadea-Girones, R Ballester-Merelo, FJ Martínez-Peiro, M Univ Politecn Valencia Dept Elect Engn Digital Syst Design Res Team Valencia 46022 Spain

This paper presents a flexible filter and control unit structure for implementing different VLSI architectures on two-dimensional DWT. These structures are applied over three different architectures: a direct approach, Recursive Pyramidal Algorithm (RPA) architecture, and a new proposed modification of RPA. This modified architecture works in a non-separable fashion using a parallel filter structure with distributed control to compute all the DWT resolution levels. It is fully modular and scalable, with low latency and high throughput performance. Implementation results based on a Virtex-ii FPGA device are included. Real-time video processing is achieved. (C) 2004 Elsevier B.V. All rights reserved.

关键词： image processing programmable logic device signal processing VLSI design

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How pseudo model may help evaluate image compression on spiral architecture

How pseudo model may help evaluate image compression on spir...

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International Conference on parallel and distributed processing Techniques and Applications

作者： Wang, HQ Hintz, T He, XJ Wu, Q Univ Technol Sydney Fac Informat Technol Dept Comp Syst Sydney NSW 2007 Australia

ISBN: (纸本)1932415262

Although Spiral Architecture (SA) has many advantages in image processing and machine vision, there is no available image capture device yet to support this structure. Hence, in order to implement our theoretical results, it is necessary to construct the SA from the existing image structure, on which the traditional image representation is based. Therefore, in this paper we provide two methods, Mimic model and Pseudo model. We can construct the architecture from the rectangular pixels and thus they share the Spiral addressing mechanism. This paper then presents how Pseudo model may help to evaluate the performance of image compression on Spiral Architecture. Based on the two unique properties of Spiral Architecture, i.e. locality of light intensity and uniformity of image partitioning, possible approaches to image compression may be discovered. Our future work would focus on partitioning the image into blocks and implement compression on the transform domain.

关键词： spiral architecture image compression pseudo model

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The optimization of distributed processing for arbitrary view generation in camera sensor networks

The optimization of distributed processing for arbitrary vie...

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作者： Panahpour Tehrani, Mehrdad Na Bangchang, Purim Fujii, Toshiaki Tanimoto, Masayuki Department of Information Electronic Graduate School of Engineering Nagoya University Nagoya-shi 464-8603 Japan

The Camera sensor network is a new advent of technology in which each sensor node can capture video signal, process and communicate with other nodes. We have investigated a dense node configuration. The requested processing task in this network is arbitrary view generation among nodes view. To avoid unnecessary communication between nodes in this network and to speed up the processing lime, we propose a distributed processing architecture where the number of nodes sharing image data are optimized. Therefore, each sensor node processes part of the interpolation algorithm with local communication between sensor nodes. Two processing methods are used based on the image size shared. These two methods are F-DP (Fully image shared distributed processing) and P-DP (Partially image shared distributed processing). In this research, the network processing time has been theoretically analyzed for one user. The theoretical results are compatible with the experimental results. In addition, the performance of proposed DP methods were compared with Centralized processing (CP). As a result, the best processing method for optimum number of nodes can be chosen based on (i) communication delay of the network, (ii) whether the network has one or more channels for communication among nodes and (iii) the processing ability of nodes.

关键词： Telecommunication networks

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Application partitionability in computational grids

Application partitionability in computational grids

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Proceedings - 18th International parallel and distributed processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)

作者： Peng, Liang See, Simon Asia Pac. Sci. and Technology Center Nanyang Technological University Sun Microsystems Inc. 50 Nanyang Avenue Singapore 639798

ISBN: (纸本)0769521320

Computation grids provide large volume of computing resources and have become an attractive alternative for scientific computing. It is desired that the applications are developed to utilize the globally distributed computing resources. Partitioning is one important way to achieve this goal. However, whether partitioning an application for computational grids is profitable or not is a basic problem and it is not fully addressed by the existing work. We call it partitionability problem. In our work, we try to quantify this problem and define the concept of computation density and partitionability based on the criteria of response time. We theoretically analyze the relationship between partitionability and application attributes such as I/O and internal communication data size. We show that with given workloads, those applications with higher computation density result in higher partitionability. We also propose a global resource registration mechanism so that the up-to-date resource information is available in partitioning. Our experiments with the simulated map image matching application shows that the proposed concept and frame-work improve the response time of the application by almost 40%.

关键词： Computational methods

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parallel reconstruction for parallel imaging space rip on cellular computer architecture

Parallel reconstruction for parallel imaging space rip on ce...

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Proceedings of the 16th IASTED International Conference on parallel and distributed Computing and Systems

作者： Niu, Yanwei Hu, Ziang Gao, Guang R. Department of ECE University of Delaware Newark DE United States

The SPACE RIP technique is one of the parallel imaging methods that has the potential to revolutionize the field of fast MR imaging. The image reconstruction problem of SPACE RIP is a computation intensive task which needs to be parallelized to further reduce the reconstruction time. In this paper, we analyzed the algorithm and identified the program bottleneck to be parallelized. The loop level parallelization is implemented with Pthread, OpenMP and MPI. Furthermore, since the reconstruction uses Singular Value decomposition (SVD) to solve the matrix pseudoinverse problem, we implemented the one sided Jacobi parallel SVD on the state-of-art cellular computer architecture Cyclops64 to speedup the problem at the fine grain level.

关键词： parallel processing systems

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PCI-bus content-addressable-memory (CAM) implementation on FPGA for pattern ecognition/image retrieval in a distributed environment

PCI-bus content-addressable-memory (CAM) implementation on F...

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Conference on Applications of Digital image processing XXVii

作者： Megherbi, DB Yan, Y Tanmay, P Khoury, J Woods, CL Univ Massachusetts CMINDS Res Ctr Dept Elect & Comp Engn Lowell MA 01854 USA

ISBN: (纸本)0819454966

Recently surveillance and Automatic Target Recognition (ATR) applications are increasing as the cost of computing power needed to process the massive amount of information continues to fall. This computing power has been made possible partly by the latest advances in FPGAs and SOPCs. In particular, to design and implement state-of-the-Art electro-optical imaging systems to provide advanced surveillance capabilities, there is a need to integrate several technologies (e.g. telescope, precise optics, cameras, image/compute vision algorithms, which can be geographically distributed or sharing distributed resources) into a programmable system and DSP systems. Additionally, pattern recognition techniques and fast information retrieval, are often important components of intelligent systems. The aim of this work is using embedded FPGA as a fast, configurable and synthesizable search engine in fast image pattern recognition/retrieval in a distributed hardware/software co-design environment. In particular, we propose and show a low cost Content Addressable Memory (CAM)-based distributed embedded FPGA hardware architecture solution with real time recognition capabilities and computing for pattern look-up, pattern recognition, and image retrieval. We show how the distributed CAM-based architecture offers a performance advantage of an order-of-magnitude over RAM-based architecture (Random Access Memory) search for implementing high speed pattern recognition for image retrieval. The methods of designing implementing, and analyzing the proposed CAM based embedded architecture are described here. Other SOPC solutions/design issues are covered. Finally, experimental results, hardware verification, and performance evaluations using both the Xilinx Virtex-ii and the Altera Apex20k are provided to show the potential and power of the proposed method for low cost reconfigurable fast image pattern recognition/retrieval at the hardware/software co-design level.

关键词： pattern recognition content addressable memory (CAM) embedded processor FPGA Virtex image retrieval (IR) SOPC DSP ASIC

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High-level design environment for massive parallel VLSI-implementations of statistical signal- and image processing models

High-level design environment for massive parallel VLSI-impl...

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2004 IEEE International Symposium on Circuits and Systems - Proceedings

作者： Stilkerich, Stephan Anlauf, Joachim K. EADS Corporate Research Center Image and Signal Processing Groupe 81663 Munich Germany University of Bonn Institute of Computer Science II 53117 Bonn Germany

In this paper we introduce and describe a novel generic and semiconductor-technology independent hardware development environment for a class of statistical signal- and image processing models. The statistical signal- and image processing approach under consideration formally adopts the Bayesian paradigm and uses discrete Markov Random Field (MRF) methods for the processing models to derive the joint distribution of signal- and image-processing problems by means of mathematically and computationally tractable conditional distributions. We experimentally demonstrate and prove the capabilities respectively the concepts of the proposed novel high-level design environment by detailed chip-layouts of different neighbourhood topologies and a single processing element of a MRF- architecture, which solves the image processing problem of noise removing, restoration and intensity-level preserving.

关键词： VLSI circuits

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New grid scheduling and rescheduling methods in the GrADS project

New grid scheduling and rescheduling methods in the GrADS pr...

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Proceedings - 18th International parallel and distributed processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)

作者： Cooper, K. Dasgupta, A. Kennedy, K. Koelbel, C. Mandal, A. Marin, G. Mazina, M. Mellor-Crummey, J. Berman, F. Casanova, H. Chien, A. Dail, H. Liu, X. Olugbile, A. Sievert, O. Xia, H. Johnsson, L. Liu, B. Patel, M. Reed, D. Deng, W. Mendes, C. Shi, Z. YarKhan, A. Dongarra, J. Computer Science Dept. Rice University Dept. of Computer Science University of California San Diego Dept. of Computer Science University of Houston Dept. of Computer Science University of Illinois ICL University of Tennessee

ISBN: (纸本)0769521320

The goal of the Grid Application Development Software (GrADS) Project is to provide programming tools and an execution environment to ease program development for the Grid. This paper presents recent extensions to the GrADS software framework: (1) A new approach to scheduling workflow computations, applied to a 3-D image reconstruction application;(2) A simple stop/migrate/restart approach to rescheduling Grid applications, applied to a QR factorization benchmark;and (3) A process-swapping approach to rescheduling, applied to an N-body simulation. Experiments validating these methods were carried out on both the GrADS MacroGrid (a small but functional Grid) and the MicroGrid (a controlled emulation of the Grid) and the results were demonstrated at the SC2003 conference.

关键词： Software engineering

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Computing the success factors in consistent acquisition and recognition of objects in color digital images by explicit preconditioning

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JOURNAL OF SUPERCOMPUTING 2004年第2期30卷 179-198页

作者： Maglogiannis, IG Zafiropoulos, EP Platis, AN Gravvanis, GA Univ Aegean Dept Informat & Commun Syst Engn GR-83200 Karlovassi Samos Greece Natl Tech Univ Athens Sch Elect & Comp Engn GR-15773 Athens Greece Hellen Open Univ Dept Comp Sci Patras Greece

The paper studies the factors influencing the consistent acquisition and recognition of object's color and border features in digital imaging. The proposed image acquisition process is utilized by a computer supported imaging system implementing the acquisition and analysis of skin lesion images supporting medical diagnosis. In addition the same approach may be used for several problems requiring reliable color measurement and object identification. Two methodologies are adopted: The Bayesian Networks, which provide an efficient way of reasoning under uncertainty and are used to incorporate the expert judgement into the estimation of the probability of successful operation, and a Markov chain approach, which is generally used for the dynamic modeling of the system behavior. The Markov chain model requires asymptotically the solution of sparse linear systems. Explicit preconditioned methods are used for the efficient solution of the derived sparse linear system, and the parallel implementation of the dominant computational part is exploited.

关键词： digital image acquisition camera calibration color measurement reproducibility computer vision Bayesian networks Markov modeling Markov Reward Models approximate inverses preconditioning parallel computations

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