A review on the fractal image compression coding and the improvement measures are provided in this paper. The development process of the fractal image compression coding is introduced briefly. Some basic mathematic th...
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ISBN:
(纸本)9781932415582
A review on the fractal image compression coding and the improvement measures are provided in this paper. The development process of the fractal image compression coding is introduced briefly. Some basic mathematic theories about the fractal image compression coding are given. The main problems which exist in the fractal compression coding bring into focus. Some traditional and new methods about the fractal image compression coding are discussed. The advantages and disadvantages of these methods are comprehensively analy ed. And the mixture of these methods is concerned. It is believed that the fractal image compression coding will be one of the most effective methods in the field of digital image coding.
With the increasing importance of multiple multiplatform remote sensing missions, digital image registration has been applied into many fields, and specially plays a very important role in remotely sensed data process...
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ISBN:
(纸本)3540292357
With the increasing importance of multiple multiplatform remote sensing missions, digital image registration has been applied into many fields, and specially plays a very important role in remotely sensed data processing. Firstly a brief introduction of existing parallelmethods of wavelet-based global registration is given. And then the communication optimization for GP method is described. The optimized algorithm is named Group-Optimized-parallel (GOP for short). To find out the reason of occasionally lower efficiency of GOP than other methods, a more careful analysis is presented in theory and proved in experiments. Moreover, we give a quantitative criterion, called Remainder Items, to choose the best solution in different input conditions.
This paper presents a novel concept for resource management in cluster-based image retrieval systems. First, the paper describes image retrieval using static and dynamic feature extraction. The complexity of dynamic f...
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ISBN:
(纸本)9781932415582
This paper presents a novel concept for resource management in cluster-based image retrieval systems. First, the paper describes image retrieval using static and dynamic feature extraction. The complexity of dynamic feature extraction requires the utilization of powerful parallel architectures and in order to provide the user with reasonable response times. Most existing methods for resource management in parallelimage retrieval systems are based on sinlge query execution and do not take quality of service (QoS) aspects into account. This appears not to be practical in large-scale and commercial applications of image databases having a large number of users at any time. In order to allow an efficient utilization of the parallel system and to meet user-defined QoS demands associated with queries, we need to develop a new concept and a novel resource management architecture. Interesting aspects of the model include utility theory, flexible computations, QoS levels, and a hierarchical resource management architecture. Finally, an approach for algorithmic solution is described.
The proceedings contain 74 papers. The topics discussed include: web services composition for distributed data mining;how to run scientific applications over web services;resource management services for a grid analys...
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The proceedings contain 74 papers. The topics discussed include: web services composition for distributed data mining;how to run scientific applications over web services;resource management services for a grid analysis environment;a comparison of two methods for building astronomical image mosaics on a grid;gene sequence alignment on a public computing platform;parallel module network learning on distributed memory multiprocessors;a scalable parallel poisson solver in three dimensions with infinite-domain boundary conditions;factoring solution sets of polynomial systems in parallel;a programmable array processor architecture for flexible approximate string matching algorithms;and speculative parallel threading architecture and compilation.
One of the most significant challenges in fluorescence-enhanced optical tomography is the repeated calculation of Jacobian sensitivity matrix. An adjoint sensitivity method is more computationally efficient than other...
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ISBN:
(纸本)1932415602
One of the most significant challenges in fluorescence-enhanced optical tomography is the repeated calculation of Jacobian sensitivity matrix. An adjoint sensitivity method is more computationally efficient than other methods to compute the sensitivity, but its serial implementation is not sufficient for real-time large scale 3D reconstruction system due to the intensive computation overhead of the inverse problem and the limitation of the single computer resources. A vectorized implementation of a sequential algorithm has been applied for adjoint sensitivity computation on a single computer. In this paper, we present an extension of this algorithm to parallel computing environment, in which mesh data decomposition is used to compute the Jacobian matrix over multiple processors. We discuss and compare the performance of the parallel algorithm implemented on both the network of Dell PC workstations and the SGI Onyx3400 shared memory MIMD system.
Hybrid chips containing both CPU's and FPGA components promise the potential of providing a unified platform for seamless implementation of hardware and software co-designed components. Realizing the potential of ...
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ISBN:
(纸本)0769523129
Hybrid chips containing both CPU's and FPGA components promise the potential of providing a unified platform for seamless implementation of hardware and software co-designed components. Realizing the potential of these new hybrid chips requires new high level programming model capabilities that support a far more integrated view of the CPU and FPGA components than is achievable with current methods. The KU Hybrid Threads project has been investigating extending the familiar multithreaded programming model across this CPU/FPGA boundary to support both FPGA based hardware and CPU based software threads. Adopting this generalized multithreaded model can lead to programming productivity improvement, while at the same time providing the benefit of customized hardware from within a familiar software programming model. In this paper we present an application study of our hybrid multithreaded model. We have implemented several image-processing functions in both hardware and software, but from within the common multithreaded programming model on a XILINX V2P7 FPGA. This example demonstrates hardware and software threads executing concurrently using standard multithreaded synchronization primitives transforming real-time images captured by a camera and display it on a workstation.
Backside sample preparation has been widely used in failure analysis of integrated circuits (IC). Conventional backside sample preparation methodologies include mechanical grinding, parallel polishing, chemical etchin...
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ISBN:
(纸本)081945687X
Backside sample preparation has been widely used in failure analysis of integrated circuits (IC). Conventional backside sample preparation methodologies include mechanical grinding, parallel polishing, chemical etching with mask, etc. The mechanical grinding or polishing could induce mechanical damage in the Si. Normally the thickness after sample preparation with mechanical methods is about 100 um and above. Chemical etching can be applied to get thinner sample, e.g., less than 30 um and below. For a sample with thickness less than 30 um, mechanical support is needed. In order to make selective etching on substrates, a patterned mask has to be applied on the sample. In this paper, we will present a new methodology for backside sample preparation, which uses laser-enhanced chemical etching to open a trench on Si from the backside. This methodology can get thinner backside sample with strong mechanical support from the substrate.
Discrete Fourier transform (DFT) has many applications in digital signal and imageprocessing and other scientific and technological domains, but its time complexity of direct computation is O(n2), limiting greatly it...
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Multi-Processor System-on-Chip (MPSoC) represents today the main trend for future architectural designs. Nonetheless, the scheduling of tasks on these distributed systems is a major problem since it has a central impa...
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Multi-Processor System-on-Chip (MPSoC) represents today the main trend for future architectural designs. Nonetheless, the scheduling of tasks on these distributed systems is a major problem since it has a central impact on global performances. This problem is known to be NP-complete and only approximate methods can be used. In the past, to approach optimal results, many heuristics have been proposed. But their complexity continue to increase, without considering efficient HW implementations. The novel scheduling policy, introduced in this paper, finds an interesting trade off between performance and complexity. Our list scheduling heuristic, called LLD, can near-optimally compute non-malleable tasks on multiple processing elements to minimize the schedule length with a low complexity. The comparison study achieved with already proposed algorithms shows that the LLD scheduling algorithm significantly overcomes the previous approaches in terms of processing element occupation as well as overall execution time.
Fingerprint verification is one of the most reliable personal identification methods in biometrics. In this paper, an effective fingerprint verification system is presented. We describe an enhanced fingerprint verific...
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Fingerprint verification is one of the most reliable personal identification methods in biometrics. In this paper, an effective fingerprint verification system is presented. We describe an enhanced fingerprint verification system consisting of image pre-processing, feature extraction and matching processes. Improved image pre-processing and broken ridge reconnection methods are proposed. In this paper, we also describe the design and implementation of a fingerprint verification system on SoC
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