The problem of shrinking the connected components of binary images to small residues is addressed. A new parallel algorithm is presented with the lowest known worst case time complexity as measured by iteration counts...
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We have constructed a prototype imageprocessing board containing 384 processors In 8 VLSI chips. The goal of the prototype is to show how fine grain parallelism present in imageprocessing applications can be exploit...
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ISBN:
(纸本)0819425885
We have constructed a prototype imageprocessing board containing 384 processors In 8 VLSI chips. The goal of the prototype is to show how fine grain parallelism present in imageprocessing applications can be exploited by using lots of simple processors inter-connected in clever ways. Each processor has a 16-bit data path, a simple instruction set containing 12 instructions, a simple control unit, and a scan chain for loading data and program, Each VLSI chip, called PADDI-2, contains 48 processors, The programming model used for the processors is MIMD. Each processor has 8 words in the instruction memory. There are internal registers and queues in a processor for storing data and partial results. Data is assumed to be entering the system as a stream and processed by the processors. Each VLSI chip is connected to an external memory (64K x 16). a hardware synchronization mechanism is used for communication between processors;memory, and the external environment. If a sender and receiver is within the same chip, communication can be done in one cycle by the hierarchical interconnect bus structure, Programming the processors and the interconnections are done at compile time. The board is interfaced to a Sun SPARCstation using the SBus. Video input and output is supported by the board and field buffers are used for buffering. Software tools for checking the board, running test programs at the assembly language level, and Libraries for application development have been produced. imageprocessing applications are currently under development. The board is available for experimentation over the Internet. Further details are available from the project web page (http://***/spartan).
The generalized matrix product includes in its formulation many common array manipulations. It also provides a framework for the expression of a number of important imageprocessing algorithms. It is shown that the ge...
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Edge detection is an important first step in many vision tasks where its improvements in speed and efficiency present a continuous challenge for developers of high-speed image recognizers. Classical techniques for acc...
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We describe a dynamic load-balancing algorithm for ray-tracing by progressive refinement on a distributed-memory parallel computer. parallelization of progressive ray-tracing for single images is difficult because of ...
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ISBN:
(纸本)1581130104
We describe a dynamic load-balancing algorithm for ray-tracing by progressive refinement on a distributed-memory parallel computer. parallelization of progressive ray-tracing for single images is difficult because of the inherent sequential nature of the sample location generation process, which is optimized (and different) for any given image. parallelization of progressive ray-tracing when generating image sequences at a fixed interactive rate is even more difficult, because of the time and synchronization constraints imposed on the system. We show how to overcome these problems, which, to the best of our knowledge, have not been treated before. Exploiting the temporal coherence between frames enables us to both accelerate rendering and improve the load-balance throughout the sequence. Our dynamic load-balance algorithm, a blend of local and global methods, accounting not only for rendering performance, but also communication overheads and synchronization issues, is shown to be robust to the harsh environment imposed by a time-critical application, such as the one we consider.
A new algorithm to compute the motion vector has been developed based on the block-matching approach in which bands are used instead of blocks. The new band-matching algorithm (BDMA) offers better performance than bot...
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This paper describes the design concept and the implementation of the imaging database Online image Delivery System (OLIDS). We propose a new framework to support vertically parallelimageprocessing in multimedia dat...
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ISBN:
(纸本)0818681489
This paper describes the design concept and the implementation of the imaging database Online image Delivery System (OLIDS). We propose a new framework to support vertically parallelimageprocessing in multimedia database systems. We present a generic and customizable framework for specifying image query execution plan that permits the DBMS to optimize and to execute parallelimageprocessing. Moreover, it is important to provide to the multimedia applications the capability to customize the information server according to their specific requirements. The capability to customize easily in a vertical way the multimedia information server according to new applications' requirements (i.e. new kinds of retrieval methods with uncertainty factor, new kinds of compression algorithms) also provides both challenges and opportunities in building high performance multimedia and image systems. Applications such as (Active hypermedia project) or MODOS (Museum project between LRMF (France), NMWA and NACSIS(Japan)) demonstrate the usefulness of the customizable feature of the Application-Oriented DBMS Phasme, a micro-kernel database system tested and extended inside NACSIS.
Watershed transformation is a tool for image segmentation widely used in computer vision applications. However, the complexity of processing large images entails fast parallel algorithms. In this paper, an improved SP...
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The objective of thinning is to reduce the amount of information in image patterns to the minimum needed for recognition. Thinned image helps the extraction of important features such as end points, junction points, a...
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A computer systems architecture for processing medical images and other data coming over the Web is proposed. The architecture comprises a Java engine for communicating images over the Internet, storing data in local ...
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A computer systems architecture for processing medical images and other data coming over the Web is proposed. The architecture comprises a Java engine for communicating images over the Internet, storing data in local memory, doing floating point calculations, and a coprocessor MIMD parallel DSP for doing fine-grained operations found in video, graphics, and imageprocessing applications. The local memory is shared between the Java engine and the parallel DSP. Data coming from the Web is stored in the local memory. This approach avoids the frequent movement of image data between a host processor's memory and an image processor's memory, found in many imageprocessing systems. A low-power and high performance parallel DSP architecture containing lots of processors interconnected by a segmented hierarchical network has been developed. The instruction set of the 16-bit processor supports video, graphics, and imageprocessing calculations. Two's complement arithmetic, saturation arithmetic, and packed instructions are supported. Higher data precision such as 32-bit and 64-bit can be achieved by cascading processors. A VLSI chip implementation of the architecture containing 64 processors organized in 16 clusters and interconnected by a statically programmable hierarchical bus is in progress. The buses are segmentable by programming switches on the bus. The instruction memory of each processor has sixteen 40-bit words. Data streaming through the processor is manipulated by the instructions. Multiple operations can be performed in a single cycle in a processor. A low-power handshake protocol is used for synchronization between the sender and the receiver of data. Temporary storage for data and filter coefficients is provided in each chip. A 256 by 16 memory unit is included in each of the 16 clusters. The memory unit can be used as a delay line, FIFO, lookup table or random access memory. The architecture is scalable with technology. Portable multimedia terminals like U.C.
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