This paper presents a system for dynamic intelligent scheduling and control of reconfigurable parallel processors. The purpose of the system is to provide a rapid prototyping capability for computer vision/image proce...
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This paper presents a system for dynamic intelligent scheduling and control of reconfigurable parallel processors. The purpose of the system is to provide a rapid prototyping capability for computer vision/imageprocessing tasks. The scheduler particularly addresses the problems of algorithms with execution times that depend on the image data and processing scenarios that vary dynamically based on the input image. Since conventional scheduling methods cannot produce schedules for most tasks of this type, a dynamic controller is used to schedule the task and reconfigure the machine “on the fly.” This dynamic scheduling system attempts to balance the overall processing scenario with the needs of the individual routines that make up the task. This paper discusses the implementation of the DISC ( D ynamic I ntelligent S cheduling and C ontrol) system. Emphasis is on the scheduling heuristics as they apply to a reconfigurable parallel processor, the information in the system database, and the use of the system for prototyping computer vision/imageprocessing tasks on a partitionable parallel system.
In this paper we consider a new form of connectivity in binary images, called k -width connectivity. Two pixels a and b of value “1” are in the same k -width component if and only if there exists a path of width k s...
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In this paper we consider a new form of connectivity in binary images, called k -width connectivity. Two pixels a and b of value “1” are in the same k -width component if and only if there exists a path of width k such that a is one of the k start pixels and b is one of the k end pixels of this path. We present characterizations of the k -width components and show how to determine the k -width components of an n × n image in O(n) and O (log 2 n ) time on a mesh of processors and hypercube, respectively, when the image is stored with one pixel per processor. Our methods use a reduction of the k -width-connectivity problem to the 1-width-connectivity problem. A distributed, space-efficient encoding of the k -width components of small size allows us to represent the solution using O (1) registers per processor. Our hypercube algorithm also implies an algorithm for the shuffle-exchange network.
A mixed-mode parallel machine's processing elements (PEs) are capable of operating in and switching between the SIMD and MIMD modes of parallelism. The paper analyzes various mappings of image correlation algorith...
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A mixed-mode parallel machine's processing elements (PEs) are capable of operating in and switching between the SIMD and MIMD modes of parallelism. The paper analyzes various mappings of image correlation algorithms onto a mixed-mode parallelprocessing system. The trade-offs that exist between the SIMD and MIMD modes explain why some sequences of instructions are performed better in one mode than in the other and are the primary basis employed in comparing different mappings of a parallel algorithm onto a mixed-mode system.< >
The binary de Bruijn graph (BDG) is a realizable alternative to the hypercube. An extension of the BDG by the edge set union with a torus is shown-union-graph (UG). This achieves graph capabilities/versatility compara...
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The binary de Bruijn graph (BDG) is a realizable alternative to the hypercube. An extension of the BDG by the edge set union with a torus is shown-union-graph (UG). This achieves graph capabilities/versatility comparable to the product shuffle (PS) graph and the hypercube within a fixed degree graph. The UG improves upon both in implementing pipelined and multi-phase algorithms. More importantly, the purpose being to design an algorithmically specialized interconnect, with the algorithmic features of a wide range of algorithms as well as direct architectural support for them, instead of simple providing for a set of graph embeddings in the interconnect. A set of examples demonstrate the UG's versatility in this aspect of algorithmic support.< >
A neural controller for visually guided navigation of a mobile robot in the presence of dynamic obstacles and a vector field of attraction forces is presented. Discrete information, obtained from a raster-type sensor,...
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A neural controller for visually guided navigation of a mobile robot in the presence of dynamic obstacles and a vector field of attraction forces is presented. Discrete information, obtained from a raster-type sensor, is subjected to paralleldistributedprocessing aiming at real-time detection of geometrical properties of visual representations of the obstacles. A characteristic feature of the neural architecture adopted here is processing of the input data by a hidden layer of dipole units. This novel approach allows the controller to perform the operations of edge detection and recognition of geometrical features within the controller’s structure rather than using visual data pre-processed by classical convolution-based methods. Dipole processing combined with the ability of our network to learn arbitrary associations very rapidly by self-programming permits the processing of large amounts of input data without compromising the efficiency of the learning phase. The capability of the network to extract and process some geometrical characteristics of the environment works for both local (limited by a field of view window) and global navigation. The behavior of the robot in the vicinity of obstacles can be tuned and modified by changing the number of recursively generated obstacle hulls, the size of the window, and the weights of the force components intervening in the control.
In general there are many possibilities to parallelize an algorithm and to distribute the tasks to the processors. In some cases the selection of a processor configuration depends on the given problem, too. To decide ...
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A paralleldistributedprocessing method for extracting features in stereo images is presented. The algorithm is edge-based and employs the epipolar constraint. First edges are detected in a multilayered network using...
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This paper introduces the parallelization on a distributed memory multicomputer of two iterative methods for finding all the roots of a given polynomial. The parallel algorithms share the computation of the roots amon...
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We previously developed an image reconstruction display for reconstructing images compressed by our hybridcompression algorithm. The hybrid algorithm, which improves image quality, applies Discrete Cosine Transformcod...
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ISBN:
(纸本)0819402788
We previously developed an image reconstruction display for reconstructing images compressed by our hybrid
compression algorithm. The hybrid algorithm, which improves image quality, applies Discrete Cosine Transform
coding (DCT) and Block Truncation Coding (BTC) adaptively to an image, according to its local properties. This
reconstruction display receives the compressed data from the host computer through a BMC channel and quickly
reconstructs good quality images using a pipeline-based microprocessor.
This paper describes a prototype of a system for compression and reconstruction of medical images. It also
describes the architecture of the image compression processor, one of the components of the system. This system
consists of the image compression processor, a host main-frame computer and reconstruction displays. Under this
system, distributedprocessing in the image compression processor and the image reconstruction displays reduces
the load on the host computer, and supplies an environment where the control routines for PACS and the hospital
information system (HIS) can co-operate. The compression processor consists of a maximum of four parallel
compression units with communication ports. In this architecture, the hybrid algorithm, which includes serial
operations, can be processed at high speed by communicating the internal data. In experiments, the compression
system proved effective: the compression processor compressed a 1k x 1k image in about 2 seconds using four
compression units. The three reconstruction displays showed the image at almost the same time. Display took less
than 7 seconds for the compressed image, compared with 28 seconds for the original image.
In this paper we consider a new form of connectivity in binary images, called k-width-connectivity. Two pixels a and 6 of value are in the same k-width- component if and only if there exists a path of width k such tha...
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