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检索条件"任意字段=Proceedings - 16th Symposium on Computer Architecture and High Performance Computing"

共 2316 条记录，以下是141-150 订阅

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Energy-delay estimation technique for high-performance microprocessor VLSI adders

Energy-delay estimation technique for high-performance micro...

引用

16th IEEE symposium on computer Arithmetic

作者： Oklobdzija, VG Zeydel, BR Dao, HA Mathew, S Krishnamurthy, R Univ Calif Davis ACSEL Davis CA 95616 USA

ISBN: (纸本)076951894X

In this paper, we motivate the concept of comparing VLSI adders bayed on their energy-delay trade-offs and present a technique for estimating the energy-delay space of various high-performance VLSI adder topologies. Further, we show that our estimates accurately represent tradeoffs in the energy-delay space for high-performance 32-bit and 64-bit processor adders in 0.13 mum and 0.10 mum CMOS technologies, with an accuracy of 8% in delay estimates and 20% in energy estimates, compared with simulated data.

关键词： VLSI circuits

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Feedback-directed thread scheduling with memory considerations 07

Feedback-directed thread scheduling with memory consideratio...

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16th International symposium on high performance Distributed computing 2007, HPDC'07 and Co-Located Workshops

作者： Song, Fengguang Moore, Shirley Dongarra, Jack University of Tennessee Computer Science Department Knoxville TN University of Tennessee Oak Ridge National Laboratory Knoxville TN

ISBN: (纸本)1595936734

this paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. the approach relies upon a binary instrumentation tool to automatically acquire the memory sharingrelationship between user-level threads by analyzing their memory trace. We introduce the concept of Affinity Graph to model the relationship. Expensive I/O for large trace files is completely eliminated by using an online graph creation scheme. We apply the technique of hierarchical graph partitioning and thread reordering to the affinity graph to determine an optimal thread schedule. We have performed experiments on an SGI Altix system. the experimental results show that our approach is able to reduce the totalexecution time by 10% to 38% for a variety of applications through the maximization of the data reuse within a single processor, minimization of the data sharing between processors, and a good load balance. Copyright 2007 ACM.

关键词： Scheduling

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Chasing Carbon: the Elusive Environmental Footprint of computing 27

Chasing Carbon: The Elusive Environmental Footprint of Compu...

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27th IEEE International symposium on high-performance computer architecture (HPCA)

作者： Gupta, Udit Kim, Young Geun Lee, Sylvia Tse, Jordan Lee, Hsien-Hsin S. Wei, Gu-Yeon Brooks, David Wu, Carole-Jean Harvard Univ Cambridge MA 02138 USA Facebook Inc Menlo Pk CA 94025 USA Arizona State Univ Tempe AZ USA

ISBN: (纸本)9781665422352

Given recent algorithm, software, and hardware innovation, computing has enabled a plethora of new applications. As computing becomes increasingly ubiquitous, however, so does its environmental impact. this paper brings the issue to the attention of computer-systems researchers. Our analysis, built on industry-reported characterization, quantifies the environmental effects of computing in terms of carbon emissions. Broadly, carbon emissions have two sources: operational energy consumption, and hardware manufacturing and infrastructure. Although carbon emissions from the former are decreasing thanks to algorithmic, software, and hardware innovations that boost performance and power efficiency, the overall carbon footprint of computer systems continues to grow. this work quantifies the carbon output of computer systems to show that most emissions related to modern mobile and data-center equipment come from hardware manufacturing and infrastructure. We therefore outline future directions for minimizing the environmental impact of computing systems.

关键词： Data center mobile energy carbon footprint

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Leveraging high performance computing for Bioinformatics: A Methodology that Enables a Reliable Decision-Making 16

Leveraging High Performance Computing for Bioinformatics: A ...

引用

16th IEEE/ACM International symposium on Cluster, Cloud and Grid computing (CCGrid)

作者： Ferro, Mariza Nicolas, Marisa F. Saji, Quadalupe del Rosario Q. Mury, Antonio R. Schulze, Bruno Natl Lab Sci Comp Petropolis RJ Brazil

ISBN: (纸本)9781509024537

Bioinformatics could greatly benefit from increased computational resources delivered by high performance computing. However, the decision-making about which is the best architecture to deliver good performance for a set of Bioinformatics applications is a hard task. the traditional way is finding the architecture with a high theoretical peak of performance, obtained with benchmark tests. But, this is not an assured way for this decision, because each application of Bioinformatics has different computational requirements, which frequently are much different from usual benchmarks. We developed a methodology that assists researchers, even when their specialty is not high performance computing, to define the best computational infrastructure focused on their set of scientific application requirements. For this purpose, the methodology enables to define representative evaluation tests, including a model to define the correct benchmark, when the tests endorsed by the methodology could not be fully used. Further, a Gain Function allows a reliable decision-making based on the performances of a set of applications and architectures. It is also possible to consider the relative importance between applications and also between cost and performance.

关键词： high performance computing performance evaluation scientific applications bioinformatics

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Profiling and optimization of software-based network-analysis applications 15

Profiling and optimization of software-based network-analysi...

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15th symposium on computer architecture and high performance computing

作者： Degioanni, L Baldi, M Risso, F Varenni, G Politecn Torino Dipartimento Automat & Informat I-10129 Turin Italy

ISBN: (纸本)0769520464

A large set of tools for network monitoring and accounting, security, traffic analysis and prediction more broadly, for network operation and management require direct and efficient real-time access to data traveling on the network. Software tools are often preferred because of their low cost and high versatility. However, these tools are often considered to suffer from performance problems on high-speed networks. this paper demonstrates that, despite the common belief the performance limits for software real-time network analysis tools are still far from being reached and it can even improved with limited hardware support. this work analyzes the performance of a widely used library for network analysis, WinPcap, highlights its bottlenecks, and proposes some solutions that almost double the overall speed, thus enabling the deployment of software-based tools on high speed networks.

关键词： Application software Costs Data security Hardware high-speed networks Monitoring performance analysis Software performance Software tools Telecommunication traffic

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Exascale computing: the challenges and opportunities in the next decade 10

Exascale Computing: The challenges and opportunities in the ...

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16th International symposium on high-performance computer architecture

作者： Agerwala, Tilak IBM Res Corp VP Syst Yorktown Hts NY 10598 USA

ISBN: (纸本)9781424456598

Supercomputing systems have made great strides in recent years as the extensive computing needs of cutting-edge engineering work and scientific discovery have driven the development of more powerful systems. In 2008, the first petaflop machine was released, and historic trends indicate that in ten years, we should be at the exascale level. Indeed, various agencies are targeting a computer system capable of 1 Exaop (10**18 ops) of computation within the next decade. We believe that applications in many industries will be materially transformed by exascale computers. Meeting the exascale challenge will require significant innovation in technology, architecture and programmability. Power is a fundamental problem at all levels;traditional memory cost and performance are not keeping pace with compute potential;the storage hierarchy will have to be re-architected;networks will be a much bigger part of the system cost;reliability at exascale levels will require a holistic approach to architecture design, and programmability and ease-of-use will be an essential component to extract the promised performance at the exascale level. In this talk, I will discuss the importance of exascale computing and address the major challenges, touching on the areas of technology, architecture, reliability and usability.

关键词： architecture challenges exascale

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Enabling dual-core mode in BlueGene/L:: Challenges and solutions 15

Enabling dual-core mode in BlueGene/L:: Challenges and solut...

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15th symposium on computer architecture and high performance computing

作者： Almási, G Bachega, LR Chatterjee, S Gupta, M Lieber, D Martorell, X Moreira, JE IBM Corp Thomas J Watson Res Ctr Yorktown Hts NY 10598 USA

ISBN: (纸本)0769520464

BlueGene/L is a massively parallel computer system with 65,536 dual-processor compute nodes. the peak performance of BlueGene/L is in excess of 360 TFLOP/s if both processor cores in a node are used for computation. the main challenge of deploying this dual-core mode of operation is that the L1 caches in each core are not hardware coherent. this forces a software-based approach to cache coherence and guides our design of a programming model for dual-core mode. In this paper we describe the design, implementation, and performance evaluation of system software for enabling the use of dual-core mode on BlueGene/L. Our preliminary performance results show that our approach to dual-core mode is effective for key numerical kernels.

关键词： Coherence Collaboration Concurrent computing Engines Hardware high performance computing Kernel Laboratories Random access memory System software

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Processing Neocognitron of Face Recognition on high performance Environment Based on GPU with CUDA architecture

Processing Neocognitron of Face Recognition on High Performa...

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20th International symposium on computer architecture and high performance computing

作者： Poli, Gustavo Saito, Jose Hiroki Mari, Joao F. Zorzan, Marcelo R. Univ Fed Sao Carlos Dept Comp BR-13560 Sao Carlos SP Brazil

ISBN: (纸本)9780769534237

this work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an artificial neural network, proposed by Fukushima and collaborators, constituted of several hierarchical stages of neuron layers, organized in. two-dimensional matrices called cellular planes. For the high performance computation of Face Recognition application using Neocognitron it was used CUDA (Compute Unified Device architecture) as API (Application Programming Interface) between the CPU and the GPU, from GeForce 8800 GTX of NVIDIA company, with 128 ALU's. As face image databases it was used a face database created at UFS-Car and the CMU-PIE (Carnegie Mellon University Pose, Illumination and Expression) database. the load balancing was achieved through the use of cellular connections as threads organized in blocks, following the CUDA philosophy), of development. the results showed the feasibility of this type of device as a massively parallel data processing tool, and that smaller the granularity and the data dependency of the parallel processing, better is its performance.

关键词： Graphics processing unit

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Exploiting loop-level parallelism with the shift architecture 14

Exploiting loop-level parallelism with the shift architectur...

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14th symposium on computer architecture and high performance computing

作者： Lima, CD Nakamura, T Tohoku Univ Grad Sch Informat Sci Comp Architecture Lab Sendai Miyagi 9808579 Japan

ISBN: (纸本)0769517722

the limited amount of instruction-level parallelism inherent in applications is a limiting factor for improving the performance of most conventional microprocessors. A promising solution to overcome this problem is to exploit coarser granularities of parallelism. In this paper we propose exploiting loop-level parallelism in a multithreaded fashion. We use the Shift architecture [9] as a baseline architecture, with improved compiler support and registerfile. the compiler converts iterations of a loop into threads, to be executed by multiple processing elements. the hardware provides a selective register shifting mechanism in order to allow the execution of loops containing loop-carried data dependences, which are very difficult to execute by using conventional architectures. In this paper we simulate and discuss the parameters of major importance for the implementation of this architectural approach. Our initial results show that, on two simple numerical benchmarks, a considerable amount of iteration overlapping can be potentially achieved by an implementation of the Shift architecture, in comparison with a multiprocessor machine.

关键词： Application software computer architecture Continuous improvement Delay Hardware Laboratories Microprocessors Parallel processing Proposals Yarn

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Load scheduling in a cloud based massive video-storage environment 16

Load scheduling in a cloud based massive video-storage envir...

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16th International symposium on Symbolic and Numeric Algorithms for Scientific computing (SYNASC)

作者： Bayyapu, Karunakar Reddy Fischer, Paul Tech Univ Denmark Dept Appl Math & Comp Sci DK-2800 Lyngby Denmark

ISBN: (纸本)9781479984480

We propose an architecture for a storage system of surveillance videos. Such systems have to handle massive amounts of incoming video streams and relatively few requests for replay. In such a system load (i.e., write requests) scheduling is essential to guarantee performance. Large-scale data-storage system (LSDSS) is an emerging hosting facility for video-storage, which has a very high number of writes while most of the videos are never or rarely watched. We discuss the design and implementation of LSDSS and load scheduling in autonomous storage environments called datacenters in LSDSS. A datacenter (DC) is the basic concept in our LSDSS, which has the self-management system to store data efficiently. A LSDSS consists of many DCs organized in a hierarchy fashion, thereby decentralizing load scheduling tasks. Because DC has a simple design, load scheduling is particularly suited for implementation on a real-time video surveillance and allows to make scheduling decisions. We also discuss experimental results that clearly show the advantage of load scheduling over the widely known base load scheduling.

关键词： cloud computing computer centres scheduling video databases video surveillance DC LSDSS autonomous storage environments cloud based massive video-storage environment datacenters incoming video streams large-scale data-storage system real-time video surveillance scheduling decisions system load scheduling Bandwidth computer architecture Scheduling Scheduling algorithms Servers Videos architecture cloud storage distributed storage load scheduling video storage load dispatching Cloud computing Videotapes video databases Scheduling algorithms computer architecture video monitoring Servers direct current Building construction architecture Bandwidth

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