检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

2,291 篇 会议
29 篇 期刊文献
8 册 图书

馆藏范围

2,328 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

1,454 篇 工学
- 1,375 篇 计算机科学与技术...
- 671 篇 软件工程
- 295 篇 电气工程
- 290 篇 信息与通信工程
- 125 篇 电子科学与技术（可...
- 98 篇 网络空间安全
- 73 篇 控制科学与工程
- 57 篇 动力工程及工程热...
- 40 篇 生物工程
- 34 篇 机械工程
- 21 篇 材料科学与工程（可...
- 21 篇 建筑学
- 16 篇 生物医学工程（可授...
- 15 篇 光学工程
- 14 篇 环境科学与工程（可...
- 12 篇 仪器科学与技术
- 11 篇 土木工程
409 篇 理学
- 307 篇 数学
- 49 篇 物理学
- 46 篇 生物学
- 43 篇 系统科学
- 37 篇 统计学（可授理学、...
- 11 篇 地球物理学
- 9 篇 化学
212 篇 管理学
- 155 篇 管理科学与工程(可...
- 111 篇 工商管理
- 65 篇 图书情报与档案管...
30 篇 经济学
- 30 篇 应用经济学
28 篇 法学
- 25 篇 社会学
18 篇 医学
- 14 篇 临床医学
8 篇 农学
7 篇 教育学
3 篇 文学
1 篇 艺术学

主题

530 篇 computer archite...
204 篇 high performance...
201 篇 concurrent compu...
173 篇 hardware
173 篇 distributed comp...
164 篇 application soft...
146 篇 computer science
133 篇 parallel process...
126 篇 computational mo...
125 篇 delay
117 篇 costs
115 篇 computer network...
109 篇 grid computing
96 篇 bandwidth
91 篇 laboratories
77 篇 processor schedu...
67 篇 scalability
66 篇 resource managem...
62 篇 cloud computing
56 篇 distributed comp...

机构

7 篇 univ chicago dep...
7 篇 computer science...
7 篇 carnegie mellon ...
6 篇 univ wisconsin m...
6 篇 mathematics and ...
6 篇 intel corp santa...
6 篇 mathematics and ...
6 篇 changsha univers...
6 篇 institute of com...
5 篇 penn state univ ...
5 篇 univ toronto on
5 篇 school of electr...
5 篇 georgia inst tec...
5 篇 sandia national ...
5 篇 univ illinois ur...
5 篇 computer systems...
5 篇 college of compu...
5 篇 department of co...
4 篇 department of co...
4 篇 school of comput...

作者

9 篇 i. foster
8 篇 mutlu onur
7 篇 chong frederic t...
7 篇 guedes dorgival
7 篇 zhou huiyang
7 篇 magoules frederi...
7 篇 prasanna viktor ...
6 篇 navaux philippe ...
6 篇 patt yale n.
6 篇 torrellas josep
6 篇 kim nam sung
6 篇 d.k. panda
6 篇 wen-mei w. hwu
6 篇 r.k. iyer
5 篇 xie yuan
5 篇 loh gabriel h.
5 篇 schwan karsten
5 篇 li chao
5 篇 ahamed abal-kass...
5 篇 panda dhabaleswa...

语言

2,311 篇 英文
17 篇 其他
1 篇 中文

检索条件"任意字段=Proceedings - 16th Symposium on Computer Architecture and High Performance Computing"

共 2328 条记录，以下是501-510 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

Energy Consumption and Scalability Evaluation for Software Transactional Memory on a Real computing Environment 27

Energy Consumption and Scalability Evaluation for Software T...

引用

IEEE 27th International symposium on computer architecture and high performance computing

作者： Rico, Timoteo M. Pilla, Mauricio L. Du Bois, Andre R. Duarte, Rodrigo M. Univ Fed Pelotas PPGC CDTEC Pelotas RS Brazil

ISBN: (纸本)9781467386210

Transactional Memory is a concurrent programming abstraction that overcomes several of the limitations found in traditional synchronization mechanisms. As it is a more recent abstraction, little is known about energy consumption of Software Transactional Memories (STM). In this context, this work presents an analysis and characterization of energy consumption and performance of four Transactional Memory libraries: TL2, TinySTM, SwissTM, and AdaptSTM, using the STAMP benchmarks. Although most works in the state-of-the-art chose to evaluate Transactional Memories through simulation, in this work the benchmarks are run in actual computers, avoiding the known issues with modeling power consumption in simulators. Our results show that SwissTM is the most efficient library of the four in terms of energy consumption and performance for the default configurations, followed by AdaptSTM, TinySTM, and TL2, for most of the execution scenarios and 8 threads at most. STM's scalability is directly tied to the strategies for detection and resolution of conflicts. In this perspective, AdaptSTM is the best STM for applications with short transactions, SwissTM presents the best results for medium transactions, and long transactions with medium/high contention are best handled by TL2. On the other hand, TinySTM shows the worst scalability for most scenarios, but with good results for applications with very small abort rates.

关键词： Software transactional memory transactional memory green computing

来源：评论

学校读者我要写书评

暂无评论

Supporting HPDC applications over ATM networks with cell-based transport mechanisms

Supporting HPDC applications over ATM networks with cell-bas...

引用

5th IEEE International symposium on high performance Distributed computing

作者： VilaSallent, J SolePareta, J UNIV POLITECN CATALUNYA DEPT COMP ARCHITECTUREBARCELONACATALONIASPAIN

ISBN: (纸本)0818675829

In this paper, we address the problem of supporting high performance Distributed computing (HPDC) applications running over ATM networks. For this purpose, we consider a logically separate subnetwork for these applications. After presenting an architectural reference model for the HPDC subnetwork and distinguishing which functions should be installed over the ATM network in order to satisfy the needs of HPDC applications, we propose two mechanisms that aim at optimizing communications by taking advantage of both the special properties of HPDC traffic and the cell-based nature of ATM. the performance of these mechanisms is evaluated and compared with that achieved by the SSCOP protocol. the results show that when the ATM network experiences high load and the HPDC applications make an intensive use of arrays, cell-based mechanisms become more robust than standard SSCOP and provide low latency and efficient cell loss recovery. Since both situations are very likely to occur in HPDC environments, we conclude that the introduction of cell-based retransmission mechanisms does contribute to enhance performance of HPDC systems over ATM networks.

关键词： Distributed computer systems

来源：评论

学校读者我要写书评

暂无评论

high-performance parallel and distributed computing for the BMI eigenvalue problem 16

High-performance parallel and distributed computing for the ...

引用

16th International Parallel and Distributed Processing symposium, IPDPS 2002

作者： Aida, K. Futakata, Y. Hara, Shinji Tokyo Institute of Technology PRESTO JST Japan IBM Japan Japan Tokyo Institute of Technology University of Tokyo Japan

ISBN: (纸本)0769515738

the BMI Eigenvalue Problem is one of optimization problems and is to minimize the greatest eigenvalue or a bilinear matrix function. this paper proposes a parallel algorithm to compute the ϵ-optimal solution of the BMI Eigenvalue Problem on parallel and distributed computing systems. the proposed algorithm performs a parallel branch and bound method to compute the e-optimal solution using the Master-Worker paradigm. the performance evaluation results on PC clusters and a Grid computing system showed that the proposed algorithm reduced computation time of the BMI Eigenvalue problem to 1/91 of the sequential computation time on. a PC cluster with 128CPUs and reduced that to 1/7 on a Grid computing system. the results also showed that tuning of the computational granularity on a worker was required to achieve the best performance on a Grid computing system. © 2002 IEEE.

关键词：

来源：评论

学校读者我要写书评

暂无评论

ACEcardTM: A high-performance architecture for run-time reconfiguration 1

ACEcardTM: A high-performance architecture for run-time reco...

引用

proceedings of the 1998 12th International Parallel Processing symposium and 9th symposium on Parallel and Distributed Processing

作者： Davis, Don Harris, Jonathan TSI TelSys Inc Columbia United States

ISBN: (纸本)0818684038

Recent FPGA architectures have shown an increased emphasis on run-time reconfiguration, or the ability to rapidly change the functionality of the FPGA to sequentially accommodate large processing tasks. In addition, partial reconfiguration allows for the reconfiguration of a portion of the FPGA while the remainder is running. these two features enable the use of reconfigurable computing in high-performance multi-threaded multi-user environments. However, current board designs are not optimized to provide the processing support required to maintain this run-time environment which includes management of the reconfigurable resources, interface to the host processor and data movement. In this paper, we will describe the architecture, design and applicability of the ACEcard, a high performance reconfigurable co-processor. the ACEcard contains reconfigurable resources as well as an embedded processor to manage the runtime reconfiguration of those resources. We will provide details of the architecture of the card as well as a description of the current and future Java-based runtime environment.

关键词： computer architecture

来源：评论

学校读者我要写书评

暂无评论

Research on Mahalanobis Distance Algorithm Optimization Based on OpenCL 16

Research on Mahalanobis Distance Algorithm Optimization Base...

引用

16th IEEE Int Conf on high performance computing and Communications/11th IEEE Int Conf on Embedded Software and Systems\6th Int symposium on Cyberspace Safety and Security

作者： Xie, Qingchun Zhang, Yunquan Jia, Haipeng Lu, Yongquan Commun Univ China High Performance Comp Ctr Beijing 100024 Peoples R China Chinese Acad Sci Inst Software Lab Parallel Comp Beijing 100190 Peoples R China Chinese Acad Sci Inst Comp Technol State Key Lab Comp Architecture Beijing 100190 Peoples R China

ISBN: (纸本)9781479961238

Mahalanobis distance algorithms has been widely used in machine learning and classification algorithms, and it has an important practical significance in improving the performance of some applications through GPU, especially in some applications with high real-time demand. However, due to the complexity of the GPU hardware architectures, how to complete the algorithm optimization and achieve high performance portability on different GPU platforms is still a hard work. the redundant calculation of traditional Mahalanobis distance algorithm is very large and is hard to implement parallel. In this paper, we not only throw light on the universal ways to properly map mature algorithms to GPU devices to implement the Mahalanobis distance, such as fixed number of workgroups and vectorization, but also put forward five valuable methods of performance optimization on heterogeneous computing platforms, such as two-dimension NDRange workgroup arrangement, Uberkernel, binary reduction with the help of LDS register in one workgroup. Furthermore, We also demonstrate the high performance of our implementation by comparing it with a well-optimized CPU version from OpenCV library. Experimental results show that speedup reaches up 10.59 times on NVIDIA GPU C2050, 8.55 times on AMD HD5850 and 16.08 times on HD7970. the last experimental results verified the effectiveness of optimization methods which we proposed.

关键词： OpenCL Heterogeneous computing GPU Mahalanobis Parallel Optimization

来源：评论

学校读者我要写书评

暂无评论

A component based services architecture for building distributed applications 9

A component based services architecture for building distrib...

引用

9th IEEE International symposium on high performance Distributed computing

作者： Bramley, R Chiu, K Diwan, S Gannon, D Indiana Univ Dept Comp Sci Bloomington IN 47405 USA

ISBN: (纸本)0769507840

this paper describes an approach to building a distributed software component system for scientific and engineering applications that is based on representing GRID services as application-level software components. these GRID services provide tools such as registry and directory services, event services, and remote component creation. While a services-based architecture for Grids and other distributed systems is not new, this framework provides several unique features. First, the public interfaces to each software component are described as XML documents. this allows many adaptors and user interfaces to be generated from the specification dynamically. Second, this system is designed to exploit the resources of existing Grid infrastructures like Globus[7], [15], Legion[17], [7], and commercial Internet frameworks like e-speak[11]. third, and most important, the component-based design extends throughout the system. Hence tools such as application builders which allow users to select components, start them on remote resources, and connect and execute them, are also interchangeable software components. Consequently, it is possible to build distributed applications using a graphical "drag-and-drop" interface, a web-based interface, a scripting language like Python, or an existing tool such as Matlab.

关键词： Application software Buildings computer architecture Distributed computing Grid computing Internet Software systems Software tools User interfaces XML

来源：评论

学校读者我要写书评

暂无评论

A three-Level Parallel Algorithm For MrBayes 3.2 15

A Three-Level Parallel Algorithm For MrBayes 3.2

引用

15th IEEE International symposium on Parallel and Distributed Processing with Applications (ISPA) / 16th IEEE International Conference on Ubiquitous computing and Communications (IUCC)

作者： Zhao, Mingjie Ren, Qiang Wang, Yilin Deng, Ruikang Ren, Mingming Wang, Gang Liu, Xiaoguang Nankai Univ Nankai Baidu Joint Lab Tianjin Peoples R China

ISBN: (纸本)9781538637906

MrBayes is a popular bioinformatics software that is widely used in phylogenetic analysis. the core algorithm of Mrbayes is Metropolis Coupled Markov Chain Monte Carlo (MC3). However, when dealing with large data sets, MC3 algorithm is too slow to meet researcher's requirements. Although several parallelizations have been proposed for MrBayes, such as MPI (Message Passing Interface) based MrBayes, GPU (Graphics Processing Unit) based MrBayes, there is still no efficient parallel algorithm to fully utilize computing power of modern CPU and computer architecture. this paper (a) presents a new three-level hybrid parallel algorithm, include data-level parallelism (DLP), thread-level parallelism (TLP), and process-level parallelism (PLP), which can be used on most modern multi-core computers;(b) compares the performance of different combinations of parallel strategies on real-world protein data sets. the experimental results show that, this hybrid parallel algorithm does convert more computing powers into higher speedup. Furthermore, the proposed algorithm's speedup is near the speedup on one GPU at the same data sets. this algorithm is fit for practical use in phylogenetic inferences.

关键词： MrBayes SIMD hybrid parallel computing

来源：评论

学校读者我要写书评

暂无评论

high performance On-Demand Video Transcoding Using Cloud Services 16

High Performance On-Demand Video Transcoding Using Cloud Ser...

引用

16th IEEE/ACM International symposium on Cluster, Cloud and Grid computing (CCGrid)

作者： Li, Xiangbo Salehi, Mohsen Amini Bayoumi, Magdy Univ Louisiana Lafayette Ctr Adv Comp Studies Lafayette LA 70504 USA Univ Louisiana Lafayette Dept Comp Sci HPCC Lab Lafayette LA 70504 USA

ISBN: (纸本)9781509024537

Video streams, either in form of on-demand streaming or live streaming, usually have to be converted (i.e., transcoded) based on the characteristics (e.g., spatial resolution) of clients' devices. Transcoding is a computationally expensive operation, therefore, streaming service providers currently store numerous transcoded versions of the same video to serve different types of client devices. However, recent studies show that accessing video streams have a long tail distribution. that is, there are few popular videos that are frequently accessed while the majority of them are accessed infrequently. the idea we propose in this research is to transcode the infrequently accessed videos in a on-demand (i.e., lazy) manner. Due to the cost of maintaining infrastructure, streaming service providers (e.g., Netflix) are commonly using cloud services. However, the challenge in utilizing cloud services for video transcoding is how to deploy cloud resources in a cost-efficient manner without any major impact on the quality of video streams. To address the challenge, in this research, we present an architecture for on-demand transcoding of video streams. the architecture provides a platform for streaming service providers to utilize cloud resources in a cost-efficient manner and with respect to the Quality of Service (QoS) requirements of video streams. In particular, the architecture includes a QoS-aware scheduling component to efficiently map video streams to cloud resources, and a cost-efficient dynamic (i.e., elastic) resource provisioning policy that adapts the resource acquisition with respect to the video streaming QoS requirements.

关键词： Streaming media Transcoding Quality of service Cloud computing Delays Servers

来源：评论

学校读者我要写书评

暂无评论

GSU middleware architecture design 5

GSU middleware architecture design

引用

5th IEEE International symposium on high Assurance Systems Engineering (HASE 2000)

作者： Tso, KS Tai, AT Alkalai, L Chau, SN Sanders, WH IA Tech Inc Los Angeles CA 90024 USA

ISBN: (纸本)0769509274

NASA's future deep-space missions will require onboard software upgrade. A challenge that arises from this is that of guarding the system against performance loss caused by residual design faults in the new version of a spacecraft/science function. Accordingly, we have developed a methodology called guarded software upgrading (GSU). the GSU framework is based on the Baseline X2000 First Delivery architecture, which comprises three high-performance computing nodes with local DRAMs and multiple subsystem microcontroller nodes that interface with a variety of devices. All nodes are connected by a high-speed fault tolerant bus network that complies with the commercial interface standard IEEE 1394. Since application-specific techniques are an effective strategy for reducing fault tolerance cost, we exploit the characteristics of our target system and application. To ensure low development cost, we take advantage of inherent system resource redundancies as the means of fault tolerance. © 2000 IEEE.

关键词： computer architecture computer interfaces Costs Fault tolerance Fault tolerant systems Microcontrollers Middleware performance loss Redundancy Space vehicles

来源：评论

学校读者我要写书评

暂无评论

Interconnect-centric computing

Interconnect-centric computing

引用

2007 IEEE 13th International symposium on high performance computer architecture, HPCA-13

作者： Dally, William J. Department of Computer Science Stanford University Department of Engineering IEEE ACM

ISBN: (纸本)1424408059

As we enter the many-core era, the interconnection networks of a computer system, rather than the processor or memory modules, will dominate its performance. Several recent developments in interconnection network architecture including global adaptive routing, high-radix routers, and technology-matched topologies offer large improvements in the performance and efficiency of this critical component. the implementation of a portion of several interconnection networks on multi-core chips also raises new opportunities and challenges for network design. this talk explores the role of interconnection networks in modern computer systems, recent developments in network architecture and design, and the challenges of on-chip interconnection networks. Examples will be drawn from several systems including the Cray BlackWidow. © 2007 IEEE.

关键词： Large scale systems

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共233页 << < 47 48 49 50 51 52 53 54 55 56 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：