The effects of controlling granularity and the growth of parallelism at runtime in executing automatically parallelized programs are addressed. The authors version-switch method allows the runtime system to dynamicall...
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The effects of controlling granularity and the growth of parallelism at runtime in executing automatically parallelized programs are addressed. The authors version-switch method allows the runtime system to dynamically choose the appropriate version of codes for execution in order to achieve better performance. The decision when to switch version is shown to be critical to the effectiveness of the method. A framework is built to study how to estimate the current work load for deciding when to switch versions. Four different control schemes based on local or global estimation of workload have been implemented in the runtime system. Their results are compared and discussed in detail.< >
A synergistic approach utilizing compilation, compaction, and parallelization is described to achieve real-time computing throughput from rule-based expert systems. The methodology involves synthesizing a set of concu...
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A synergistic approach utilizing compilation, compaction, and parallelization is described to achieve real-time computing throughput from rule-based expert systems. The methodology involves synthesizing a set of concurrently executable Ada tasks from a knowledge base of rules. Compaction of code size is accomplished by eliminating the overhead associated with inference engine control constructs not utilized by a particular knowledge base. Heuristics are used to customize the generated Ada code for optimum performance gains given the characteristics of the source knowledge base and the target processor. The effectiveness of this approach depends on both the characteristics of the knowledge base and the efficiency of the Ada compiler's task invocation mechanism. A prototype compilation system based on this multifaceted approach has demonstrated speedups in excess of 100* for certain knowledge bases, as well as additional benefits in terms of increased embeddability and maintainability of the knowledge base.< >
A parallel architecture to support an associative system for image classification is presented. The recognition principle exploits the noise-insensitivity and content-addressability of associative memories to achieve ...
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A parallel architecture to support an associative system for image classification is presented. The recognition principle exploits the noise-insensitivity and content-addressability of associative memories to achieve robust classification in image processing; in addition, the implementation on a transputer-based architecture makes it possible at attain high structural flexibility, at relatively low machinery cost. After defining the basic associative-classification mechanism, the parallel structure is described. The resulting system proves quite fast and inexpensive, hence applications to real-time environments become feasible. Structural flexibility allows easy modifications to the system to tailor it to different application domains. The efficiency of the proposed architecture is evidenced by experimental results obtained in a real image-classification domain.< >
Summary form only given. The overall architecture of NETMATE is the following. Observation and Control Points (OCPs) are supported via managing agents placed in networked devices. These agents can monitor local device...
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Summary form only given. The overall architecture of NETMATE is the following. Observation and Control Points (OCPs) are supported via managing agents placed in networked devices. These agents can monitor local device behaviors and affect device control functions, when instructed by a manager. Managers communicate observation/control requests to agents via a manager-agent protocol. Two protocol standards are currently evolving: SNMP, used to manage Internets, and CMIP, proposed by OSI. The NETMATE manager is centered around a network Modeler database. The role of the modeler is to maintain a network Management Information Base (MIB) and provide active access services to dynamic operational network data. The manager presents network status data to users in a visual form. Users can navigate within a very large and complex network data space and control complex behaviors in a simple visual form. Finally, a collection of interpretation and diagnosis tools is used to analyze observed data, and automatically identify/classify fault conditions. The authors briefly describe the key problem domains for long term NETMATE research efforts.< >
Increasing use of hypercube systems in reliability-critical applications has made fault-tolerant communication algorithms for hypercube important. This paper describes four fault-tolerant routing algorithms for hyperc...
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Increasing use of hypercube systems in reliability-critical applications has made fault-tolerant communication algorithms for hypercube important. This paper describes four fault-tolerant routing algorithms for hypercubes subject to link failures, namely any/sub -/nd, sidewalk, lookahead and lookside. The principle of sidewalk and lookahead are similar to two existing approaches. Lookside is an improved version of either of them. Sidewalk, lookahead and lookside guarantee successful routing in a d-cube if the number of link failures is less than d. For higher degree of link failures, the authors measure their performance by probability of successful routing and expected routing distance using two fault distribution models, probability fault model and random fault model. Lookside demonstrates better properties than sidewalk and lookahead in that it has the highest successful routing rate with reasonable routing distance.< >
Many solutions have been proposed to the problem of multiprogramming a multiprocessor. However, each has limited applicability or fails to address an important source of overhead. In addition, there has been little ex...
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Many solutions have been proposed to the problem of multiprogramming a multiprocessor. However, each has limited applicability or fails to address an important source of overhead. In addition, there has been little experimental comparison of the various solutions in the presence of applications with varying degrees of parallelism and synchronization. The authors explore the tradeoffs between three different approaches to multiprogramming a multiprocessor: time-slicing, coscheduling, and dynamic hardware partitions. They implemented applications that vary in the degree of parallelism, and the frequency and type of synchronization. They show that in most cases coscheduling is preferable to time-slicing. They also show that although there are cases where coscheduling is beneficial, dynamic hardware partitions do no worse, and will often do better. They conclude that under most circumstances, hardware partitioning is the best strategy for multiprogramming a multiprocessor, no matter how much parallelism applications employ or how frequently synchronization occurs.< >
A database concurrency control object called ROLL (request order linked list), which is a linked list of bit vectors, is introduced together with three simple operations available to transactions: POST, CHECK and RELE...
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A database concurrency control object called ROLL (request order linked list), which is a linked list of bit vectors, is introduced together with three simple operations available to transactions: POST, CHECK and RELEASE. POST is used to establish serialization order. CHECK is used to determine current resource availability. RELEASE is used to relinquish resources. ROLL is based on the serialization graph testing method, but no system scheduler module is involved. Using ROLL, waiting, restarting, deadlock and livelock are minimized and almost all operations can be invoked in parallel by individual transaction manager modules. The ROLL object, performance, problems and desirable extensions are discussed.< >
Summary form only given. The Datacycle database architecture is based on repetitive broadcast of database contents over high bandwidth channels and on-the-fly filtering of database contents to extract records of inter...
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Summary form only given. The Datacycle database architecture is based on repetitive broadcast of database contents over high bandwidth channels and on-the-fly filtering of database contents to extract records of interest. These two mechanisms-high speed broadcast and on-the-fly filtering-result in a system that achieves the goals of high performance transaction processing, a powerful and flexible query capability, and high levels of concurrent access to a single database by multiple applications. The prototype system comprises multiple pump boards, each of which stores up to 128 Mbytes of database contents, and multiple access manager boards, each of which contains three on-board VLSI data filter chips. Each VLSI filter executes queries against the contents of a 53 Mbyte/second broadcast channel; selected records and/or computed aggregate values are returned to the host application.< >
The impact of transaction scheduling in the shared-nothing type of architecture is studied. An abstract model of the shared-nothing type of architecture is used. Four transaction scheduling policies are considered. Th...
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The impact of transaction scheduling in the shared-nothing type of architecture is studied. An abstract model of the shared-nothing type of architecture is used. Four transaction scheduling policies are considered. These policies can be broadly divided into two classes: policies that work independent of the current system state and policies that use the current system state information. The authors consider two policies belonging to each category-one policy works independent of the transaction characteristics and the other policy requires transaction size information. The results, obtained via simulation, indicate that system-state-dependent policies provide substantial performance advantages over the other group of policies.< >
The authors discuss printed circuit board (PCB) manufacturing design rule checking (MDRC) in combination with the path optimizing of the assembly process in a heterogeneous, distributed, and networked information syst...
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The authors discuss printed circuit board (PCB) manufacturing design rule checking (MDRC) in combination with the path optimizing of the assembly process in a heterogeneous, distributed, and networked information system environment linked with databases in a defined factory infrastructure. An increase in the degree of automation requires greater continuity of information flow starting with the customer order through to the sensor and actuator layer of manufacturing machinery. After the presentation of information infrastructure models such as the hierarchical production control system and the Y-model, the manufacturing design system (MDS) for the production preparation environment is derived which contains also the manufacturing design rule checking and path optimizing applicable to the PCB assembly process. In particular, the linkage between the design rule checking and the path optimizing process via the hierarchical two-phase cross-linked unit formation method based on technical and strategic characteristics is considered. The assembly process of a PCB with different components is cited as an example. The software package is written in the artificial-language Common LISP with the dialect SCHEME.< >
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