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检索条件"任意字段=Proceedings International Symposium on Databases in Parallel and Distributed Systems"

共 4889 条记录，以下是541-550 订阅

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Using Physical Stigmergy in Decentralized Optimization Under Multiple Non-separable Constraints: Formal Methods and an Intelligent Lighting Example 28

Using Physical Stigmergy in Decentralized Optimization Under...

引用

28th IEEE international parallel & distributed Processing symposium Workshops (IPDPSW)

作者： Pavlic, Theodore P. Arizona State Univ Sch Life Sci Tempe AZ 85287 USA

ISBN: (纸本)9781479941162

In this paper, a distributed asynchronous algorithm for intelligent lighting is presented that minimizes collective power use while meeting multiple user lighting constraints simultaneously and requires very little communication among agents participating in the distributed computation. Consequently, the approach is arbitrarily scalable, adapts to exogenous disturbances, and is robust to failures of individual agents. This algorithm is an example of a decentralized primal-space algorithm for constrained non-linear optimization that achieves coordination between agents using stigmergic memory cues present in the physical system as opposed to explicit communication and synchronization. Not only does this work make of stigmergy, a property first used to describe decentralized decision making in eusocial insects, but details of the algorithm are inspired by classic social foraging theory and more recent results in eusocial-insect macronutrient regulation. This theoretical analysis in this paper guarantees that the decentralized stigmergically coupled system converges to within a finite neighborhood of the optimal resource allocation. These results are validated using a hardware implementation of the algorithm in a small-scale intelligent lighting scenario. There are other real-time distributed resource allocation applications that are amenable to these methods, like distributed power generation;in general, this paper means to provide proof of concept that physical variables in cyberphysical systems can be leveraged to reduce the communication burden of algorithms.

关键词： Optimization algorithms Resource allocation Pareto optimality Constrained optimization Intelligent lighting Bioinspiration Agents and autonomous systems Decentralized control distributed optimization Stigmergy

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Compactor : Optimization Framework at Staging I/O nodes 28

Compactor : Optimization Framework at Staging I/O nodes

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28th IEEE international parallel & distributed Processing symposium Workshops (IPDPSW)

作者： Venkatesan, Vishwanath Chaarawi, Mohamad Koziol, Quincey Gabriel, Edgar Univ Houston Dept Comp Sci Houston TX 77204 USA HDF Grp Champaign IL USA

ISBN: (纸本)9781479941162

Data-intensive applications are largely influenced by I/O performance on HPC systems and the scalability of such applications to exascale primarily depends on the scalability of the I/O performance on HPC systems in the future. To mitigate the I/O performance, recent HPC systems make use of staging nodes to delegate I/O requests and in-situ data analysis. In this paper, we present the Compactor framework and also present three optimizations to improve I/O performance at the data staging nodes. The first optimization performs collective buffering across requests from multiple processes. In the second optimization, we present a way to steal writes to service read request at the staging node. Finally, we also provide a way to "morph" write requests from the same process. All optimizations were implemented as a part of the Exascale FastForward I/O stack. We evaluated the optimizations over a PVFS2 file system using a micro-benchmark and Flash I/O benchmark. Our results indicate significant performance benefits with our framework. In the best case the compactor is able to provide up to 70% improvement in performance.

关键词： parallel I/O Staging I/O Optimizations Exascale FastForward I/O

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HPDC 2014 - proceedings of the 23rd international symposium on High-Performance parallel and distributed Computing

HPDC 2014 - Proceedings of the 23rd International Symposium ...

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23rd ACM symposium on High-Performance parallel and distributed Computing, HPDC 2014

ISBN: (纸本)9781450327480

The proceedings contain 34 papers. The topics discussed include: Snapify: capturing snapshots of offload applications on Xeon Phi Manycore processors;transparent checkpoint-restart over infiniband;ConCORD easily exploiting memory content redundancy through the content-aware service command;FT-ScaLAPACK: correcting soft errors on-line for ScaLAPACK Cholesky, QR, and LU factorization routines;CMCP: a novel page replacement policy for system level hierarchical memory management on many-cores;TOP-PIM: throughput-oriented programmable processing in memory;improving energy efficiency of embedded DRAM caches for high-end computing systems;OpenARC: open accelerator research compiler for directive-based, efficient heterogeneous computing;MIC-Check: a distributed checkpointing framework for the Intel many integrated cores architecture;efficient task placement and routing of nearest neighbor exchanges in dragonfly networks;and design and evaluation of the GeMTC framework for GPU-enabled many-task computing.

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A Stream Processing Framework for On-line Optimization of Performance and Energy Efficiency on Heterogeneous systems 28

A Stream Processing Framework for On-line Optimization of Pe...

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28th IEEE international parallel & distributed Processing symposium Workshops (IPDPSW)

作者： Ranft, Benjamin Denninger, Oliver Pfaffe, Philip FZI Res Ctr Informat Technol D-76131 Karlsruhe Germany Karlsruhe Inst Technol D-76131 Karlsruhe Germany

ISBN: (纸本)9781479941162

Modern processors have the potential of executing compute-intensive programs quickly and efficiently, but require applications to be adapted to their ever increasing parallelism. Here, heterogeneous systems add complexity by combining processing units with different characteristics. Scheduling should thus consider the performance of each processor as well as competing workloads and varying inputs. To assist programmers of stream processing applications in facing this challenge we present libHawaii, an open source library for cooperatively using all processors of heterogeneous systems easily and efficiently. It supports exploiting data flow, data element and task parallelism via pipelining, partitioning and demand-based allocation of consecutive work items. Scheduling is automatically adapted on-line to continuously optimize performance and energy efficiency. Our C++ library does not depend on specific hardware architectures or parallel computing frameworks. However, it facilitates maximizing the throughput of compatible GPUs by overlapping computations and memory transfers while maintaining low latencies. This paper describes the algorithms and implementation of libHawaii and demonstrates its usage on existing applications. We experimentally evaluate our library using two examples: General matrix multiplication (GEMM) is a simple yet important building block of many high-performance computing applications. Complementarily, the detection, extraction and matching of sparse image features exhibits greater complexity, including indeterministic memory access and synchronization.

关键词： heterogeneous computing stream processing load balancing energy efficiency real-time parallel programming

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Fast Time-parallel C-based Event-Driven RTL Simulation 17

Fast Time-Parallel C-based Event-Driven RTL Simulation

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IEEE 17th international symposium on Design and Diagnostics of Electronic Circuits and systems (DDECS)

作者： Ahmad, Tariq Bashir Ciesielski, Maciej Univ Massachusetts ECE Dept Amherst MA 01003 USA

ISBN: (纸本)9781479945580

Simulation of the RTL model is one of the first and mandatory steps of the design verification flow. Such a simulation needs to be repeated often due to the changing nature of the design in its early development stages and after consecutive bug fixing. Despite its relatively high level of abstraction, RTL simulation is a very time consuming process, often requiring nightly or week-long regression runs. In this work, we propose an original approach to accelerating RTL simulation that leverages parallelism offered by multi-core machines. However, in contrast to traditional, parallel distributed RTL simulation, the proposed method accelerates RTL simulation in temporal domain by dividing the entire simulation run into independent simulation slices, each to be run on a separate core. It is combined with fast simulation model at ESL level that provides the required initial state for each independent simulation slice. The paper describes the basic idea of the method and provides some initial experimental results showing its effectiveness in improving RTL simulation performance in an automated way.

关键词： Simulation Verfication RTL Verilog ESL C SystemC Testbench

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A Hybrid parallel Tridiagonal Solver on Multi-core Architectures 28

A Hybrid Parallel Tridiagonal Solver on Multi-core Architect...

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28th IEEE international parallel & distributed Processing symposium Workshops (IPDPSW)

作者： Tang, Guangping Li, Kenli Li, Keqin Chen, Hang Du, Jiayi Hunan Univ Coll Informat Sci & Engn Changsha 410082 Hunan Peoples R China State Univ New York New Paltz Dept Comp Sci New Paltz NY 12561 USA

ISBN: (纸本)9781479941162

An optimized parallel algorithm is proposed to solve the problem occurred in the process of complicated backward substitution of cyclic reduction during solving tridiagonal linear systems. Adopting a hybrid parallel model, this algorithm combines the cyclic reduction method and the partition method. This hybrid algorithm has simple backward substitution on parallel computers comparing with the cyclic reduction method. In this paper, the operation count and execution time are obtained to evaluate and make comparison for these methods. On the basis of results of these measured parameters, the hybrid algorithm using the hybrid approach with a multi-threading implementation achieves better efficiency than the other parallel methods, i.e., the cyclic reduction and the partition methods. Among them, the cyclic reduction method is previously found to be the fastest algorithm in many ways for solutions. In particular, the approach involved in this paper has the least scalar operation count and the shortest execution time on multi-core computer when the size of an equation is large enough. The hybrid parallel algorithm improves the performance of the cyclic reduction and partition methods by 30% and 20% respectively.

关键词： parallel tridiagonal hybrid algorithm multi-threading

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On the scheduling of fork-join parallel/distributed real-time tasks

On the scheduling of fork-join parallel/distributed real-tim...

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9th IEEE international symposium on Industrial Embedded systems, SIES 2014

作者： Garibay-Martinez, Ricardo Nelissen, Geoffrey Lino Ferreira, Luis Pinho, Luis Miguel CISTER/INESC-TEC ISEP Polytechnic Institute of Porto Portugal

ISBN: (纸本)9781479940233

Modern real-time embedded applications present high computation requirements which need to be realized within strict time constraints. The current trend towards parallel processing in the embedded domain allows providing higher processing power. However, in some embedded applications, the use of powerful enough multi-core processors, may not be possible due to energy, space or cost constraints. A solution for this problem is to extend the parallel execution of the applications, allowing them to distribute their workload among networked nodes, on peak situations, to remote neighbour nodes in the system. In this context, we present the Partitioned-distributed-Deadline Monotonic Scheduling algorithm for fork-join parallel/distributed fixed-priority tasks. We study the problem of scheduling fork-join tasks that execute in a distributed system, where the inherent transmission delay of tasks must be considered and cannot be deemed negligible, as in the case of multicore systems. Our scheduling algorithm is shown to have a resource augmentation bound of 4, which implies that any task set that is feasible on m unit-speed processors and a single shared real-time network, can be scheduled by our algorithm on m processors and a single real-time network that are 4 times faster. We confirm through simulations our analytical results. © 2014 IEEE.

关键词： Scheduling algorithms

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Searching for the Optimal Data Partitioning Shape for parallel Matrix Matrix Multiplication on 3 Heterogenous Processors 28

Searching for the Optimal Data Partitioning Shape for Parall...

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28th IEEE international parallel & distributed Processing symposium Workshops (IPDPSW)

作者： DeFlumere, Ashley Lastovetsky, Alexey Univ Coll Dublin Sch Comp Sci & Informat Dublin 4 Ireland

ISBN: (纸本)9781479941162

parallel Matrix-Matrix Multiplication (MMM) is a fundamental part of the linear algebra libraries used by scientific applications on high performance computers. As heterogeneous systems have emerged as high performance computing platforms, the traditional homogeneous algorithms have been adapted to these heterogeneous environments. Although heterogeneous systems have been in use for some time, it remains an open problem of how to optimally partition data on heterogeneous processors to minimize computation, communication, and execution time. While the question of how to subdivide these MMM problems among heterogeneous processors has been studied, the underlying assumption of this prior study is that the data partition shape, the layout of the data within the matrix assigned to each processor, should be rectangular, i.e. that each processor should be assigned a rectangular portion of the matrix to compute. Our previous work in this area questioned the optimality of this traditional rectangular shape and studied this partition shape problem for two processors. In that work, we proposed a novel mathematical method for transforming partition shapes to decrease communication cost and an analytical technique for determining the optimal shape. In this work, we extend this technique to apply to three and more heterogeneous processors. While applying this method to two processors is relatively straightforward, the complexity grows immensely when considering three processors. With this complexity in mind, we propose a hybrid of experimental and analytical techniques. We postulate that a small number of partition shapes are potentially optimal, and perform extensive testing using a computer aided method to apply our previously developed analytical technique, without finding a counter example. We identified six data partition shapes which are candidates to be the optimal three processor shape.

关键词： parallel Matrix Multiplication Matrix Partitioning Heterogeneous Computing High Performance Computing

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ISPASS 2014 - IEEE international symposium on Performance Analysis of systems and Software

ISPASS 2014 - IEEE International Symposium on Performance An...

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2014 IEEE international symposium on Performance Analysis of systems and Software, ISPASS 2014

ISBN: (纸本)9781479936052

The proceedings contain 31 papers. The topics discussed include: BarrierPoint: sampled simulation of multi-threaded applications;exploiting spatial architectures for edit distance algorithms;a top-down method for performance analysis and counters architecture;Moby: a mobile benchmark suite for architectural simulators;optimized hardware for suboptimal software: the case for SIMD-aware benchmarks;extending statistical cache models to support detailed pipeline simulators;manifold: a parallel simulation framework for multicore systems;prime: a parallel and distributed simulator for thousand-core chips;steps towards wider use of concurrency code patterns;power modeling and other new features in the graphite simulator;evaluating trace aggregation for performance visualization of large distributed systems;reverse engineering of cache replacement policies in Intel microprocessors and their evaluation;and a software based profiling method for obtaining speedup stacks on commodity multi-cores.

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Scalable System Environment Caching and Sharing for distributed Virtual Machines 28

Scalable System Environment Caching and Sharing for Distribu...

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28th IEEE international parallel & distributed Processing symposium Workshops (IPDPSW)

作者： Long, Teng Yoon, Ilchul Sussman, Alan Porter, Adam Memon, Atif Univ Maryland Dept Comp Sci College Pk MD 20742 USA State Univ New York Dept Comp Sci Incheon South Korea

ISBN: (纸本)9781479941162

Virtual machines have become very widely used in many software development communities. Developers can conveniently provision specific machine configurations using VMs, and those VMs can contain operating systems, libraries, and other applications required to build and execute their software under development. However, the size of full VM images and network bandwidth limitations makes large-scale reuse of VMs among distributed groups of developers extremely difficult. In this paper we address the problem of provisioning software configurations realized as virtual machine images rapidly and incrementally from a set of pristine VM states, by caching and sharing configuration fragments between developer groups. We first formally model the entire configuration space that might be cached and shared between groups, describe the design of our infrastructure to incrementally provision configurations from its fragments, and finally evaluate the performance of our approach with an example scenario common in software testing. Our experimental results show that our approach can help developers reduce the time and resource requirements for provisioning software configurations.

关键词： Software testing

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