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检索条件"任意字段=Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization"

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Microarchitecture sensitive empirical models for compiler optimizations 07

Microarchitecture sensitive empirical models for compiler op...

引用

5th international symposium on code generation and optimization

作者： Vaswani, Kapil Thazhuthaveetil, Matthew J. Srikant, Y. N. Joseph, P. J. Indian Inst Sci Bangalore Karnataka India Freescale Bangalore Karnataka India

ISBN: (纸本)9780769527642

This paper proposes the use of empirical modeling techniques for building microarchitecture sensitive models for compiler optimizations. The models we build relate program performance to settings of compiler optimization flags, associated heuristics and key microarchitectural parameters. Unlike traditional analytical modeling methods, this relationship is learned entirely from data obtained by measuring performance at a small number of carefully selected compiler/microarchitecture configurations. We evaluate three different learning techniques in this context viz. linear regression, adaptive regression splines and radial basis function networks. We use the generated models to a) predict program performance at arbitrary compiler/microarchitecture configurations, b) quantify the significance of complex interactions between optimizations and the microarchitecture, and c) efficiently search for 'optimal' settings of optimization flags and heuristics for any given microarchitectural configuration. Our evaluation using benchmarks from the SPEC CPU2000 suits suggests that accurate models (< 5% average error in prediction) can be generated using a reasonable number of simulations. We also find that using compiler settings prescribed by a model-based search can improve program performance by as much as 19% (with an average of 9.5%) over highly optimized binaries.

关键词： Microarchitecture Optimizing compilers Predictive models Hardware Program processors Analytical models Design optimization Performance analysis Prefetching Buildings

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international symposium on code generation and optimization: CGO 2005

International symposium on Code Generation and Optimization:...

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international symposium oncode generation and optimization, CGO 2005

ISBN: (纸本)076952298X

The proceedings contain 28 papers. The topics discussed include: context threading: a flexible and efficient dispatch technique;compile-time concurrent marking write barrier removal;performance of runtime optimization on BLAST;optimizing sorting with genetic algorithms;SWIFT: software implemented fault tolerance;building intrusion-tolerant secure software;a progressive register allocator for irregular architectures;practical and accurate low-level pointer analysis;reactive techniques for controlling software speculation;a model-based framework: an approach for profit-driven optimization;and sentinel PRE: hoisting beyond exception dependency with dynamic deoptimization.

关键词： Program compilers

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Dynamic profiling and trace cache generation

Dynamic profiling and trace cache generation

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international symposium on code generation and optimization

作者： Berndl, M Hendren, L McGill Univ Sch Comp Sci Sable Res Grp Montreal PQ H3A 2T5 Canada

ISBN: (纸本)076951913X

Dynamic program optimization is increasingly important for achieving good runtime performance. A key issue is how to select which code to optimize. One approach is to dynamically detect traces, long sequences of instructions spanning multiple methods, which are likely to execute to completion. Traces are easy to optimize and have been shown to be a good unit for optimization. This paper reports on a new approach for dynamically detecting, creating and storing traces in a Java virtual machine. We first describe four important criteria for a successful trace strategy: good instruction stream coverage, low dispatch rate, cache stability, and optimizability of traces. We then present our approach based on branch correlation graphs. A branch correlation graph stores information about the correlation between pairs of branches, as well as additional state information. We present the complete design for an efficient implementation of the system, including a detailed discussion of the trace cache and profiling mechanisms. We have implemented an experimental framework to measure the traces generated by our approach in a direct-threaded Java VM (SableVM) and we present experimental results to show that the traces we generate meet the design criteria.

关键词： Computer science Design optimization Java Magnetohydrodynamic power generation optimization methods Optimizing compilers Power generation Runtime Stability criteria Virtual machining

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Retargetable and reconfigurable software dynamic translation

Retargetable and reconfigurable software dynamic translation

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international symposium on code generation and optimization

作者： Scott, K Kumar, N Velusamy, S Childers, B Davidson, JW Soffa, ML Univ Virginia Dept Comp Sci Charlottesville VA 22903 USA

ISBN: (纸本)076951913X

Software dynamic translation (SDT) is a technology that permits the modification of an executing program's instructions. In recent years, SDT has received increased attention, from both industry and academia, as a feasible and effective approach to solving a variety of significant problems. Despite this increased attention, the task of initiating a new project in software dynamic translation remains a difficult one. To address this concern, and in particular to promote the adoption of SDT technology into an even wider range of applications, we have implemented Strata, a cross-platform infrastructure for building software dynamic translators. This paper describes Strata's architecture, our experience retargeting it to three different processors, and our use of Strata to build two novel SDT systems-one for safe execution of untrusted binaries and one for fast prototyping of architectural simulators.

关键词： Buildings code standards Computer architecture Computer science Design optimization Emulation Monitoring Programming Switches Virtual manufacturing

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Dynamic Interpretation for Dynamic Scripting Languages

Dynamic Interpretation for Dynamic Scripting Languages

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8th international symposium on code generation and optimization

作者： Williams, Kevin McCandless, Jason Gregg, David Trinity Coll Dublin Dublin Ireland

ISBN: (纸本)9781605586359

Dynamic scripting languages offer programmers increased flexibility by allowing properties of programs to be defined at run-time. Typically, program execution begins with an interpreter where type checks are implemented using conditional statements. Recent JIT compilers have begun removing run-time checks by specializing native code to program properties discovered at JIT time. This paper presents a novel intermediate representation for scripting languages that explicitly encodes types of variables. The dynamic representation is a flow graph, where each node is a specialized virtual instruction and each edge directs program flow based on control and type changes in the program. The interpreter thus performs specialized execution of whole programs. We present techniques for the efficient interpretation of our representation showing speed-ups of greater than 2x over static interpretation, with an average speed-up of approximately 1.3x.

关键词： Interpreter optimization Type Specialization Dynamic Languages

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Continuous Shape Shifting: Enabling Loop Co-optimization via Near-Free Dynamic code Rewriting 49

Continuous Shape Shifting: Enabling Loop Co-optimization via...

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49th annual ieee/acm international symposium on Microarchitecture (MICRO)

作者： Jain, Animesh Laurenzano, Michael A. Tang, Lingjia Mars, Jason Univ Michigan Ann Arbor MI 48109 USA

ISBN: (纸本)9781509035083

The class of optimizations characterized by manipulating a loop's interaction space for improved cache locality and reuse (i.e, cache tiling / blocking / strip mine and interchange) are static optimizations requiring a priori information about the microarchitectural and runtime environment of an application binary. However, particularly in datacenter environments, deployed applications face numerous dynamic environments over their lifetimes. As a result, this class of optimizations can result in sub-optimal performance due to the inability to flexibly adapt iteration spaces as cache conditions change at runtime. This paper introduces continuous shape shifiting, a compilation approach that removes the risks of cache tiling optimizations by dynamically rewriting (and reshaping) deployed, running application code. To realize continuous shape shifting, we present ShapeShifter, a framework for continuous monitoring of co-running applications and their runtime environments to reshape loop iteration spaces and pinpoint near-optimal loop tile configurations. Upon identifying a need for reshaping, a new tiling approach is quickly constructed for the application, new code is dynamically generated and is then seamlessly stitched into the running application with near-zero overhead. Our evaluation on a wide spectrum of runtime scenarios demonstrates that ShapeShifter achieves an average of 10-40% performance improvement (up to 2.4x) on real systems depending on the runtime environment compared to an oracle static loop tiling baseline.

关键词： codes (symbols)

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A self-repairing prefetcher in an event-driven dynamic optimization framework 06

A self-repairing prefetcher in an event-driven dynamic optim...

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4th international symposium on code generation and optimization

作者： Zhang, Weifeng Calder, Brad Tullsen, Dean M. Univ Calif San Diego Dept Comp Sci & Engn San Diego CA 92103 USA

ISBN: (纸本)0769524990

Software prefetching has been demonstrated as a powerful technique to tolerate long load latencies. However to be effective, prefetching must target the most critical (frequently missing) loads, and prefetch them sufficiently far in advance. This is difficult to do correctly with a static optimizer because locality characteristics and cache latencies vary across data inputs and across different machines. This paper presents a mechanism that dynamically inserts prefetch instructions into frequently executed hot traces. Hot traces are dynamically analyzed to identify delinquent loads and the appropriate prefetch distance for those loads. Those prefetches are then inserted into the hot trace. The low overhead of the event-driven dynamic optimization system allows the optimizer to continuously monitor the performance of the software prefetches. This is done to find an accurate and stable prefetch distance and to adapt to changes in program behavior using what we call Self-Repairing prefetching. Relative to the baseline hardware stride prefetching, we find a total 23% improvement when we use the self-repairing mechanism to adaptively discover the best prefetch distance for each load, which is 12% better performance than dynamic prefetching techniques without adaptive repairing.

关键词： Prefetching Delay Hardware Yarn Monitoring Software performance Computer science Power engineering and energy Bridges Computer architecture

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Time Squeezing for Tiny Devices 19

Time Squeezing for Tiny Devices

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46th international symposium on Computer Architecture (ISCA) / Workshop on Computer Architecture Education (WCAE)

作者： Fan, Yuanbo Campanoni, Simone Joseph, Russ NVIDIA Santa Clara CA 95051 USA Northwestern Univ Evanston IL 60208 USA

ISBN: (纸本)9781450366694

Dynamic timing slack has emerged as a compelling opportunity for eliminating inefficiency in ultra-low power embedded systems. This slack arises when all the signals have propagated through logic paths well in advance of the clock signal. When it is properly identified, the system can exploit this unused cycle time for energy savings. In this paper, we describe compiler and architecture co-design that opens new opportunities for timing slack that are otherwise impossible. Through cross-layer optimization, we introduce novel mechanisms in the hardware and in the compiler that work together to improve the benefit of circuit-level timing speculation by effectively squeezing time during execution. This approach is particularly well-suited to tiny embedded devices. Our evaluation on a gate-level model of a complete processor shows that our co-design saves (on average) 40.5% of the original energy consumption (additional 16.5% compared to the existing clock scheduling technique) across 13 workloads while retaining transparency to developers.

关键词： code generation timing speculation timing slack

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Lightweight feedback-directed cross-module optimization

Lightweight feedback-directed cross-module optimization

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8th international symposium on code generation and optimization, CGO 2010

作者： Li, David Xinliang Ashok, Raksit Hundt, Robert Google 1600 Amphitheatre Parkway Mountain View CA 94043 United States

ISBN: (纸本)9781605586359

Cross-module inter-procedural compiler optimization (IPO) and Feedback-Directed optimization (FDO) are two important compiler techniques delivering solid performance gains. The combination of IPO and FDO delivers peak performance, but also multiplies both techniques' usability problems. In this paper, we present LIPO, a novel static IPO framework, which integrates IPO and FDO. Compared to existing approaches, LIPO no longer requires writing of the compiler's intermediate representation, eliminates the link-time inter-procedural optimization phase entirely, and minimizes code re-generation overhead, thus improving scalability by an order of magnitude. Compared to an FDO baseline, and without further specific tuning, LIPO improves performance of SPEC2006 INT by 2.5%, and of SPEC2000 INT by 4.4%, with up to 23% for one benchmarks. We confirm our scalability results on a set of large industrial applications, demonstrating 2.9% performance improvements on average. Compile time overhead for full builds is less than 30%, incremental builds take a few seconds on average, and storage requirements increase by only 24%, all compared to the FDO baseline. © 2010 acm.

关键词： Scalability

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generational cache management of code traces in dynamic optimization systems 36

Generational cache management of code traces in dynamic opti...

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36th international symposium on Microarchitecture

作者： Hazelwood, K Smith, MD Harvard Univ Div Engn & Appl Sci Cambridge MA 02138 USA

ISBN: (纸本)076952043X

A dynamic optimizer is a runtime software system that groups a program's instruction sequences into traces, optimizes those traces, stores the optimized traces in a software-based code cache, and then executes the optimized code in the code cache. To maximize performance, the vast majority of the program's execution should occur in the code cache and not in the different aspects of the dynamic optimization system. In the past, designers of dynamic optimizers have used the SPEC2000 benchmark suite to justify their use of simple code cache management schemes. In this paper we show that the problem and importance of code cache management changes dramatically as we move from SPEC2000, with its relatively small number of dynamically generated code traces, to large interactive Windows applications. We also propose and evaluate a new cache management algorithm based on generational code caches that results in an average miss rate reduction of 18% over a unified cache, which translates into 19% fewer instructions spent in the dynamic optimizer The algorithm categorizes code traces based on their expected lifetimes and groups traces with similar lifetimes together in separate storage areas. Using this algorithm, short-lived code traces can easily be removed from a code cache without introducing fragmentation and without suffering the performance penalties associated with evicting long-lived code traces.

关键词： Design optimization Dynamic range Microarchitecture Phase detection Runtime Software systems

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