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OpenCilk: A Modular and Extensible Software Infrastructure for Fast Task-parallel Code 23

OpenCilk: A Modular and Extensible Software Infrastructure f...

引用

28th acm sigplan Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Schardl, Tao B. Lee, I.-Ting Angelina MIT CSAIL United States Washington University St. Louis United States

ISBN: (纸本)9798400700156

this paper presents OpenCilk, an open-source software infrastructure for task-parallel programming that allows for substantial code reuse and easy exploration of design choices in language abstraction, compilation strategy, runtime mechanism, and productivity-tool development. the OpenCilk infrastructure consists of three main components: a compiler designed to compile fork-join task-parallel code, an efficient work-stealing runtime scheduler, and a productivity-tool development framework based on compiler instrumentation designed for fork-join parallel computations. OpenCilk is modular - modifying one component for the most part does not necessitate modifications to the other components - and easy to extend - its construction naturally encourages code reuse. Despite being modular and easy to extend, OpenCilk produces high-performing code. We investigated OpenCilk's modularity, extensibility, and performance through several case studies, including a study to extend OpenCilk to support multiple parallel runtime systems, including Cilk Plus, OpenMP, and oneTBB. OpenCilk's design enables rapid prototyping of new compiler back ends to target different parallel-runtime ABIs. Each back end required fewer than 2000 new lines of code. We examined the OpenCilk runtime's performance empirically on 15 benchmark Cilk programs and found that it outperforms the other runtimes by a geometric mean of 4% - 26% on 1 core and 10% - 120% on 48 cores. © 2023 Owner/Author.

关键词： parallel programming

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Multi-Queues Can Be State-of-the-Art Priority Schedulers 22

Multi-Queues Can Be State-of-the-Art Priority Schedulers

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27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Postnikova, Anastasiia Koval, Nikita Nadiradze, Giorgi Alistarh, Dan ITMO Univ St Petersburg Russia JetBrains Prague Czech Republic IST Austria Klosterneuburg Austria

ISBN: (纸本)9781450392044

Designing and implementing efficient parallel priority schedulers is an active research area. An intriguing proposed design is the Multi-Queue: given n threads and m >= n distinct priority queues, task insertions are performed uniformly at random, while, to delete, a thread picks two queues uniformly at random, and removes the observed task of higher priority. this approach scales well, and has probabilistic rank guarantees: roughly, the rank of each task removed, relative to remaining tasks in all other queues, is O(m) in expectation. Yet, the performance of this pattern is below that of well-engineered schedulers, which eschew theoretical guarantees for practical efficiency. We investigate whether it is possible to design and implement a Multi-Queue-based task scheduler that is both highly-efficient and has analytical guarantees. We propose a new variant called the Stealing Multi-Queue (SMQ), a cache-efficient variant of the Multi-Queue, which leverages both queue affinity-each thread has a local queue, from which tasks are usually removed;but, with some probability, threads also attempt to steal higher-priority tasks from the other queues-and task batching, that is, the processing of several tasks in a single insert / remove step. these ideas are well-known for task scheduling without priorities;our theoretical contribution is showing that, despite relaxations, this design can still provide rank guarantees, which in turn implies bounds on total work performed. We provide a general SMQ implementation which can surpass state-of-the-art schedulers such as OBIM and PMOD in terms of performance on popular graph-processing benchmarks. Notably, the performance improvement comes mainly from the superior rank guarantees provided by our scheduler, confirming that analytically-reasoned approaches can still provide performance improvements for priority task scheduling. the full version of this paper is available in [24].

关键词： priority scheduling relaxed algorithms concurrency parallel graph processing

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VAPRO: Performance Variance Detection and Diagnosis for Production-Run parallel Applications 22

VAPRO: Performance Variance Detection and Diagnosis for Prod...

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27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Zheng, Liyan Zhai, Jidong Tang, Xiongchao Wang, Haojie Yu, Teng Jin, Yuyang Song, Shuaiwen Leon Chen, Wenguang Tsinghua Univ Beijing Peoples R China Sangfor Technol Inc Shenzhen Guangdong Peoples R China Univ Sydney Sydney NSW Australia BNRist Beijing Peoples R China

ISBN: (纸本)9781450392044

Performance variance is a serious problem for parallel applications, which can cause performance degradation and make applications' behavior hard to understand. therefore, detecting and diagnosing performance variance are of crucial importance for users and application developers. However, previous detection approaches either bring too large overhead and hurt applications' performance, or rely on nontrivial source code analysis that is impractical for production-run parallel applications. In this work, we propose VAPRO, a performance variance detection and diagnosis framework for production-run parallel applications. Our approach is based on an important observation that most parallel applications contain code snippets that are repeatedly executed with fixed workload, which can be used for performance variance detection. To effectively identify these snippets at runtime even without program source code, we introduce State Transition Graph (STG) to track program execution and then conduct lightweight workload analysis on STG to locate variance. To diagnose the detected variance, VAPRO leverages a progressive diagnosis method based on a hybrid model leveraging variance breakdown and statistical analysis. Results show that the performance overhead of VAPRO is only 1.38% on average. VAPRO can detect the variance in real applications caused by hardware bugs, memory, and IQ After fixing the detected variance, the standard deviation of the execution time is reduced by up to 73.5%. Compared with the state-of-the-art variance detection tool based on source code analysis, VAPRO achieves 30.0% higher detection coverage.

关键词： Performance Variance Anomaly Detection System Noise

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the Performance Power of Software Combining in Persistence 22

The Performance Power of Software Combining in Persistence

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27th acm sigplan symposium on principles and practice of parallel programming (PPoPP)

作者： Fatourou, Panagiota Kallimanis, Nikolaos D. Kosmas, Eleftherios Univ Paris LIPADE F-75006 Paris France Fdn Res Technol Hellas FORTH Inst Comp Sci Ilellas Greece Univ Crete Dept Comp Sci Iraklion Greece

ISBN: (纸本)9781450392044

the availability of Non-Volatile Main Memory (known as NVMM) enables the design of recoverable concurrent algorithms. We study the power of software combining in achieving recoverable synchronization and designing persistent data structures. Software combining is a general synchronization approach, which attempts to simulate the ideal world when executing synchronization requests (i.e., requests that must be executed in mutual exclusion). A single thread, called the combiner, executes all active requests, while the rest of the threads are waiting for the combiner to notify them that their requests have been applied. Software combining significantly decreases the synchronization cost and outperforms many other synchronization techniques in various cases. We identify three persistence principles, crucial for performance, that an algorithm's designer has to take into consideration when designing highly-efficient recoverable synchronization protocols or data structures. We illustrate how to make the appropriate design decisions in all stages of devising recoverable combining protocols to respect these principles. Specifically, we present two recoverable software combining protocols, satisfying different progress properties, that are many times faster and have much lower persistence cost than a large collection of existing persistent techniques for achieving scalable synchronization. We build fundamental recoverable data structures, such as stacks and queues, based on these protocols that outperform by far existing recoverable implementations of such data structures. We also provide the first recoverable implementation of a concurrent heap and present experiments to show that it has good performance when the size of the heap is not very large.

关键词： non-volatile memory NVM-based computing persistence recoverable algorithms and data structures software combining concurrent data structures stack queue heap synchronization wait-freedom performance principles performance analysis

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High-Performance GPU-to-CPU Transpilation and Optimization via High-Level parallel Constructs 23

High-Performance GPU-to-CPU Transpilation and Optimization v...

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28th acm sigplan Annual symposium on principles and practice of parallel programming, PPoPP 2023

作者： Moses, William S. Ivanov, Ivan R. Domke, Jens Endo, Toshio Doerfert, Johannes Zinenko, Oleksandr MIT CSAIL United States Tokyo Tech Japan RIKEN Japan LLNL United States Google France

ISBN: (纸本)9798400700156

While parallelism remains the main source of performance, architectural implementations and programming models change with each new hardware generation, often leading to costly application re-engineering. Most tools for performance portability require manual and costly application porting to yet another programming model. We propose an alternative approach that automatically translates programs written in one programming model (CUDA), into another (CPU threads) based on Polygeist/MLIR. Our approach includes a representation of parallel constructs that allows conventional compiler transformations to apply transparently and without modification and enables parallelism-specific optimizations. We evaluate our framework by transpiling and optimizing the CUDA Rodinia benchmark suite for a multi-core CPU and achieve a 58% geomean speedup over handwritten OpenMP code. Further, we show how CUDA kernels from PyTorch can efficiently run and scale on the CPU-only Supercomputer Fugaku without user intervention. Our PyTorch compatibility layer making use of transpiled CUDA PyTorch kernels outperforms the PyTorch CPU native backend by 2.7×. © 2023 Owner/Author.

关键词： Supercomputers

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Minimizing speculation overhead in a parallel recognizer for regular texts 25

Minimizing speculation overhead in a parallel recognizer for...

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proceedings of the 30th acm sigplan Annual symposium on principles and practice of parallel programming

作者： Angelo Borsotti Luca Breveglieri Angelo Morzenti Stefano Crespi Reghizzi Politecnico di Milano Milano Italy Politecnico di Milano and CNR-IEIIT Milano Italy

ISBN: (纸本)9798400714436

Speculative data-parallel algorithms for language recognition have been widely experimented for various types of finitestate automata (FA), deterministic (DFA) and nondeterministic (NFA), often derived fromregular expressions (RE). Such an algorithm cuts the input string into chunks, independently recognizes each chunk in parallel by means of identical FAs, and at last joins the chunk results and checks the overall consistency. In chunk recognition, it is necessary to speculatively start the FAs in any state, thus causing an overhead that reduces the speedup over a serial algorithm. the existing data-parallel DFA-based recognizers suffer from an excessive number of starting states, and the NFA-based ones suffer from the number of nondeterministic transitions.

关键词： data-parallel recognition algorithm

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Simplifying low-level GPU programming with GAS 21

Simplifying low-level GPU programming with GAS

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26th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2021

作者： Yan, Da Wang, Wei Chu, Xiaowen Hkust Hong Kong Hong Kong Baptist University Hong Kong

ISBN: (纸本)9781450382946

Many low-level optimizations for NVIDIA GPU can only be implemented in native hardware assembly (SASS). However, programming in SASS is unproductive and not portable. To simplify low-level GPU programming, we present GAS (Gpu ASsembly), a PTX-like language that provides a stable instruction set across hardware architectures while giving programmers a low-level control of code execution. We demonstrate that GAS can be used with ease for low-level benchmarking and performance tuning in the context of Tensor Core HGEMM. © 2021 Owner/Author.

关键词： Graphics processing unit

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Magneto: Accelerating parallel Structures in DNNs via Co-Optimization of Operators 25

Magneto: Accelerating Parallel Structures in DNNs via Co-Opt...

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proceedings of the 30th acm sigplan Annual symposium on principles and practice of parallel programming

作者： Zhanyuan Di Leping Wang Ziyi Ren En Shao Jie Zhao Siyuan Feng Dingwen Tao Guangming Tan Ninghui Sun SKLP Institute of Computing Technology CAS University of Chinese Academy of Sciences SKLP Institute of Computing Technology CAS Hunan University Shanghai Jiao Tong University

ISBN: (纸本)9798400714436

Deep neural networks (DNNs) increasingly rely on parallel structures to enhance performance and efficiency. However, existing machine learning compilers (MLCs) face challenges in optimizing these structures due to limited parallel fusion scopes and insufficient consideration of intra-operator information. this paper introduces Magneto, a novel framework designed to accelerate parallel structures in DNNs through the co-optimization of parallel operators. By expanding the scope of parallel operator fusion and introducing a dedicated co-tuning algorithm, Magneto unlocks new opportunities for co-optimization. Experimental results demonstrate that Magneto outperforms NVIDIA TensorRT and AMD MIGraphX, achieving speedups of 3.02× and 4.19×, respectively.

关键词： DNN

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TensorMD: Molecular Dynamics Simulation with Ab Initio Accuracy of 50 Billion Atoms 25

TensorMD: Molecular Dynamics Simulation with Ab Initio Accur...

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proceedings of the 30th acm sigplan Annual symposium on principles and practice of parallel programming

作者： Yucheng Ouyang Ying Liu Honghui Shang Zhenchuan Chen Jiahao Shan Huimin Cui Xiaobing Feng Xin Chen Xingyu Gao Lifang Wang Haifeng Song Rongfen Lin Fang Li Institute of Computing Technology Chinese Academy of Sciences Beijing China National Research Center of Parallel Computer Engineering and Technology Beijing China Institute of Applied Physics and Computational Mathematics Beijing China

ISBN: (纸本)9798400714436

Molecular dynamics simulation emerges as an important area that HPC+AI helps to investigate the physical properties, with machine-learning interatomic potentials (MLIPs) being used. General-purpose machine-learning (ML) tools have been leveraged in MLIPs, but they are not perfectly matched with each other, since many optimization opportunities in MLIPs have been missed by ML tools. this inefficiency arises from the fact that HPC+AI applications work with far more computational complexity compared with pure AI scenarios. this paper has developed an MLIP, named TensorMD, independently from any ML tool. TensorMD has been evaluated on two supercomputers and scaled to 51.8 billion atoms, i.e., ~ 3× compared with state-of-the-art.

关键词： GPU

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Modernizing parallel code with pattern analysis 21

Modernizing parallel code with pattern analysis

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26th acm sigplan symposium on principles and practice of parallel programming, PPoPP 2021

作者： Lozano, Roberto Castañeda Cole, Murray Franke, Björn University of Edinburgh School of Informatics Edinburgh United Kingdom

ISBN: (纸本)9781450382946

Fifty years of parallel programming has generated a substantial legacy parallel codebase, creating a new portability challenge: re-parallelizing already parallel code. Our solution exploits inherently portable parallel patterns, and addresses the challenge of identifying patternization opportunities in legacy parallel code via constraint matching on traced dynamic dataflow graphs. Notably, this makes the analysis source-independent and equally applicable to sequential and parallel legacy code. We identify various map and reduction patterns, including compositions, in Pthreads code. Experiments with the Starbench suite show that our analysis is effective (finding 86% of the patterns known in the literature), accurate (reporting actual patterns in 98% of the cases), and efficient (scaling linearly with the size of the execution traces). We re-express the found patterns via a parallel pattern library, making code freely portable across CPU/GPU systems and performing competitively with hand-tuned implementations at zero additional effort. © 2021 acm.

关键词： Pattern matching

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