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FPGA implementation of the Predator-prey algorithm with adrenalin boost based on a third-generation of Spiking Neural Network

FPGA implementation of the Predator-prey algorithm with adre...

引用

International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Igor Karoń Karol Gugała Janusz Pochmara Andrzej Rybarczyk Department of Computer Engineering Poznań University of Technology Poznan Poland

In presented paper new approach to Predator-prey algorithm was proposed. With the additional mechanism based on more complex biological behaviours like “adrenalin boost” and usage of Spiking Neural Network minimisation of implementation cost and maximisation of algorithm efficiencies was obtained. thanks to that algorithm can be easily implemented as on of abstract layers in complex standalone robotic systems.

关键词： Neurons Biological neural networks Computational modeling Biological system modeling Mathematical model Field programmable gate arrays

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DVB-CSA encryption in digital hardware

DVB-CSA encryption in digital hardware

引用

International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Przemysław M. Szecówka Patryk W. Marucha Faculty of Microsystem Electronics and Photonics Wrocław University of Technology Wroclaw Poland

DVB-CSA (Digital Video Broadcast - Common Scrambling Algorithm) is encryption method commonly used to protect the paid channels of digital television. the paper presents a study of its implementation in specialized digital hardware. the algorithm was successfully converted to logic architecture, coded in hardware description language (VHDL), verified and synthesized for programmable logic device (FPGA).

关键词： Digital video broadcasting Encryption Registers Clocks Hardware Algorithm design and analysis

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Towards circuit design using VeSFETs

Towards circuit design using VeSFETs

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Marc Pastre François Krummenacher Lucian Barbut Jean-Michel Sallese Maher Kayal Swiss Federal Institute of Technology EPFL STI Lausanne Switzerland

this paper explores the potential of VeFETs for mixed-signal circuits. A new physics-based compact DC model of the VeSFET operated in subthreshold region is presented and used to derive 1 st -order sensitivities of the device threshold voltage to process variations. the VeSFET is compared to the MOSFET transistor, and its advantages and limitations are discussed. Using a Sea-of-Gates-like structure, layout strategies for area-efficient implementation of digital and analog functions are proposed. Finally, the implementation of a mixed-signal circuit (an OTA with chopper modulation) is presented to demonstrate the area-efficiency of circuit implemented with Sea-of-Gates VeSFETs.

关键词： Logic gates Transistors Layout Niobium Sensitivity Geometry threshold voltage

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Efficient use of graphics cards in implementation of parallel image processing algorithms

Efficient use of graphics cards in implementation of paralle...

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Filip Misiorek Mateusz Stankiewicz Paweł Pawłowski Adam Dąbrowski Department of Computing Division of Signal Processing and Electronic Systems Poznań University of Technology Poznan Poland

In this paper we present discussion of our results of parallel programming techniques for image processing applications using graphics processor units (GPU's). We have considered and analyzed various GPU's taking their standing development into account and have implemented a number of most typical image processing tasks and algorithms. On this basis we have not only estimated the capacity growth of GPU's but also the corresponding growth of performance especially for the parallel image processing.

关键词： Graphics processing unit Image processing Computer architecture Algorithm design and analysis Libraries Instruction sets Hardware

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FPGA implementation of 8-bit RISC microcontroller for embedded systems

FPGA implementation of 8-bit RISC microcontroller for embedd...

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： R. Gal A. Golda M. Frankiewicz Andrzej Kos Department of Electronics AGH University of Science and Technology Krakow Poland

the paper presents a prototype at 8-bit RISC microcontroller, called OctaLynx, with 16-bit address bus. It consists of the core (with instruction decoder, arithmetic logic unit and interrupt control unit) and some peripherals (three 8-bit general purpose input-output ports, timers/counters, USART, SPI). the prototype uses external memory. the OctaLynx behavior is described by means of Verilog hardware description language. It has been implemented in Microsemi (i.e. Actel) IGLOO nano AGL250 device. Some tests were carried out.

关键词： Integrated circuits

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Analysis and the design of a first - order ΔΣ modulator using very incomplete settling

Analysis and the design of a first - order ΔΣ modulator us...

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Błażej Nowacki Nuno Paulino João Goes Centre of Technologies and Systems (UNINOVA/CTS) and Departamento de Engenharia Electrotécnica Faculdade de Ciências e Tecnologia Universidade Nova de Lisboa Caparica Portugal

One of the main building blocks of a Delta-Sigma modulator (ΔΣM) is the integrator circuit. Usually this is implemented either in discrete or in continuous time domains using amplifiers. this paper analyses a ΔΣ circuit based on the implementation of passive switched-capacitor (SC) integrator using very incomplete settling. the behavior of a 1 st order ΔΣM is fully analyzed and explained. Electrical simulations show that the ΔΣM achieves a peak signal-to-noise-plus-distortion ratio (SNDR) of 62 dB, a peak signal-to-noise ratio (SNR) of 63 dB for a signal with a bandwidth (BW) of 300 kHz, while dissipating only 130 μW from a 1.1 V power supply voltage, resulting in a figure-of-merit (FOM) of 213 fJ/conv.-step (simulated).

关键词： Noise Modulation Capacitors Transfer functions thermal noise Switching circuits Gain

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An FPGA implementation of the asynchronous programmable neighborhood mechanism for WTM Self-Organizing Map

An FPGA implementation of the asynchronous programmable neig...

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Rafal Długosz Marta Kolasa Michał Szulc Faculty of Telecommunication and Electrical Engineering University of Technology and Life Sciences Bydgoszcz Poland Department of Computer Engineering Poznań University of Technology Poznan Poland

In this paper we present an FPGA-based implementation of the novel architecture of the Kohonen Winner Takes Most (WTM) Self-Organizing Map (SOM) with an asynchronous, programmable neighborhood mechanism. the proposed network is, in general, the synchronous system working in parallel, with some blocks that operate asynchronously. the asynchronous part includes the neighborhood mechanism that ensures the asynchronous spreading of the adaptation enabling signal amongst the neurons neighboring the winning unit. this mechanism is fully programmable and enables runtime adaptation of the neighborhood radius. the overall SOM consists of a controller, the winning neuron selecting unit and the number of neurons that results from the size of the map. the proposed implementation is fully scalable and mostly independent on the size of the map in terms of achievable maximum data rate with only one exception, i.e. the maximum delay introduced by the asynchronous neighborhood mechanism. the delay is linearly dependent on the size of the map. the proposed system has been realized on the Virtex 5 XC5VLX110T device.

关键词： Neurons Topology Field programmable gate arrays Clocks Hardware Routing Artificial neural networks

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Considerations on incremental approach to hardware implementation of Smith-Waterman algorithm

Considerations on incremental approach to hardware implement...

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Andrzej Pułka Adam Milik Institute of Electronics Department of Automatic Control Electronics and Computer Science Silesian University of Technology Gliwice Poland

the paper presents optimized hardware structure applied to genome alignment search. the proposed methodology is based on dynamic programming. the authors show how starting from the original Smith-Waterman approach, the algorithm can be optimized and the evaluation process simplified and speeded-up. the main idea is based on the observations of growth trends in the adjacent cells of the systolic array, which leads to the incremental approach. Moreover various coding styles are discussed and the best technique allowing further reduction of resources is selected. the entire processing unit utilizes fully pipelined structure that is well balanced trade-off between performance and resource requirements. the proposed technique is implemented in modern FPGA structures and obtained results proved efficiency of the methodology comparing to other approaches in the field.

关键词： Arrays Hardware Table lookup Registers Algorithm design and analysis Field programmable gate arrays Equations

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A simplified design of a MOSFET-only wideband Gilbert Cell

A simplified design of a MOSFET-only wideband Gilbert Cell

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International conference on Mixed design of Integrated Circuits and systems (MIXDES)

作者： Eduardo Ortigueira Ivan Bastos Luis B. Oliveira Joao P. Oliveira João Goes CTS-UNINOVA Departamento de Engenharia Electrotécnica Faculdade de Ciências e Tecnologia FCT Universidade Nova de Lisboa Monte da Caparica Portugal

In this paper we present a MOSFET-only implementation of a wideband Gilbert Cell. the circuit uses a common-gate topology for a wideband input match, capable to cover the WMTS frequency bands of 600 MHz and 1.4 GHz. In this circuit the load resistors are replaced by transistors in triode mode, to reduce area and cost, and minimize the effects of process and supply variations and mismatches. In addition we obtain a higher gain for the same DC voltage drop, with a reduced impact on the noise figure (NF). the performance of this topology is compared with that of a conventional mixer with load resistors. Simulation results show that a peak gain of 20.6 dB (about 6 dB improvement) and a NF about of 11 dB for the 600 MHz band. the total power consumption is as low as 3.6 mW from a 1.2V supply.

关键词： Mixers Noise Transistors Transconductance Switches Resistors Gain

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design and implementation of Regional Land Information Intergration Model: An Improvement

Design and Implementation of Regional Land Information Inter...

引用

18th International conference on Geoinformatics

作者： Zhu, Siyuan Huang, Yingchun Chinese Acad Sci Inst Geog Sci & Nat Resources Res Beijing Peoples R China SuperMap Inc Beijing Peoples R China

ISBN: (纸本)9781424473021

this paper describes the design and implementation of Regional Land Information Integration Model ((RLIM)-M-2). (RLIM)-M-2 is used to solve the problems of land business systems' incompatibility in China due to numerous rigid land resources management laws and regulations. By separating the fundamental geo-spatial data and land business data, this model can bring out various business applications on one map. By enlarging the definition of operating Data Storage (ODS), (RLIM)-M-2 utilized a Land information operating Data Storage (L-ODS) to reduce redundant spatial data. therefore, the system respond time was reduced to a reasonable level. In addition, (RLIM)-M-2 integrates different business systems by using the message/return mechanism in UML even though each of them is different in inner workflows and data structure. this article also introduces an application based on (RLIM)-M-2 which was implemented in Liuzhou, China.

关键词： LIS Information Integration L-ODS UML

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