This study was performed on a CDC-6600 computer having 500K of Extended Core Storage (ECS), twenty Peripheral Processor Units (PPU's) and twenty-four I/O channels, as shown in Figure I-l. The CPU can load, store, ...
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ISBN:
(纸本)9781450374972
This study was performed on a CDC-6600 computer having 500K of Extended Core Storage (ECS), twenty Peripheral Processor Units (PPU's) and twenty-four I/O channels, as shown in Figure I-l. The CPU can load, store, and execute from the 131K of 1 microsecond storage which comprises CM. It can also access ECS, but this access is limited to transferring blocks of data between CM and ECS st the rate of ten 60-bit words per microsecond. The CPU cannot access peripheral devices in any manner whatever.
A class of schedules in the two customer central server queueing model, consisting Of a "CPU" server and m "I/0" servers, is considered. Optimal (maximal CPU utilization) CPU and I/0 schedules are ...
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ISBN:
(纸本)9781450374972
A class of schedules in the two customer central server queueing model, consisting Of a "CPU" server and m "I/0" servers, is considered. Optimal (maximal CPU utilization) CPU and I/0 schedules are obtained. The best CPU schedule depends on the I/O schedule in effect;and is either Longest or Shortest- Expeeted-Remaining-Processing-Time-First. However, for certain I/0 schedules the CPU schedule is immaterial. The best I/O schedule is always to process the (expected) longer CPU customer first.
For a number of NP-complete sequencing problems [C], the worst-case performance of heuristics has been bounded relative to optimal performance. The bounds are usually shown to be best in the sense that they are achiev...
ISBN:
(纸本)9781450374972
For a number of NP-complete sequencing problems [C], the worst-case performance of heuristics has been bounded relative to optimal performance. The bounds are usually shown to be best in the sense that they are achievable. However, when these bounds are based on a single, pathological example, they are not as informative as might be desired. Such is largely the case with Graham's bound [G] of 4/3- 1/3m on the performance of largest-processing-time- first (LPT) sequencing for the classical problem of minimizing schedule lengths, assuming independent tasks on m ≥ 2 identical processors.
作者：
Giammo, ThomasDept. of Health
Education and Welfare Social Security Administration BaltimoreMD21235 United States
Beginning in mid-1974, the Data Management Center of the Office of the Secretary of the Department of Health, Education, and Welfare undertook to validate an analytic model of computer performance in the context of a ...
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ISBN:
(纸本)9781450374972
Beginning in mid-1974, the Data Management Center of the Office of the Secretary of the Department of Health, Education, and Welfare undertook to validate an analytic model of computer performance in the context of a large multi-programmed configuration operating under a variety of actual production workload conditions. A primary goal of this validation effort was to test the adequacy of the framework offered by the "exponential queuing network" model schema (as developed by Buzen, et al.) in representing "real world" situations with sufficient accuracy to be useful as a general tool in support of long range planning. The purpose of this paper is to report on the results of that validation effort.
The problem of allocating files in a computer network is a complex combinatorial problem due to the number of integer design parameters involved. These parameters include system cost, number of copies of each file to ...
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ISBN:
(纸本)9781450374972
The problem of allocating files in a computer network is a complex combinatorial problem due to the number of integer design parameters involved. These parameters include system cost, number of copies of each file to be stored, and sites at which the copies should be stored. The tradeoffs between these parameters are discussed. The design problem is formulated as an integer programming problem. A branch and bound algorithm is proposed to solve the problem. A linear programming formulation which ignores integer restrictions (and allows a fraction of a file to reside at a site) is shown to yield integer solutions in most cases. In other words integer restrictions are satisfied automatically. A near-optimal heuristic is presented, along with computational results. An efficient method to solve the file allocation problem for medium-scale networks is proposed.
We consider packet-switching network as a queueing system with constant service times : That means that the lengths of Che packets are equal. We study such a network by isolating a particular path, that we consider as...
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ISBN:
(纸本)9781450374972
We consider packet-switching network as a queueing system with constant service times : That means that the lengths of Che packets are equal. We study such a network by isolating a particular path, that we consider as a tandem system of queueing. Two aspects of the question will be examined : - The study of the response time of such a system - The study of the throughput of such a system when introducing the notion of time-out for each packet. The results we obtained show that when neglecting the interferences between paths the response time is independent of the order of the stations. The control policy we examined prove the necessity to have a limitated memorisation capacity at each node of a packet-switching network. These results confirm the intuitive options taken in a network like CYCLADES.
A framework for the study of computer capacity is given by means of a definition of capacity in terms of speeds of various parts of a computer as well as memory size. In addition to these machine parameters, we also i...
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ISBN:
(纸本)9781450374972
A framework for the study of computer capacity is given by means of a definition of capacity in terms of speeds of various parts of a computer as well as memory size. In addition to these machine parameters, we also include certain parameters of the programs to be run on a given machine. The calculation of theoretical capacity is given for several combinations of processor, memory, and I/O bandwidth for overlapped machines. The tradeoff between primary memory size and I/O bandwidth is discussed in terms of the new definition.
Balancing interpagefault lifetime (L) against page swap time (S) has always been a performance criterion of great intuitive appeal. This paper shows that, under normal conditions, controlling the memory policy paramet...
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ISBN:
(纸本)9781450374972
Balancing interpagefault lifetime (L) against page swap time (S) has always been a performance criterion of great intuitive appeal. This paper shows that, under normal conditions, controlling the memory policy parameter to enforce the constraint L ^ S, and allowing the multiprogramming load to rise as high as demand warrants without violating this constraint, will produce a load slightly higher than optimum. Equivalently, using the criterion L - uS for some u slightly larger than 1 will approximate an optimal load. Using simulations, this criterion is compared with two others reported in the literature, namely the "knee criterion" (pperate with L at the knee of the lifetime curve) and the 50% criterion (operate with the paging device at 50% utilization). The knee criterion produced optimal loads more often than the L=S criterion, which in turn produced optimal loads more often than the 50% criterion. Since no practical implementation of the knee criterion is known, the L=S criterion is the most attractive of the three.
This paper defines and determines a graph model of a computer system in a form applicable to system performance analysis. The power of this modeling technique with respect to comprehensibility, accuracy of representat...
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This paper defines and determines a graph model of a computer system in a form applicable to system performance analysis. The power of this modeling technique with respect to comprehensibility, accuracy of representation and ease of validation and modification is demonstrated by application to modeling of the UT-2 operating system for the CDC 6000 series computer system. This multiprocessor-multi-programmed operating system with its high degree of parallelism provides an excellent test for the utility and range of application of graph models in performance evaluation. A programmed representation of the kernel monitor is used. All other system processes are represented in graph form and are input data to the simulator. A generally applicable technique for extracting graph representations of processes are represented in graph form and are input data to the simulator. A generally applicable technique for extracting graph representations of processes from event trace data is described and applied to the event trace generated by the UT-2 operating system. The technique is both complete and general and may be profitably applied for either partial or complete models of any type of complex computer system process where data. or techniques for automated graph construction are available or can he applied.
Trace Driven modeling is a technique that combines measurement and simulation in order to create an accurate model of a computer system. This paper extends the review and overview of trace driven modeling presented in...
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