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检索条件"任意字段=Proceedings of the 1996 ACM/SIGDA International Symposium on Field Programmable Gate Arrays"
629 条 记 录,以下是111-120 订阅
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FPGAs vs. CPUs: Trends in peak floating-point performance
FPGAs vs. CPUs: Trends in peak floating-point performance
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acm/sigda Twelfth acm international symposium on field-programmable gate arrays - FPGA 2004
作者: Underwood, Keith Sandia National Laboratories MS-1110 PO Box 5800 Albuquerque NM 87185-1110
Moore's Law states that the number of transistors on a device doubles every two years: however, it is often (mis)quoted based on its impact on CPU performance. This important corollary of Moore's Law states th... 详细信息
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FPGA 2001: Fifteenth acmIsigda international symposium on field-programmable gate arrays
FPGA 2001: Fifteenth ACMISIGDA International Symposium on Fi...
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FPGA 2007: Fifteenth acm/sigda international symposium on field-programmable gate arrays
The proceedings contain 25 papers. The topics discussed include: a routing fabric for monolithically stacked 3D-FPGA;design of a logic element for implementing an asynchronous FPGA;designing efficient input interconne... 详细信息
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Fast and scalable packet classification using perfect hash
Fast and scalable packet classification using perfect hash
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7th acm sigda international symposium on field-programmable gate arrays, FPGA'09
作者: Puš, Viktor Korenek, Jan CESNET z. s. p. o. Zikova 4 160 00 Prague Czech Republic Faculty of Information Technology Brno University of Technology Bozetechova 2 612 66 Brno Czech Republic
Packet classification is an important operation for applications such as routers, firewalls or intrusion detection systems. Many algorithms and hardware architectures for packet classification have been created, but n... 详细信息
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A power side-channel-based digital to analog converter for xilinx FPGAs  14
A power side-channel-based digital to analog converter for x...
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2014 acm/sigda international symposium on field programmable gate arrays, FPGA 2014
作者: Hutchings, Brad L. Monson, Joshua Savory, Danny Keeley, Jared Department of Electrical and Computer Engineering Brigham Young University Provo UT United States
A novel Digital to Analog Converter (DAC) modulates the overall power consumption of an FPGA by disabling/enabling short circuits programmed into the interconnect. The power pin of the FPGA serves as the output of the... 详细信息
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Towards reliable 5Gbps wave-pipelined and gbps surfing interconnect in 65nm FPGAs
Towards reliable 5Gbps wave-pipelined and gbps surfing inter...
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7th acm sigda international symposium on field-programmable gate arrays, FPGA'09
作者: Teehan, Paul Lemieux, G.F. Greenstreet, R. Dept. of ECE University of British Columbia Canada Dept. of Computer Science University of British Columbia Canada
FPGA user clocks are slow enough that only a fraction of the interconnect's is actually used. There may be an opportunity use throughput-oriented interconnect to decrease routing and wire area using on-chip serial... 详细信息
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More wires and fewer LUTs: A design methodology for FPGAs
More wires and fewer LUTs: A design methodology for FPGAs
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proceedings of the 1998 acm/sigda 6th international symposium on field programmable gate arrays, FPGA
作者: Takahara, Atsushi Miyazaki, Toshiaki Murooka, Takahiro Katayama, Masaru Hayashi, Kazuhiro Tsutsui, Akihiro Ichimori, Takaki Fukami, Ken-nosuke NTT Optical Network Systems Lab Japan
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is difficult to find an optimal solution. In this paper, we pre... 详细信息
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Embedded floating-point units in FPGAs  06
Embedded floating-point units in FPGAs
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14th acm/sigda international symposium on field programmable gate arrays - FPGA 2006
作者: Beauchamp, Michael J. Hauck, Scott Underwood, Keith D. Hemmert, K. Scott University of Washington Dept. of Electrical Engineering United States Sandia National Laboratories Scalable Computing Systems United States
Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications. However, it is this nonspecific nature that has limited the use of FPGAs in scientific applicat... 详细信息
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RapidSmith 2: A framework for BEL-level CAD exploration on Xilinx FPGAs  15
RapidSmith 2: A framework for BEL-level CAD exploration on X...
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acm/sigda international symposium on field-programmable gate arrays, FPGA 2015
作者: Haroldsen, Travis Nelson, Brent Hutchings, Brad Department of Electrical and Computer Engineering Brigham Young University ProvoUT84602 United States
RapidSmith is an open-source framework that allows for the exploration of novel approaches to the FPGA CAD flow for Xilinx devices. However, RapidSmith has poor sup- port for manipulating designs below the slice level... 详细信息
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A remote memory access infrastructure for global address space programming models in FPGAs  13
A remote memory access infrastructure for global address spa...
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2013 acm/sigda international symposium on field programmable gate arrays, FPGA 2013
作者: Willenberg, Ruediger Chow, Paul Dept. of Electrical and Computer Engineering University of Toronto Toronto ON Canada
We are proposing a shared-memory communication infrastructure that provides a common parallel programming interface for FPGA and CPU components in a heterogeneous system. Our intent is to ease the integration of recon... 详细信息
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Dynamic reconfiguration in FPGA-based SoC designs
Dynamic reconfiguration in FPGA-based SoC designs
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acm/sigda Thirteenth acm international symposium on field programmable gate arrays - FPGA 2005
作者: Bartosinski, Roman Daněk, Martin Honzik, Petr Matoušek, Rudolf Inst. of Information Theory and Automatioru Czech Academy of Sciences Pod vodarenskou vezi 4 182 08 Praha 8 Czech Republic
This paper discusses architectural issues arising from the use of dynamic reconfiguration and shows a possible use of dynamic reconfiguration to extend and accelerate a computation performed in system-on-a-chip design... 详细信息
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