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检索条件"任意字段=Proceedings of the 1996 ACM/SIGDA International Symposium on Field Programmable Gate Arrays"
629 条 记 录,以下是121-130 订阅
排序:
Analysis of yield loss due to random photolithographic defects in the interconnect structure of FPGAs  05
Analysis of yield loss due to random photolithographic defec...
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acm/sigda Thirteenth acm international symposium on field programmable gate arrays - FPGA 2005
作者: Campregher, Nicola Cheung, Peter Y. K. Vasilko, Milan Constantinides, George A. Electrical and Electronic Engineering Imperial College London United Kingdom School of Design Engineering and Computing Bournemouth University United Kingdom
This paper presents an analysis of the potential yield loss in FPGA due to random defects in metal layers. A proven yield model is adapted to target the FPGA interconnect layers in order to predict the manufacturing y... 详细信息
来源: 评论
Automated synthesis for asynchronous FPGAs  05
Automated synthesis for asynchronous FPGAs
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acm/sigda Thirteenth acm international symposium on field programmable gate arrays - FPGA 2005
作者: Peng, Song Fang, David Teifel, John Manohar, Rajit Computer Systems Laboratory Cornell University Ithaca NY 14853 United States Advanced Microelectronics Department Sandia National Laboratories United States
Advanced Microelectronics Department at Sandia National Laboratories. We present an automatic logic synthesis method targeted for high-performance asynchronous FPGA (AFPGA) architectures. Our method transforms sequent... 详细信息
来源: 评论
Post-placement C-slow retiming for the xilinx virtex FPGA
Post-placement C-slow retiming for the xilinx virtex FPGA
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acm/sigda 11th acm international symposium on field programmable gate arrays
作者: Weaver, Nicholas Markovskiy, Yury Patel, Yatish Wawrzynek, John UC Berkeley Berkeley CA United States
C-slow retiming is a process of automatically increasing the throughput of a design by enabling fine grained pipelining of problems with feedback loops. This transformation is especially appropriate when applied to FP... 详细信息
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Efficiently supporting fault-tolerance in FPGAs  98
Efficiently supporting fault-tolerance in FPGAs
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proceedings of the 1998 acm/sigda 6th international symposium on field programmable gate arrays, FPGA
作者: Lach, John Mangione-Smith, William H. Potkonjak, Miodrag UCLA EE Dep Los Angeles CA United States
While system reliability is conventionally achieved through component replication, we have developed a fault-tolerance approach for FPGA-based systems that comes at a reduced cost in terms of design time, volume, and ... 详细信息
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An iterative division algorithm for FPGAs  06
An iterative division algorithm for FPGAs
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14th acm/sigda international symposium on field programmable gate arrays - FPGA 2006
作者: Liu, Jianhua Chang, Michael Cheng, Chung-Kuan Computer Science and Engineering Department University of California San Diego 92093 United States
Division is one of the most complicated and expensive arithmetic operations. Both clock frequency and operation delay are limited by the memory wall, even in LUT-based FPGA devices. To conquer the memory limitation, w... 详细信息
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field programmable Port Extender (FPX) for distributed routing and queuing  00
Field Programmable Port Extender (FPX) for distributed routi...
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FPGA 2000: acm/sigda international symposium on field programmable gate arrays
作者: Lockwood, John W. Turner, Jon S. Taylor, David E. Washington Univ Saint Louis MO United States
field programmable gate arrays (FPGAs) are being used to provide fast Internet Protocol (IP) packet routing and advanced queuing in a highly scalable network switch. A new module, called the field-programmable Port Ex... 详细信息
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Highly pipelined asynchronous FPGAs
Highly pipelined asynchronous FPGAs
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acm/sigda Twelfth acm international symposium on field-programmable gate arrays - FPGA 2004
作者: Teifel, John Manohar, Rajit Computer Systems Laboratory Cornell University Ithaca NY 14853 United States
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and show how asynchronous logic can efficient... 详细信息
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Memory-to-memory connection structures in FPGAs with embedded memory arrays  97
Memory-to-memory connection structures in FPGAs with embedde...
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proceedings of the 1997 acm 5th international symposium on field-programmable gate arrays, FPGA
作者: Wilton, Steven J.E. Rose, Jonathan Vranesic, Zvonko G. Univ of British Columbia Vancouver BC Canada
This paper shows that the speed of FPGAs with large embedded memory arrays can be improved by adding direct programmable connections between the memories. Nets that connect to multiple memory arrays are often difficul... 详细信息
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Heterogeneous technology mapping for FPGAs with dual-port embedded memory arrays  00
Heterogeneous technology mapping for FPGAs with dual-port em...
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FPGA 2000: acm/sigda international symposium on field programmable gate arrays
作者: Wilton, Steven J.E. Univ of British Columbia Vancouver BC Canada
It has become clear that on-chip storage is an essential component of high-density FPGAs. These arrays were originally intended to implement storage, but recent work has shown that they can also be used to implement l... 详细信息
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FPCNA: A field programmable carbon nanotube array
FPCNA: A field programmable carbon nanotube array
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7th acm sigda international symposium on field-programmable gate arrays, FPGA'09
作者: Dong, Chen Chilstedt, Scott Chen, Deming Department of Electrical and Computer Engineering University of Illinois Urbana-Champaign Urbana-Champaign United States
Carbon nanotubes (CNTs), with their unique electronic properties, are promising materials for building nanoscale circuits. In this paper, we present a new CNT-based FPGA architecture known as FPCNA. We define novel CN... 详细信息
来源: 评论