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检索条件"任意字段=Proceedings of the 1996 ACM/SIGDA International Symposium on Field Programmable Gate Arrays"
629 条 记 录,以下是531-540 订阅
排序:
Power Optimizations in MTJ-based Neural Networks through Stochastic Computing  22
Power Optimizations in MTJ-based Neural Networks through Sto...
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22nd IEEE/acm international symposium on Low Power Electronics and Design (ISLPED)
作者: Mondal, Ankit Srivastava, Ankur Univ Maryland Dept Elect & Comp Engn College Pk MD 20783 USA
Artificial Neural Networks (ANNs) have found widespread applications in tasks such as pattern recognition and image classification. However, hardware implementations of ANNs using conventional binary arithmetic units ... 详细信息
来源: 评论
Is marriage in the cards for programmable logic, microprocessors and ASICs?  01
Is marriage in the cards for programmable logic, microproces...
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proceedings of the 2001 acm/sigda ninth international symposium on field programmable gate arrays
作者: John East Tim Garverick Scott Hauck Tavana Tavana Steve Trimberger Ronnie Vasishta Sinan Kaptanoglu Actel Adaptive Silicon University of Washington Triscend Xilinx LSI Logic
No abstract available.
来源: 评论
A Power-Efficient and Non-volatile programmable Logic Array Based on Phase Change Memory
A Power-Efficient and Non-volatile Programmable Logic Array ...
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international Workshop on Information Data Storage / 10th international symposium on Optical Storage
作者: Du, Yuan Ye, Yong Kang, Yong Xia, Yangyang Song, Zhitang Chen, Bomy Chinese Acad Sci Shanghai Inst Microsyst & Informat Technol State Key Lab Funct Mat Informat Shanghai 200050 Peoples R China Univ Chinese Acad Sci Beijing 10080 Peoples R China Shanghai Xinchu Integrated Circuit Incorp Shanghai 200122 Peoples R China
Recently, numerous efforts have been made on NVM-based field programmable gate arrays (FPGAs) because the emerging non-volatile memory (NVM) technologies have the advantages of lower leakage power and higher density t... 详细信息
来源: 评论
A fully onchip binarized convolutional neural network FPGA impelmentation with accurate inference  18
A fully onchip binarized convolutional neural network FPGA i...
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23rd IEEE/acm international symposium on Low Power Electronics and Design, ISLPED 2018
作者: Yang, Li He, Zhezhi Fan, Deliang Department of Electrical and Computer Engineering OrlandoFL United States
Deep convolutional neural network has taken an important role in machine learning algorithm which has been widely used in computer vision tasks. However, its enormous model size and massive computation cost have becam... 详细信息
来源: 评论
Plasma: An FPGA for Million gate Systems
Plasma: An FPGA for Million Gate Systems
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proceedings of the acm international symposium on field-programmable gate arrays, FPGA
作者: R. Amerson R. Carter W. Culbertson P. Kuekes G. Snider L. Albertson Hewlett Packard Laboratories Palo Alto CA USA Hewlett-Packard California Design Center Palo Alto CA USA
Prototypes are invaluable for studying special purpose parallel architectures and custom computing. This paper describes a new FPGA, called Plasma- the heart of a configurable custom computing engine (Teramac) that ca... 详细信息
来源: 评论
Study on the application of FPGA in transformer terminal unit  4
Study on the application of FPGA in transformer terminal uni...
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4th international symposium on Power Electronics and Control Engineering, ISPECE 2021
作者: Zhong, W. Wang, C. Jiangsu Frontier Electric Technology Co. Ltd Nanjing211103 China
This paper introduces a transformer terminal unit (TTU) signal acquisition system based on field programmable gate array (FPGA). The TTU signal acquisition system is realized based on demo board of FPGA (model EP4CE10... 详细信息
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Technology Mapping of Sequential Circuits for LUT-Based FPGAs for Performance
Technology Mapping of Sequential Circuits for LUT-Based FPGA...
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proceedings of the acm international symposium on field-programmable gate arrays, FPGA
作者: Peichen Pan C.L. Liu Department of Electrical & Computer Engineering Clarkson University Potsdam NY USA Department of Computer Science University of Illinois Urbana-Champaign IL USA
In this paper, we study the technology mapping problem for sequentail circuits for LUT-based FPGAs. The conventional approach for this problem is based on a technology mapping algorithm for combinational circuits whil... 详细信息
来源: 评论
The EPAC architecture: an expert cell approach to field programmable analog devices  96
The EPAC architecture: an expert cell approach to field prog...
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proceedings of the 1996 acm fourth international symposium on field-programmable gate arrays
作者: Hans W. Klein IMP Inc. San Jose CA
No abstract available.
来源: 评论
Using BDDs to Design ULMs for FPGAs
Using BDDs to Design ULMs for FPGAs
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proceedings of the acm international symposium on field-programmable gate arrays, FPGA
作者: Z. Zilic Z.G. Vranesic Department of ECE University of Toronto Canada
Many modern FPGAs use lookup table (LUT) logic blocks which can be programmed to realize any function of a fixed number of inputs. Since permutations and negation of signals are virtually costless operations in FPGAs,... 详细信息
来源: 评论
Emerald - An Architecture-Driven Tool Compiler for FPGAs
Emerald - An Architecture-Driven Tool Compiler for FPGAs
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proceedings of the acm international symposium on field-programmable gate arrays, FPGA
作者: D.C. Cronquist L. McMurchie Department of Computer Engineering University of Washington Seattle WA USA
Ideally, the development phase of a new FPGA architecture would make use of a reliable set of mapping tools to produce accurate performance evaluations of proposed designs. Unfortunately, given the quick production ti... 详细信息
来源: 评论