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Annual Hawaii International conference on System Sciences (HICSS)

作者： A.S. Gokhale B. Natarajan Institute for Software Integrated Systems Vanderbilt University Nashville TN USA

Rapid advances in networking, hardware, and middleware technologies are facilitating the development and deployment of grid applications, which are characterized, by their very high computing and resource requirements. These applications and services have multiple, simultaneous end-to-end quality of service (QoS) requirements, such as delay guarantees, jitter guarantees, security, scalability, reliability and availability guarantees, and bandwidth and throughput guarantees. Moreover, these applications and services require secure, controlled, reliable, and guaranteed access to different types of resources, such as network bandwidth, computing power, and storage capabilities, available from multiple service providers. To support next-generation grid applications effectively, there is a need to simplify grid programming by developing a new grid middleware that raises the level of abstraction, and reduces the accidental complexities incurred, by programming at the grid infrastructure middleware level offered by existing grid middleware such as Globus, ICENI, and Legion. Moreover, the new grid middleware must ensure multiple end-to-end QoS properties simultaneously. The paper provides three contributions to the research on next generation grid middleware architecture that provides the above-mentioned properties. First, we describe how we are utilizing the standards-based CORBA distributed object computing and integration technology to design the next generation grid middleware, called Grid TAO (GriT) that complements and enhances existing low-level Grid middleware, such as Globus. Second, we describe how we are using the real-time, fault-tolerant, and data parallel CORBA features to implement GriT to provide the desired properties. Finally, we show how CORBA's platform and language independence features are used in GriT to resolve the portability and interoperability challenges faced, by current grid applications.

关键词： Middleware Quality of service Computer architecture Computer networks Grid computing Bandwidth Hardware Delay Jitter Scalability

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Quantitative performance analysis of the improved quasi-minimal residual method on massively distributed memory computers

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advances IN ENGINEERING SOFTWARE 2002年第3期33卷 169-177页

作者： Yang, LT Brent, RP St Francis Xavier Univ Dept Comp Sci Antigonish NS B2G 2W5 Canada Univ Oxford Comp Lab Oxford OX1 3QD England

For the solutions of linear systems of equations with unsymmetric coefficient matrices, we have proposed an improved version of the quasi-minimal residual (IQMR) method [proceedings of The International conference on High Performance computing and Networking (HPCN-97) (1997);IEICE Trans Inform Syst E80-D (9) (1997) 919] by using the Lanczos process as a major component combining elements of numerical stability and parallel algorithm design. For the Lanczos process, stability is obtained by a coupled two-term procedure that generates Lanczos vectors scaled to unit length. The algorithm is derived so that all inner products and matrix-vector multiplications of a single iteration step are independent and the communication time required for inner product can be overlapped efficiently with computation time. In this paper, a theoretical model of computation and communications phases is presented to allow us to give a quantitative analysis of the parallel performance with a two-dimensional grid topology. The efficiency, speed-up, and runtime are expressed as functions of the number of processors scaled by the number of processors that gives the minimal runtime for the given problem size. The model not only evaluates effectively the improvements in performance due to communication reduction by overlapping, but also provides useful insight into the scalability of the IQMR method. The theoretical results on the performance are demonstrated by experimental timing results carried out on a massively parallel distributed memory Parsytec system. (C) 2002 Published by Elsevier Science Ltd.

关键词： Linear systems

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Noncontiguous I/O through PVFS

Noncontiguous I/O through PVFS

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IEEE International conference on Cluster computing

作者： Ching, A Choudhary, A Liao, WK Ross, R Gropp, W Northwestern Univ Ctr Parallel & Distributed Comp Evanston IL 60208 USA

ISBN: (纸本)0769517455

With the tremendous advances in processor and memory technology, I/O has risen to become the bottleneck in high-performance computing for many applications. The development of parallel file systems has helped to ease the performance gap, but I/O still remains an area needing significant performance improvement. Research has found that noncontiguous I/O access patterns in scientific applications combined with current file system methods to perform these accesses lead to unacceptable performance for large data sets. To enhance performance of noncontiguous I/O, we have created list I/O, a native version of noncontiguous I/O. We have used the parallel Virtual File System (PVFS) to implement our ideas. Our research and experimentation shows that list I/O outperforms current noncontiguous I/O access methods in most I/O situations and can substantially enhance the performance of real-world scientific applications.

关键词： Application software Computer science Concurrent computing Costs distributed computing File servers File systems Linux Mathematics Network servers

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distributed GA for large system identification problems

Distributed GA for large system identification problems

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conference on Smart Nondestructive Evaluation for Health Monitoring of Structural and Biological Systems

作者： Koh, CG Wu, LP Liaw, CY Natl Univ Singapore Dept Civil Engn Singapore 119260 Singapore

ISBN: (纸本)0819444502

Non-destructive monitoring of structures may be achieved by system identification to evaluate key parameters. Unfortunately many system identification methods that work for small systems do not necessarily give convergence for large systems. In recent years, the use of genetic algorithms (GA) has shown promising potential for parameter identification of complex systems owing to its many inherent advantages. For large systems involving many degrees of freedom and unknown parameters, the computational effort required by the GA approach may still be prohibitive. The main bulk, of computational time lies in the numerous forward analyses that need to be carried out. With rapid advances in computer hardware, especially networking technology, nevertheless, the feasibility of applying the GA approach to large system identification problems has become closer to reality even by using low-cost personal computers. distributed computing can be easily employed to expedite the GA search, thanks to the high concurrency of the GA approach. In this study, a parallel version of a hybrid algorithm of GA and local search is developed for distributed computing. The implementation involves a manager computer running the main algorithm, which distributes data files to many worker computers connected on the network. Each worker computer carries out the forward analysis with the assigned parameter set and, when completed, sends the output file to the manager computer, Numerical examples are presented to show that this approach is generally workable and robust.

关键词： System identification distributed computing Computer networks Algorithm development Computer hardware Genetic algorithms Nondestructive evaluation Civil engineering Complex systems computing systems

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7th Asian computing Science conference, ASIAN 2002

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7th Asian computing Science conference, ASIAN 2002

ISBN: (纸本)3540001956

The proceedings contain 20 papers. The special focus in this conference is on advances in computing Science. The topics include: Scalable infrastructure for global data grids;personalized video for contents delivery network;distributed check pointing on clusters with dynamic striping and staggering;a replay technique for debugging long-running parallel programs;data storage and stream caching for video on demand servers;analysis of caching mechanisms from sporting event web sites;solving the N-body problem with the ALiCE grid system;the experience and practice of developing a brain functional analysis system using ica on a grid environment;a scalable approach to network enabled servers;a server selection method based on communication delay and communication frequency among users for networked virtual environments;dynamic resource allocation in core routers of a diffserv network;performance analysis of flow loss probability and link utilization in MPLS networks for traffic engineering;multiconstraint QoS routing using a path-vector protocol;design and implementation of a web-based internet broadcasting system on QoS multicast routers and an efficient secure system for subscription based services.

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Noncontiguous I/O through PVFS

Noncontiguous I/O through PVFS

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IEEE International conference on Cluster computing

作者： Avery Ching A. Choudhary Wei-keng Liao R. Ross W. Gropp Center for Parallel and Distributed Computing Northwestern University Evanston IL USA Mathematics and Computer Science Division Argonne National Laboratory Argonne IL USA

With the tremendous advances in processor and memory technology, I/O has risen to become the bottleneck in high-performance computing for many applications. The development of parallel file systems has helped to ease the performance gap, but I/O still remains an area needing significant performance improvement. Research has found that noncontiguous I/O access patterns in scientific applications combined with current file system methods, to perform these accesses lead to unacceptable performance for large data sets. To enhance performance of noncontiguous I/O, we have created list I/O, a native version of noncontiguous I/O. We have used the parallel Virtual File System (PVFS) to implement our ideas. Our research and experimentation shows that list I/O outperforms current noncontiguous I/O access methods in most I/O situations and can substantially enhance the performance of real-world scientific applications.

关键词： File systems File servers Concurrent computing Linux distributed computing Application software Costs Network servers Mathematics Computer science

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parallel efficient hierarchical algorithms for module placement of large chips on distributed memory architectures

Parallel efficient hierarchical algorithms for module placem...

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International conference on parallel computing in Electrical Engineering (PARLEC)

作者： L.T. Yang Department of Computer Science Saint Francis Xavier University Antigonish NS Canada

The PROUD module placement algorithm mainly uses a hierarchical decomposition technique and the solution of sparse linear systems based on a resistive network analogy. It has been shown that the PROUD algorithm can achieve a comparable design of the placement problems for very large circuits with the best placement algorithm based on simulated annealing, but with several order of magnitude faster. The modified PROUD, namely MPROUD algorithm by perturbing the coefficient matrices performs much faster that the original PROUD algorithm. Due to the instability and unguaranteed convergence of MPROUD algorithm, we have proposed a new convergent and numerically stable PROUD, namely Improved PROUD algorithm, denoted as IPROUD with attractive computational costs to solve the module placement problems by making use of the SYMMLQ and MINRES methods based on Lanczos process (Yang, 1997). We subsequently propose parallel versions of the improved PROUD algorithms. The parallel algorithm is derived such that all inner products and matrix-vector multiplications of a single iteration step are independent. Therefore, the cost of global communication which represents the bottleneck of the parallel performance on parallel distributed memory computers can be significantly reduced, therefore, to obtain another order of magnitude improvement in the runtime without loss of the quality of the layout.

关键词： Memory architecture Linear systems Algorithm design and analysis Circuit simulation Simulated annealing Convergence of numerical methods Computational efficiency parallel algorithms Costs Global communication

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A strategy for semantic integrity checking in distributed databases

A strategy for semantic integrity checking in distributed da...

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International conference on parallel and distributed Systems (ICPADS)

作者： H. Ibrahim Department of Computer Science Faculty of Computer Science and Information Technology Universiti Putra Malaysia Serdang Malaysia

Integrity constraints represent knowledge about data with which a database must be consistent. The process of checking constraints to ensure that the update operations or transactions which alter the database will preserve its consistency has proved to be extremely difficult to implement efficiently, particularly in a distributed environment. In the literature, most of the approaches/methods proposed for finding/deriving a good set of integrity constraints concentrate on deriving simplified forms of the constraints by analyzing both the syntax of the constraints and their appropriate update operations. These methods are based on syntactic criteria and are limited to simple types of integrity constraints. Also, these methods are only able to produce one integrity test for each integrity constraint. In Ibrahim, Gray, and Fiddian (1997), we introduced an integrity constraint subsystem for a relational distributed database. The subsystem consists of several techniques necessary for efficient constraint checking, particularly in a distributed environment where data distribution is transparent to application domain. However, the technique proposed for generating integrity tests is limited to several types of integrity constraints, namely: domain, key, referential and simple general semantic constraint and only produced two integrity tests (global and local) for a given integrity constraint. In this paper, we present a technique for deriving several integrity tests for a given integrity constraint where the following types of integrity constraints are considered: static and transition constraints.

关键词： distributed databases Transaction databases Testing Computer science Information technology Relational databases Algorithm design and analysis Costs Robustness distributed computing

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Processing noisy analog signals from microsensor arrays and VLSI imagers using stochastic binary computations

Processing noisy analog signals from microsensor arrays and ...

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Canadian conference on Electrical and Computer Engineering (CCECE)

作者： D.K. McNeill D. Zhao C. Shafai N. Chadha A. Cuhadar H.C. Card Electrical and Computer Engineering University of Manitoba Winnipeg Manitoba Canada University of Manitoba Winnipeg MB CA Dept. of Electr. & Comput. Eng. Manitoba Univ. Winnipeg Man. Canada

This paper describes the use of Bernoulli-distributed binary random variables to implement signal processing from integrated arrays of parallel microsensors and VLSI imagers. parallel digital signal processing of these signals is achieved in hardware by a combination of CMOS threshold detection of noisy raw signals, and the use of stochastic arithmetic (see Gaines, B.R., "advances in Information Systems Science", Plenum Press, vol.2, chap.2, p.37-172, 1969; Brown, B.D. and Card, H.C., IEEE Trans. Computers, vol.50, p.891-905, 2001). Hardware efficiencies include reduced power dissipation and improved error tolerance, as compared to binary radix implementations, together with the ability to trade precision against computation time using fixed hardware, reminiscent of biological computations.

关键词： Signal processing Microsensors Very large scale integration Stochastic processes Analog computers Hardware Biology computing Random variables Array signal processing Biomedical signal processing

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SPEEDES: A brief overview

SPEEDES: A brief overview

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5th Enabling Technology for Simulation Science conference

作者： Bailey, CA McGraw, RM Steinman, JS Wong, J RAM Lab Inc San Diego CA 92121 USA

ISBN: (纸本)0819440620

This paper provides an overview of each of the layers contained in the SPEEDES architecture. SPEEDES is a simulation framework that promotes interoperability, portability, efficiency, flexibility, and maintainability for High Performance computing applications. Specifically, SPEEDES targets parallel and distributed platforms via its advanced time management schemes and shared memory communications structures. SPEEDES currently supports a large user base centered in the DOD simulation community. This paper describes several of the layers and features of the SPEEDES Simulation Framework. In addition, this paper discusses some of the most recent advances to the SPEEDES framework including its Federation Object (FO) System and its support for HLA via the SPEEDES-HLA Gateway.

关键词： Computer simulations Process modeling Telecommunications Defense and security Systems modeling Computer architecture C++ Software development computing systems Receivers

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